Patents by Inventor Amit Kumar Agarwal
Amit Kumar Agarwal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20160352865Abstract: Techniques are described for extending a two-way active measurement protocol (TWAMP) to enable measurement of service key performance indicators (KPIs) in a software defined network (SDN) and network function virtualization (NFV) architecture. The TWAMP extensions enable control messaging to be handled by a TWAMP control client executed on a centralized controller, and data messaging to be handled by a TWAMP session initiator executed on a separate network device. Techniques are also described for extending TWAMP to enable measurement of any of a plurality of service KPIs for a given service supported at a TWAMP server. The service KPIs may include one or more of keepalive measurements, round trip time measurements, path delay measurements, service latency measurements, or service load measurements. The TWAMP extensions for the service KPIs may be used in both conventional network architectures and in SDN and NFV architectures.Type: ApplicationFiled: June 30, 2015Publication date: December 1, 2016Inventors: Peyush Gupta, Amit Kumar Agarwal, Srivathsa Sarangapani
-
Publication number: 20160352866Abstract: Techniques are described for extending a two-way active measurement protocol (TWAMP) to enable measurement of service key performance indicators (KPIs) in a software defined network (SDN) and network function virtualization (NFV) architecture. The TWAMP extensions enable control messaging to be handled by a TWAMP control client executed on a centralized controller, and data messaging to be handled by a TWAMP session initiator executed on a separate network device. Techniques are also described for extending TWAMP to enable measurement of any of a plurality of service KPIs for a given service supported at a TWAMP server. The service KPIs may include one or more of keepalive measurements, round trip time measurements, path delay measurements, service latency measurements, or service load measurements. The TWAMP extensions for the service KPIs may be used in both conventional network architectures and in SDN and NFV architectures.Type: ApplicationFiled: June 30, 2015Publication date: December 1, 2016Inventors: Peyush Gupta, Amit Kumar Agarwal, Srivathsa Sarangapani
-
Patent number: 8990515Abstract: The present invention extends to methods, systems, and computer program products for aliasing buffers. Embodiment of the inventions supporting buffer aliasing through introduction of a level of indirection between a source program's buffer accesses and the target executable physical buffers, and binding the logical buffer accesses to actual physical buffer accesses at runtime. A variety of techniques for can be used supporting runtime aliasing of buffers, in a system which otherwise disallows such runtime aliasing between separately defined buffers in the target executable code. Binding of logical buffer accesses in the source program to the actual physical buffers defined in the target executable code is delayed until runtime.Type: GrantFiled: June 14, 2011Date of Patent: March 24, 2015Assignee: Microsoft Technology Licensing, LLCInventors: Amit Kumar Agarwal, Weirong Zhu, Yosseff Levanoni
-
Publication number: 20140223131Abstract: Embodiments are directed to optimizing data transfers between heterogeneous memory arenas. In one scenario, a computer system receives an indication that a data chunk is to be transferred from a first memory arena to a third memory arena, and then determines that for the data chunk to be transferred from the first memory arena to the third arena, the data chunk is to be transferred from the first memory arena to a second memory arena, and from the second memory arena to the third memory arena. The computer system divides the data chunk into smaller data portions and copies a first data portion from the first memory arena to the second memory arena. The computer system then copies the first data portion from the second memory arena to the third memory arena and copies a second data portion from the first memory arena to the second memory arena in parallel.Type: ApplicationFiled: February 7, 2013Publication date: August 7, 2014Applicant: MICROSOFT CORPORATIONInventors: Amit Kumar Agarwal, Yosseff Levanoni, Weirong Zhu
-
Patent number: 8677322Abstract: The present invention extends to methods, systems, and computer program products for debugging in a multiple address space environment. Embodiments of the invention include techniques for recording debug information used for translating between an abstract unified address space and multiple address spaces at a target system (e.g., a co-processor, such as, a GPU or other accelerator). A table is stored in the recorded debug information. The table includes one or more entries mapping compiler assigned IDs to address spaces. During debugging within a symbolic debugger, the recorded debug information can be used for viewing program data across multiple address spaces in a live debugging session.Type: GrantFiled: June 29, 2011Date of Patent: March 18, 2014Assignee: Microsoft CorporationInventors: Amit Kumar Agarwal, Weirong Zhu, Yosseff Levanoni, Yongkang Zhu
-
Patent number: 8533698Abstract: The present invention extends to methods, systems, and computer program products for optimizing execution of kernels. Embodiments of the invention include an optimization framework for optimizing runtime execution of kernels. During compilation, information about the execution properties of a kernel are identified and stored alongside the executable code for the kernel. At runtime, calling contexts access the information. The calling contexts interpret the information and optimize kernel execution based on the interpretation.Type: GrantFiled: June 13, 2011Date of Patent: September 10, 2013Assignee: Microsoft CorporationInventors: Weirong Zhu, Amit Kumar Agarwal, Lingli Zhang, Yosseff Levanoni
-
Patent number: 8468507Abstract: The present invention extends to methods, systems, and computer program products for binding executable code at runtime. Embodiments of the invention include late binding of specified aspects of code to improve execution performance. A runtime dynamically binds lower level code based on runtime information to optimize execution of a higher level algorithm. Aspects of a higher level algorithm having a requisite (e.g., higher) impact on execution performance can be targeted for late binding. Improved performance can be achieved with minimal runtime costs using late binding for aspects having the requisite execution performance impact.Type: GrantFiled: June 10, 2011Date of Patent: June 18, 2013Assignee: Microsoft CorporationInventors: Amit Kumar Agarwal, Weirong Zhu, Yosseff Levanoni
-
Publication number: 20130007712Abstract: The present invention extends to methods, systems, and computer program products for debugging in a multiple address space environment. Embodiments of the invention include techniques for recording debug information used for translating between an abstract unified address space and multiple address spaces at a target system (e.g., a co-processor, such as, a GPU or other accelerator). A table is stored in the recorded debug information. The table includes one or more entries mapping compiler assigned IDs to address spaces. During debugging within a symbolic debugger, the recorded debug information can be used for viewing program data across multiple address spaces in a live debugging session.Type: ApplicationFiled: June 29, 2011Publication date: January 3, 2013Applicant: Microsoft CorporationInventors: Amit Kumar Agarwal, Weirong Zhu, Yosseff Levanoni, Yongkang Zhu
-
Publication number: 20120324430Abstract: The present invention extends to methods, systems, and computer program products for aliasing buffers. Embodiment of the inventions supporting buffer aliasing through introduction of a level of indirection between a source program's buffer accesses and the target executable physical buffers, and binding the logical buffer accesses to actual physical buffer accesses at runtime. A variety of techniques for can be used supporting runtime aliasing of buffers, in a system which otherwise disallows such runtime aliasing between separately defined buffers in the target executable code. Binding of logical buffer accesses in the source program to the actual physical buffers defined in the target executable code is delayed until runtime.Type: ApplicationFiled: June 14, 2011Publication date: December 20, 2012Applicant: Microsoft CorporationInventors: Amit Kumar Agarwal, Weirong Zhu, Yosseff Levanoni
-
Publication number: 20120317558Abstract: The present invention extends to methods, systems, and computer program products for binding executable code at runtime. Embodiments of the invention include late binding of specified aspects of code to improve execution performance. A runtime dynamically binds lower level code based on runtime information to optimize execution of a higher level algorithm. Aspects of a higher level algorithm having a requisite (e.g., higher) impact on execution performance can be targeted for late binding. Improved performance can be achieved with minimal runtime costs using late binding for aspects having the requisite execution performance impact.Type: ApplicationFiled: June 10, 2011Publication date: December 13, 2012Applicant: Microsoft CorporationInventors: Amit Kumar Agarwal, Weirong Zhu, Yosseff Levanoni
-
Publication number: 20120317556Abstract: The present invention extends to methods, systems, and computer program products for optimizing execution of kernels. Embodiments of the invention include an optimization framework for optimizing runtime execution of kernels. During compilation, information about the execution properties of a kernel are identified and stored alongside the executable code for the kernel. At runtime, calling contexts access the information. The calling contexts interpret the information and optimize kernel execution based on the interpretation.Type: ApplicationFiled: June 13, 2011Publication date: December 13, 2012Applicant: Microsoft CorporationInventors: Weirong Zhu, Amit Kumar Agarwal, Lingli Zhang, Yosseff Levanoni
-
Publication number: 20120159444Abstract: The present invention extends to methods, systems, and computer program products for fusing debug information from different compiler stages. Embodiments of the invention fuse debug information from a plurality of different compile stages in a code generation process into a single set of debug information. The single set of debug information maps directly between instructions and symbols (e.g., source code) input to a first compile stage and instructions and symbols (e.g., machine code) output from a last compile stage.Type: ApplicationFiled: December 17, 2010Publication date: June 21, 2012Applicant: Microsoft CorporationInventors: Amit Kumar Agarwal, Travis Paul Dorschel, Paul Maybee