Patents by Inventor Amit M. Singh

Amit M. Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods and apparatuses to reduce context switching during data transmission and reception in a multi-processor device
    Patent number: 8588253
    Abstract: A method and apparatus are provided for efficiently transferring data between a first and second processors having shared memory. A plurality of data packets are aggregated into a packet bundle at the first processor. The packet bundle is then transferred from the first processor to the second processor using the shared memory, wherein the transfer of the packet bundle is performed in a single context switch at the first processor. The packet bundle is then unbundled into individual data packets at the second processor, wherein a processing load of the second processor is reduced due to the aggregation of the data packets into the packet bundle by the first processor.
    Type: Grant
    Filed: June 25, 2009
    Date of Patent: November 19, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Jeffrey A. Dyck, Brian F. Costello, Vamsi K. Dokku, Udayakumar U. Menon, Amit M. Singh
  • METHODS AND APPARATUSES TO REDUCE CONTEXT SWITCHING DURING DATA TRANSMISSION AND RECEPTION IN A MULTI-PROCESSOR DEVICE
    Publication number: 20090323686
    Abstract: A method and apparatus are provided for efficiently transferring data between a first and second processors having shared memory. A plurality of data packets are aggregated into a packet bundle at the first processor. The packet bundle is then transferred from the first processor to the second processor using the shared memory, wherein the transfer of the packet bundle is performed in a single context switch at the first processor. The packet bundle is then unbundled into individual data packets at the second processor, wherein a processing load of the second processor is reduced due to the aggregation of the data packets into the packet bundle by the first processor.
    Type: Application
    Filed: June 25, 2009
    Publication date: December 31, 2009
    Applicant: QUALCOMM Incorporated
    Inventors: Jeffrey A. Dyck, Brian F. Costello, Vamsi K. Dokku, Udayakumar U. Menon, Amit M. Singh