Patents by Inventor Amit Majumder

Amit Majumder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240111826
    Abstract: An apparatus to facilitate hardware enhancements for double precision systolic support is disclosed. The apparatus includes matrix acceleration hardware having double-precision (DP) matrix multiplication circuitry including a multiplier circuits to multiply pairs of input source operands in a DP floating-point format; adders to receive multiplier outputs from the multiplier circuits and accumulate the multiplier outputs in a high precision intermediate format; an accumulator circuit to accumulate adder outputs from the adders with at least one of a third global source operand on a first pass of the DP matrix multiplication circuitry or an intermediate result from the first pass on a second pass of the DP matrix multiplication circuitry, wherein the accumulator circuit to generate an accumulator output in the high precision intermediate format; and a down conversion and rounding circuit to down convert and round an output of the second pass as final result in the DP floating-point format.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Applicant: Intel Corporation
    Inventors: Jiasheng Chen, Kevin Hurd, Changwon Rhee, Jorge Parra, Fangwen Fu, Theo Drane, William Zorn, Peter Caday, Gregory Henry, Guei-Yuan Lueh, Farzad Chehrazi, Amit Karande, Turbo Majumder, Xinmin Tian, Milind Girkar, Hong Jiang
  • Patent number: 10110209
    Abstract: A Process Compensated Delay has been disclosed. In one implementation delay is primarily based on electron mobility.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: October 23, 2018
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventor: Amit Majumder
  • Patent number: 9264027
    Abstract: A Process Compensated Delay has been disclosed. In one implementation delay is primarily based on electron mobility.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: February 16, 2016
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventor: Amit Majumder
  • Patent number: 8513992
    Abstract: A method and apparatus for implementation of PLL minimum frequency via voltage comparison have been described.
    Type: Grant
    Filed: September 10, 2010
    Date of Patent: August 20, 2013
    Assignee: Integrated Device Technology, Inc.
    Inventors: Amit Majumder, Praveen Rajan Singh, Alejandro Flavio Gonzalez
  • Patent number: 8324948
    Abstract: A method and apparatus for duty-cycle correction with reduced current consumption have been described.
    Type: Grant
    Filed: September 23, 2010
    Date of Patent: December 4, 2012
    Assignee: Integrated Device Technology, Inc.
    Inventor: Amit Majumder