Abstract: In some aspects, the disclosure is directed to methods and systems for a flexible type-length-value (TLV) parser and identification map that may be used to quickly identify TLV sequences of packet headers for subsequent processing in a pipeline. A flexible TLV bus may provide a secondary path for the TLV header and identification map, allowing for subsequent processing stages to read, process, modify, delete, or otherwise utilize individual TLV sequences within the header.

Abstract: In some aspects, the disclosure is directed to methods and systems for a flexible type-length-value (TLV) parser and identification map that may be used to quickly identify TLV sequences of packet headers for subsequent processing in a pipeline. A flexible TLV bus may provide a secondary path for the TLV header and identification map, allowing for subsequent processing stages to read, process, modify, delete, or otherwise utilize individual TLV sequences within the header.

Abstract: In some aspects, the disclosure is directed to methods and systems for a flexible type-length-value (TLV) parser and identification map that may be used to quickly identify TLV sequences of packet headers for subsequent processing in a pipeline. A flexible TLV bus may provide a secondary path for the TLV header and identification map, allowing for subsequent processing stages to read, process, modify, delete, or otherwise utilize individual TLV sequences within the header.

Abstract: The present invention relates to system and method for providing near real-time DR events and price signals to the customer end-points to optimally manage the available DR resources. The system utilizes bottom up load forecasting for accurate individualized forecasts for customer loads in the presence of dynamic pricing signals. For better efficiency and reliability of grid operation the system utilizes advanced machine learning and robust optimization techniques for real-time and “personalized” DR-offer dispatch.

Abstract: The present invention demonstrates a highly distributed demand response optimization and management system for real-time (DROMS-RT) power flow control to support large scale integration of distributed renewable generation into the grid. The system is a cloud-based platform that reduces critical peak power safely and securely. The arrangement is provided with a control and communications platform to allow highly dispatchable demand response (DR) services in timeframes suitable for providing ancillary services to the transmission grid. The services are substantially more efficient than other forms of ancillary service options currently available to manage the intermittency associated with large-scale renewable integration.

Abstract: The present invention relates to a signal processing technique for characterization of baseline noise, and for determining load reduction in presence of baseline noise. The method utilizes sparse signal processing algorithm to recover demand resource response signal and a plurality of SNR enhancement strategies are then applied to demand resource response signal for enhancing the signal to noise ratio.

Abstract: The present invention demonstrates a highly distributed demand response optimization and management system for real-time (DROMS-RT) power flow control to support large scale integration of distributed renewable generation into the grid. The system is a cloud-based platform that reduces critical peak power safely and securely. The arrangement is provided with a control and communications platform to allow highly dispatchable demand response (DR) services in timeframes suitable for providing ancillary services to the transmission grid. The services are substantially more efficient than other forms of ancillary service options currently available to manage the intermittency associated with large-scale renewable integration.

Abstract: The present invention relates to a signal processing technique for characterization of baseline noise, and for determining load reduction in presence of baseline noise. The method utilizes sparse signal processing algorithm to recover demand resource response signal and a plurality of SNR enhancement strategies are then applied to demand resource response signal for enhancing the signal to noise ratio.

Abstract: A scalable and web-based demand response platform for optimization and management of Demand response resources are provided. The optimization and management are achieved by using a server, a program design module, a customer portal module, a forecasting optimization module, an event management module, an application programming interface, an analytics module for performing analysis for performing analysis of the data feeds. The said platform is offered to the users on software-as-a-service model.

Abstract: The present invention relates to system and method for providing near real-time DR events and price signals to the customer end-points to optimally manage the available DR resources. The system utilizes bottom up load forecasting for accurate individualized forecasts for customer loads in the presence of dynamic pricing signals. For better efficiency and reliability of grid operation the system utilizes advanced machine learning and robust optimization techniques for real-time and “personalized” DR-offer dispatch.

Abstract: A system and a method for optimization and management of Demand Response in real time manner is provided. The system employs a resource modeler, a forecasting engine, an optimizer, a dispatch engine, and a baseline engine. The system is built using open framework standards based signaling and data collection, and is offered under a “Software-as-a-Service” model to significantly reduce the cost of participation in demand response. It uses off the shelf information and communication technology (ICT) and controls equipment.

Abstract: A method for evaluating an erroneous state associated with a target circuit is provided that includes receiving information associated with a target circuit, the information identifying a property within the target circuit to be verified. One or more partitioned ordered binary decision diagram (POBDD) operations are executed using the information in order to identify an erroneous state associated with a sub-space within the target circuit. A path associated with the erroneous state is identified. The path reflects a correlation between an initial state associated with the erroneous state and a point where the erroneous state was encountered.

Abstract: In one embodiment, a method for verifying one or more particular properties of a circuit using a learning strategy to determine suitable values of particular verification parameters includes classifying each of multiple properties of a circuit according to circuit size and selecting a candidate property from the properties. The candidate property set includes one or more particular properties from each property class. The method also includes attempting to verify one or more particular properties of the circuit using the candidate property set and particular values of particular verification parameters. The method also includes determining suitable values of the particular verification parameters according the attempted verification of the particular properties of the circuit using the candidate property set and the particular values of the particular verification parameters.

Abstract: A computer-implemented method computes the steady-state and control voltage of a voltage controlled oscillator, given a known frequency or a known period of oscillation of the voltage controlled oscillator. Differential algebraic equations representative of the voltage controlled oscillator are generated, where the differential algebraic equations includes a known period or frequency of oscillation and an unknown control voltage of the voltage controlled oscillator. The differential algebraic equations are modified using a finite difference method, a shooting method, or a harmonic balance method, to obtain a set of matrix equations corresponding to the differential algebraic equations. A solution to the matrix equations is obtained using a Krylov subspace method, using a preconditioner for the Krylov subspace method that is derived from a Jacobian matrix corresponding to the matrix equations, where the solution includes the control voltage of the voltage controlled oscillator in steady state.

Abstract: In one embodiment, a method for determining one or more reachable states in a circuit using distributed computing and one or more partitioned data structures includes, at a first one of multiple computing systems, receiving a first partition of a circuit. The first partition corresponds to a first binary decision diagram (BDD) having a first density. The method includes performing a first reachability analysis on the first partition using the first BDD until a fixed point in the first partition has been reached and, if, during the first reachability analysis, the size of the first BDD exceeds a threshold, discarding the first BDD. The method includes communicating with at least one second one of the multiple computing systems. The second one of the multiple computing systems has received a second partition of the circuit. The second one of the multiple computing systems has performed a second reachability analysis on the second BDD without discarding the second BDD.

Abstract: In one embodiment, a method for verifying one or more particular properties of a circuit using a learning strategy to determine suitable values of particular verification parameters includes classifying each of multiple properties of a circuit according to circuit size and selecting a candidate property from the properties. The candidate property set includes one or more particular properties from each property class. The method also includes attempting to verify one or more particular properties of the circuit using the candidate property set and particular values of particular verification parameters. The method also includes determining suitable values of the particular verification parameters according the attempted verification of the particular properties of the circuit using the candidate property set and the particular values of the particular verification parameters.

Abstract: A method for verifying a property associated with a target circuit is provided that includes receiving information associated with a target circuit, the information identifying a property within the target circuit to be verified. One or more operations may be executed in order to generate a set of transition relations for performing a reachability analysis associated with the target circuit. An image associated with the target circuit may be partitioned into a plurality of leaves that may each represent a subset of a final image to be generated by a partitioned ordered binary decision diagram (POBDD) data structure. An analysis may be computed of one or more of the leaves using a selected one or both of conjunction and quantification operations separately.

Abstract: In one embodiment, a system for verifying a circuit using a scheduling technique includes one or more partitioned ordered binary decision diagram (POBDD) modules that collectively generate one or more POBDDs. Each POBDD corresponds to one or more partitions of a state space of the circuit and includes a number of states and a number of nodes in the partition. The system also includes one or more cost metrics modules that collectively determine a processing cost of each of the partitions of each of the POBDDs. The system also includes one or more scheduling modules that collectively schedule processing of the partitions of the POBDDs for semiformal verification of a circuit. The schedule is based, at least in part, on the determined processing costs of the partitions of the POBDDs.

Abstract: A method for verifying a property associated with a target circuit is provided that includes receiving information associated with a target circuit, the information identifying a property within the target circuit to be verified. One or more partitioned ordered binary decision diagram (POBDD) operations are then executed using the information in order to generate a first set of states at a first depth associated with a sub-space within the target circuit. Bounded model checking may be executed using the first set of states in order to generate a second set of states at a second depth associated with the sub-space within the target circuit. The first set of states may be used as a basis for the second set of states such that the second depth is greater than the first depth.

Abstract: In one embodiment, a method for determining one or more reachable states in a circuit using distributed computing and one or more partitioned data structures includes, at a first one of multiple computing systems, receiving a first partition of a circuit. The first partition corresponds to a first binary decision diagram (BDD) having a first density. The method includes performing a first reachability analysis on the first partition using the first BDD until a fixed point in the first partition has been reached and, if, during the first reachability analysis, the size of the first BDD exceeds a threshold, discarding the first BDD. The method includes communicating with at least one second one of the multiple computing systems. The second one of the multiple computing systems has received a second partition of the circuit. The second one of the multiple computing systems has performed a second reachability analysis on the second BDD without discarding the second BDD.