Patents by Inventor Amit R. Gupta

Amit R. Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7159169
    Abstract: An apparatus includes an instruction decoder, at least one control register coupled to the instruction decoder, and an add-compare-select (ACS) engine coupled to the at least one control register. The instruction decoder is operative to control the ACS engine to perform Viterbi decoding in response to the instruction decoder receiving a first instruction, and is operative to control the ACS engine to perform turbo decoding in response to the instruction decoder receiving a second instruction.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: January 2, 2007
    Assignee: Intel Corporation
    Inventors: Hooman Honary, Kumar Ganapathy, Amit R. Gupta, Siva Simanapalli
  • Patent number: 6397326
    Abstract: A method and circuit is provided for preloading a branch prediction unit within a microprocessor. In one embodiment of the method, a branch history storage device such as branch history shift register is written with a predetermined multibit predicter in response to the microprocessor receiving and executing a special write branch history storage device instruction for writing the predetermined multibit predicter into the branch history storage device. The branch history storage device is contained within a prediction circuit of the microprocessor, and generally the contents of the branch history storage device is used in the process of predicting the results of executing conditional branch instructions prior to their execution.
    Type: Grant
    Filed: February 16, 2001
    Date of Patent: May 28, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: David C. Horton, Amit R. Gupta
  • Patent number: 6223280
    Abstract: A method and circuit is provided for preloading a branch prediction unit within a microprocessor. In one embodiment of the method, a branch history storage device such as branch history shift register is written with a predetermined multibit predicter in response to the microprocessor receiving and executing a special write branch history storage device instruction for writing the predetermined multibit predicter into the branch history storage device. The branch history storage device is contained within a prediction circuit of the microprocessor, and generally the contents of the branch history storage device is used in the process of predicting the results of executing conditional branch instructions prior to their execution.
    Type: Grant
    Filed: July 16, 1998
    Date of Patent: April 24, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: David C. Horton, Amit R. Gupta