Patents by Inventor Amit Sharma

Amit Sharma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240126460
    Abstract: A scheduling platform for scheduling serverless application tasks in persistent memory (PMEM) is provided. A profiler receives application requests from processes of serverless applications. The profiler categorizes the processes as persistent or non-persistent based on the application requests. A read/write batcher creates batches of the persistent requests including the read requests and write requests and assigns the batches to persistent memory banks. A scheduler creates a schedule of the batches to the persistent memory banks in a manner enabling optimization of job completion time.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 18, 2024
    Inventors: Faraz AHMED, Lianjie CAO, Puneet SHARMA, Amit SAMANTA
  • Patent number: 11961014
    Abstract: Disclosed are systems, methods, and devices for presenting customer insights in association with an electronic customer relationship management tool. A graphical user interface (GUI) is presented to a user. The GUI has a first region having GUI elements of the customer relationship management tool, and a second region having GUI elements for presenting at least one customer insight, the second region displayed when the first region is displayed and proximate to the first region. Upon receiving an identifier identifying a particular customer, at least one machine-learning derived insight relevant to the identified customer is displaying to the user in the second region when receiving user input signals via the GUI elements of the first region.
    Type: Grant
    Filed: August 13, 2020
    Date of Patent: April 16, 2024
    Assignee: Royal Bank Of Canada
    Inventors: Anas Desouky, Nadia Ghobadipasha, Chengxi Yang, Zachary Mullins, Amit Sharma, Deepak Prakash Asrani, Dicken Tak Kuen Leung
  • Patent number: 11960766
    Abstract: A data storage device and method for accidental delete protection are provided. In one embodiment, a data storage device comprises a memory and a controller. The memory comprises a first set of physical blocks and a second set of physical blocks, where the first and second sets of physical blocks are associated with separate logical-to-physical address tables and/or separate block lists. The controller is configured to write data received from a host in the first set of physical blocks and move the data from the first set of physical blocks to the second set of physical blocks in response to the host requesting that a modified version of the data be written in the memory. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: April 16, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Abhinandan Venugopal, Amit Sharma
  • Patent number: 11941263
    Abstract: A data storage device having an FTL configured to award to some pending memory operations a higher priority compared to the priority given to those operations by a default scheduling scheme. Such awards of higher priority may be based on a policy directed, e.g., at maximizing the effective data throughput, balancing the data throughput and the input/output bus throughput, or other performance objective. In response to awards of higher priority, a power-management circuit of the data storage device may dynamically route a constrained power supply such that the storage dies corresponding to the higher-priority operations preferentially receive power allocation in the next time interval(s). The remainder of the power budget (if any) in those time intervals may be allocated in accordance with the default scheduling scheme.
    Type: Grant
    Filed: May 2, 2022
    Date of Patent: March 26, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Amit Sharma, Niranjana Bhatta, Abhinandan Venugopal
  • Publication number: 20240094951
    Abstract: A programming order of memory dies of a metablock is typically fixed. However, in some storage architectures, this may cause performance bottlenecks. As such, the programming order of the memory dies may be altered to reduce or eliminate performance bottlenecks.
    Type: Application
    Filed: September 16, 2022
    Publication date: March 21, 2024
    Inventors: Amit Sharma, Abhinandan Venugopal
  • Publication number: 20240038025
    Abstract: Graphical user interfaces (GUIs) are provided for presenting games of chance in which a symbol or symbols displayed in a designated proper subset of symbol positions in a reel display area are treated as feature game trigger symbols for a given play of a base game of the game of chance. In some instances, the appearance of a symbol of a particular symbol type in a symbol position in the proper subset of symbol positions may cause the number of symbol positions in the proper subset of symbol positions to be increased.
    Type: Application
    Filed: July 27, 2022
    Publication date: February 1, 2024
    Inventors: Erick Ching, Amit Sharma, Jennifer Mizzi, Nathan Warms, Shayer Waseem Shaik
  • Patent number: 11863623
    Abstract: Storage devices and systems are capable of dynamically managing QoS requirements associated with host applications via a management interface. The management interface may the enable storage devices to: (i) decide which data needs to be transferred back to the hosts, (ii) choose to skip portions of the data transferred back to the hosts to improve throughput and maintain low cost, and (iii) operate contention resolutions with host applications. Furthermore, storage devices and systems may achieve a virtual throughput that may be greater than its actual physical throughput. The management interface may also be operated at an application level, which advantageously allows the devices and systems the capabilities of managing contention resolutions of host applications, and managing (changing, observing, fetching, etc.) one or more QoS requirements for each host application.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: January 2, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Dinesh Kumar Agarwal, Amit Sharma
  • Publication number: 20230418486
    Abstract: Aspects directed towards configuring new storage devices in a storage device pool are provided. In one aspect, a storage management device receives optimization information that includes at least one optimization learned by at least one source data storage device while part of a data storage system. A new data storage device for the data storage system is then configured with the at least one device optimization. In another aspect, a data storage device receives optimization information from a storage management device coupled to a plurality of pooled data storage devices, which includes the data storage device and at least one source data storage device. For this aspect, the optimization information includes at least one optimization learned by the at least one source data storage device while coupled to the storage management device. The data storage device is then configured to include the at least one device optimization.
    Type: Application
    Filed: June 28, 2022
    Publication date: December 28, 2023
    Inventors: Amit Sharma, Dinesh Kumar Agarwal
  • Publication number: 20230418482
    Abstract: Methods, systems, and apparatuses for storage device pool management based on storage device logical to physical (L2P) table information are provided. One such data storage system includes data storage devices each including a non-volatile memory; and a storage management device configured to receive L2P table information from at least two of the data storage devices; receive host data from a host device to be stored in one or more of the data storage devices; select, based on the L2P table information from the at plurality of data storage devices and the size of the host data, a target data storage device from the plurality of data storage devices; and send the host data to the target data storage device.
    Type: Application
    Filed: June 27, 2022
    Publication date: December 28, 2023
    Inventors: Amit Sharma, Dinesh Kumar Agarwal
  • Publication number: 20230418499
    Abstract: Aspects directed towards data storage management are provided. In one aspect, a data storage system receives fragmentation level information from data storage devices, and host data from a host device to be stored in the data storage devices. Based on the received fragmentation level information, a target data storage device is selected from the data storage devices, and the host data is sent to the target data storage device. In another aspect, a data storage device determines threshold conditions that trigger a defragmentation process. For this aspect, a fragmentation level metric indicating a proximity of the data storage device to initiating the defragmentation process is calculated based on the threshold conditions and a current amount of data stored in a non-volatile memory (NVM). The fragmentation level metric is then sent to a storage management device.
    Type: Application
    Filed: June 28, 2022
    Publication date: December 28, 2023
    Inventors: Amit Sharma, Dinesh Kumar Agarwal
  • Patent number: 11851844
    Abstract: A controller may identify a command to move an implement in a particular direction and an amount of time for the implement to move in the particular direction. The controller may determine an estimated velocity of the implement moving in the particular direction. The controller may determine a predicted travel distance of the implement in the particular direction. The controller may cause, based on a stop position associated with the particular direction and the predicted travel distance of the implement in the particular direction, the implement to move from a current position to a reset position. The controller may cause the command to be executed to cause the implement to move, in the particular direction and for the amount of time, from the reset position to another position without hitting the stop position associated with the particular direction.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: December 26, 2023
    Assignee: Caterpillar Inc.
    Inventors: Amit Sharma, Raghavendra Boloor, Steven C Budde, Jeremy J. Diaz
  • Publication number: 20230409234
    Abstract: A data storage device and method are provided for host multi-command queue grouping based on write-size alignment in a multi-queue-depth environment. In one embodiment, a data storage device is provided comprising a memory and a controller. The controller is configured to provide a host with an indication of a required amount of data needed to program a set of multi-level cell blocks in the memory; receive an assurance from the host that the host will be providing the data storage device with the required amount of data; and based on the assurance received from the host, program the set of multi-level cell blocks as data is received from the host but before the required amount of data is received from the host. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.
    Type: Application
    Filed: May 17, 2022
    Publication date: December 21, 2023
    Applicant: Western Digital Technologies, Inc.
    Inventors: Amit Sharma, Dinesh Kumar Agarwal, Abhinandan Venugopal
  • Patent number: 11816343
    Abstract: Non-volatile memory (NVM) dies of a data storage device, wherein on-chip latches of the dies are made available to a host device for use as volatile memory. In some examples, a data storage controller dynamically determines when the latches of a particular NVM die of an NVM array are available for use as volatile memory and exports those particular latches to the host device for use as random access memory (RAM). In other examples, the data storage controller dynamically determines when particular dies of the NVM array of dies are available and exports all latches of those dies to the host device for use as RAM. The data storage controller may rotate NVM die usage so that, over time, different dies are used for latch-based volatile memory while other dies are used for NVM storage. Usage profiles are described that allow the host device to select particular latch usage configurations.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: November 14, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Amit Sharma, Dinesh Kumar Agarwal
  • Publication number: 20230350586
    Abstract: A data storage device having an FTL configured to award to some pending memory operations a higher priority compared to the priority given to those operations by a default scheduling scheme. Such awards of higher priority may be based on a policy directed, e.g., at maximizing the effective data throughput, balancing the data throughput and the input/output bus throughput, or other performance objective. In response to awards of higher priority, a power-management circuit of the data storage device may dynamically route a constrained power supply such that the storage dies corresponding to the higher-priority operations preferentially receive power allocation in the next time interval(s). The remainder of the power budget (if any) in those time intervals may be allocated in accordance with the default scheduling scheme.
    Type: Application
    Filed: May 2, 2022
    Publication date: November 2, 2023
    Inventors: Amit Sharma, Niranjana Bhatta, Abhinandan Venugopal
  • Patent number: 11797183
    Abstract: Systems and methods are disclosed for providing utilization of device resources based on host assisted grouping of applications. In certain embodiments, a data storage device includes a non-volatile memory, a volatile memory, and a controller configured to: receive application group information associated with applications from a host, wherein the application group information indicates corresponding application groups for the applications on the host; receive a plurality of write requests associated with a plurality of applications from the host, wherein the plurality of applications is included in the same application group; write data for each write request of the plurality of write requests in parallel across a plurality of channels associated with a plurality of dies in the non-volatile memory such that the data for the plurality of write requests share a parity buffer; and generate parity data for the data for the plurality of write requests.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: October 24, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Dinesh Kumar Agarwal, Amit Sharma
  • Patent number: 11797387
    Abstract: Example storage systems, storage devices, and methods provide dynamic redundant array of independent disks (RAID) stripe allocation based on memory device health conditions. A device health condition is assigned to each data chunk of a RAID stripe before the data chunk is sent to the target storage device. The write command indicates the device health condition and the receiving storage device selects the storage location for the data chunk corresponding to the device health condition.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: October 24, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Amit Sharma, Dinesh Kumar Agarwal, Abhinandan Venugopal
  • Publication number: 20230334350
    Abstract: A computing device including a processor configured to receive data indicating, for a query category within a sampled time period, a matching density defined as a number of matches per query. The processor may generate a structural causal model (SCM) of the data within the sampled time period. The SCM may include a plurality of structural equations. Based at least in part on the plurality of structural equations, the processor may estimate a structural equation error value for the matching density. The processor may update a value of a target SCM output variable to a counterfactual updated value. Based at least in part on the SCM, the counterfactual updated value, and the structural equation error value, the processor may compute a predicted matching density when the target SCM output variable has the counterfactual updated value. The processor may output the predicted matching density.
    Type: Application
    Filed: April 14, 2022
    Publication date: October 19, 2023
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Hua LI, Amit SHARMA, Jian JIAO, Ruofei ZHANG
  • Publication number: 20230315335
    Abstract: A data storage device receives a speculative read command from a host identifying logical block addresses. The speculative read command is not required be to executed within a certain amount of time or even at all. The data storage device at least partially executes the speculative read command in response to determining that such execution will not reduce performance of the data storage device. At least partially executing the speculative read command causes data associated with at least some of the logical block addresses to be read from the non-volatile memory and stored in at least one buffer. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.
    Type: Application
    Filed: March 31, 2022
    Publication date: October 5, 2023
    Applicant: Western Digital Technologies, Inc.
    Inventors: Abhinandan Venugopal, Amit Sharma, Anindita Chakrabarty
  • Patent number: 11775191
    Abstract: A data storage device including, in one implementation, a non-volatile memory device including a memory block that includes a plurality of memory dies and a controller that is coupled to the non-volatile memory device and that allocates power to non-memory components based on a determined usage of the memory dies. The controller is configured to monitor a utilization of the plurality of memory dies, determine a utilization state of the plurality of memory dies, and calculate an amount of available power allocated to the plurality of memory dies in response to determining that the plurality of memory dies are in a low utilization state. The controller is also configured to determine whether the amount of available power is above a predetermined threshold, and reallocate the available power to one or more components within the data storage device in response to determining that the amount of available power is above the predetermined threshold.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: October 3, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Amit Sharma, Abhinandan Venugopal, Dinesh Kumar Agarwal, Akhilesh Yadav
  • Publication number: 20230297565
    Abstract: A method, system, and computer readable storage to implement a data marketplace which stored data assets, such as tables, models, variables, etc. All of the data assets (assets) can be searched and retrieved from the data marketplace notwithstanding that the assets can be stored at different locations, in different forms, and in different platforms through an entire big data system. The data marketplace also predicts and suggests assets which will be likely to be relevant to a user's current project.
    Type: Application
    Filed: March 16, 2022
    Publication date: September 21, 2023
    Applicant: American Express Travel Related Services Company, Inc.
    Inventors: Anna Korsakova Bain, Arijit Ghosh, Kristen Gonzalez, Kavita Gupta, Ganesh Iyer, Kamalakannan Jeevanandham, Wesley Johnson, David Juang, Gita Kolla, Bimal Ramankutty, Gurusamy Ramasamy, Sachin Kale, Jeremy D Seideman, Amit Sharma, Pratiti Shrivastava, Robin Vetrady