Patents by Inventor Amit Subhash Kelkar

Amit Subhash Kelkar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9190391
    Abstract: An integrated circuit device is disclosed that includes a semiconductor substrate and a die attached to the semiconductor substrate. A conductive pillar is connected to at least one of the semiconductor substrate or the die. An overmold is molded onto the semiconductor substrate over the die, and the conductive pillar extends through the overmold.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: November 17, 2015
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Amit Subhash Kelkar, Karthik Thambidurai, Viren Khandekar, Hien D. Nguyen
  • Publication number: 20130105966
    Abstract: An integrated circuit device is disclosed that includes a semiconductor substrate and a die attached to the semiconductor substrate. A conductive pillar is connected to at least one of the semiconductor substrate or the die. An overmold is molded onto the semiconductor substrate over the die, and the conductive pillar extends through the overmold.
    Type: Application
    Filed: October 26, 2011
    Publication date: May 2, 2013
    Applicant: Maxim Integrated Products, Inc.
    Inventors: Amit Subhash Kelkar, Karthik Thambidurai, Viren Khandekar, Hien D. Nguyen
  • Publication number: 20080150092
    Abstract: Various embodiments of the present invention relate to systems, devices, and methods for treating a semiconductor substrate, such as a silicon wafer, in order to reduce current leakage therein. A semiconductor substrate is provided a plurality of heating treatments that create a denuded zone adjacent to a surface of the substrate and a core zone below the denuded zone. Oxygen impurities within the denuded zone are removed through an oxygen out-diffusion heat treatment. A plurality of macroscopic bulk micro defects is generated within the core zone through the combination of an agglomeration heat treatment and a macroscopic growth heat treatment. This plurality of macroscopic bulk micro defects inhibits migration of metallic contaminants that are located within the substrate. For exemplary purposes, certain embodiments are described relating to a semiconductor wafer heated in a sequence of three treatments.
    Type: Application
    Filed: March 3, 2008
    Publication date: June 26, 2008
    Inventors: Amit Subhash Kelkar, Joshua Li, Danh John C. Nguyen, Vijay Ullal
  • Publication number: 20080135988
    Abstract: Various embodiments of the present invention relate to systems, devices, and methods for treating a semiconductor substrate, such as a silicon wafer, in order to reduce current leakage therein. A semiconductor substrate is provided a plurality of heating treatments that create a denuded zone adjacent to a surface of the substrate and a core zone below the denuded zone. Oxygen impurities within the denuded zone are removed through an oxygen out-diffusion heat treatment. A plurality of macroscopic bulk micro defects is generated within the core zone through the combination of an agglomeration heat treatment and a macroscopic growth heat treatment. This plurality of macroscopic bulk micro defects inhibits migration of metallic contaminants that are located within the substrate. For exemplary purposes, certain embodiments are described relating to a semiconductor wafer heated in a sequence of three treatments.
    Type: Application
    Filed: December 7, 2006
    Publication date: June 12, 2008
    Inventors: Amit Subhash Kelkar, Joshua Li, Danh John C. Nguyen, Vijay Ullal