Abstract: A network infrastructure combining data over cable service interface specification (DOCSIS) cable modem management and 10 Gb passive optical network XGPON networking technology. The DOCSIS equipment controls restrict the XGPON to physical layer (layer 1) while the DOCSIS equipment operate at a data link layer and above.

Abstract: A system may include primary and secondary integrated circuits. The primary integrated circuit may receive a first subset of data packets associated with a first set of sequence numbers. The secondary integrated circuit may receive a second subset of data packets associated with a second set of sequence numbers. The primary integrated circuit is configured to manage the first set of sequence numbers and the second set of sequence numbers on behalf of the secondary integrated circuit and for the system.

Abstract: A network infrastructure combining data over cable service interface specification (DOCSIS) cable modem management and 10 Gb passive optical network XGPON networking technology. The DOCSIS equipment controls restrict the XGPON to physical layer (layer 1) while the DOCSIS equipment operate at a data link layer and above.

Abstract: A system may include primary and secondary integrated circuits. The primary integrated circuit may receive a first subset of data packets associated with a first set of sequence numbers. The secondary integrated circuit may receive a second subset of data packets associated with a second set of sequence numbers. The primary integrated circuit is configured to manage the first set of sequence numbers and the second set of sequence numbers on behalf of the secondary integrated circuit and for the system.

Abstract: A network infrastructure combining data over cable service interface specification (DOCSIS) cable modem management and 10 Gb passive optical network XGPON networking technology. The DOCSIS equipment controls restrict the XGPON to physical layer (layer 1) while the DOCSIS equipment operate at a data link layer and above.

Abstract: A network infrastructure combining data over cable service interface specification (DOCSIS) cable modem management and 10 Gb passive optical network XGPON networking technology. The DOCSIS equipment controls restrict the XGPON to physical layer (layer 1) while the DOCSIS equipment operate at a data link layer and above.

Abstract: A system may include primary and secondary integrated circuits. The primary integrated circuit may receive a first subset of data packets associated with a first set of sequence numbers. The secondary integrated circuit may receive a second subset of data packets associated with a second set of sequence numbers. The primary integrated circuit is configured to manage the first set of sequence numbers and the second set of sequence numbers on behalf of the secondary integrated circuit and for the system.

Abstract: A network infrastructure combining data over cable service interface specification (DOCSIS) cable modem management and 10 Gb passive optical network XGPON networking technology. The DOCSIS equipment controls restrict the XGPON to physical layer (layer 1) while the DOCSIS equipment operate at a data link layer and above.

Abstract: A system that utilizes data over cable service interface specification (DOCSIS) over passive optical networks is disclosed. An example system includes core system in a passive optical network (PON), comprising a memory; and one or more processors configured to generate a downlink (DL) data stream comprising optical signals, in compliance with a data over cable service interface specification (DOCSIS); and provide the optical signals containing DL data to a network component in the PON over an optical fiber coupled between the core system and the network component. In some embodiments, the core system is located at a head end equipment at the internet service provider's facility. However, in other embodiments, the core system can have a distributed architecture, with a part of the core system located at the internet service provider's facility and a different part of the core system located at a different location.

Abstract: Various systems and methods for queue management in computer memory are described herein. A system for implementing a zero thrash cache queue manager includes a processor subsystem to: receive a memory access request for a queue; write data to a queue tail cache line in a cache when the memory access request is to add data to the queue, the queue tail cache line protected from being evicted from the cache; and read data from a current queue head cache line in the cache when the memory access request is to remove data from the queue, the current queue head cache line protected from being evicted from the cache.

Abstract: A system that utilizes data over cable service interface specification (DOCSIS) over passive optical networks is disclosed. An example system includes core system in a passive optical network (PON), comprising a memory; and one or more processors configured to generate a downlink (DL) data stream comprising optical signals, in compliance with a data over cable service interface specification (DOCSIS); and provide the optical signals containing DL data to a network component in the PON over an optical fiber coupled between the core system and the network component. In some embodiments, the core system is located at a head end equipment at the internet service provider's facility. However, in other embodiments, the core system can have a distributed architecture, with a part of the core system located at the internet service provider's facility and a different part of the core system located at a different location.

Abstract: A cable modem with an embedded video transmitter for supporting all-IP end-to-end services in a cable network is disclosed. A cable modem is provided with a video converter/modulator feature. The cable modem receives Internet protocol (IP) packets carrying video streams from a network. A video extractor in the cable modem extracts video packets from the IP packets, and a video modulator in the cable modem modulates the extracted video packets per video format supported by a customer premise equipment (CPE). The cable modem then sends the modulated video packets to the CPE. With this feature, all-IP end-to-end services may be implemented without being dependent on an existing CPE's capability for supporting IP at the customer premises.

Abstract: Various systems and methods for queue management in computer memory are described herein. A system for implementing a zero thrash cache queue manager includes a processor subsystem to: receive a memory access request for a queue; write data to a queue tail cache line in a cache when the memory access request is to add data to the queue, the queue tail cache line protected from being evicted from the cache; and read data from a current queue head cache line in the cache when the memory access request is to remove data from the queue, the current queue head cache line protected from being evicted from the cache.

Abstract: Systems, apparatus and methods are described including operations for demodulating, via a front end demodulator of an analog front end processor, at least a portion of digital sample data into front end demodulated data. A framer of the analog front end processor may frame data from a selection of the front end demodulated data as well as undemodulated digital sample data remaining from the digital sample data, into frames of front end demodulated data and/or undemodulated digital sample data.

Abstract: Systems, apparatus and methods are described including operations for transferring data between elements of a cable communication device.

Abstract: A system and method are described to provide a next generation cable gateway/modem based on the DOCSIS standard with a scheme to synchronously combine channels in the physical layer to increase overall bit rates for coaxial cable data transmission. The systems and methods synchronize the counters associated with multiple channels, including continuity counters, at the transmitter to zero and then allow the counters on individual channels to increment individually. At the receiver, individual channel delays of individual channels will be thus recognizable based on the information provided by the counters associated with each channel. A buffer at the receiver is informed and used to individually delay one or more of the multiple channels to marry up continuity counter values. In this manner, the buffer acts to essentially equalize delays in individual channels with the continuity counter representing the mechanism for specifying the individual delays for the separate channels.

Abstract: A system and method are described to provide a next generation cable gateway/modem based on the DOCSIS standard with a scheme to synchronously combine channels in the physical layer to increase overall bit rates for coaxial cable data transmission. The systems and methods synchronize the counters associated with multiple channels, including continuity counters, at the transmitter to zero and then allow the counters on individual channels to increment individually. At the receiver, individual channel delays of individual channels will be thus recognizable based on the information provided by the counters associated with each channel. A buffer at the receiver is informed and used to individually delay one or more of the multiple channels to many up continuity counter values. In this manner, the buffer acts to essentially equalize delays in individual channels with the continuity counter representing the mechanism for specifying the individual delays for the separate channels.

Abstract: A novel apparatus and method of packet re-sequencing applicable to systems wherein packets are assigned sequence numbers and transmitted over multiple channels with the requirement they be re-ordered at the receiving side. The mechanism is particularly suitable for use in cable systems adapted to implement the DOCSIS 3.0 specification which permits the bonding of a plurality of downstream channels into a single virtual high data rate pipe. In operation, received packets are stored in a memory whereby a pointer to the memory storage location is written into a context table diagram in accordance with the sequence number extracted from the packet. Packets are released in sequence order regardless of the order in which they were received.

Abstract: A novel apparatus and method of packet re-sequencing applicable to systems wherein packets are assigned sequence numbers and transmitted over multiple channels with the requirement they be re-ordered at the receiving side. The mechanism is particularly suitable for use in cable systems adapted to implement the DOCSIS 3.0 specification which permits the bonding of a plurality of downstream channels into a single virtual high data rate pipe. In operation, received packets are stored in a memory whereby a pointer to the memory storage location is written into a context table diagram in accordance with the sequence number extracted from the packet. Packets are released in sequence order regardless of the order in which they were received.