Abstract: An apparatus and configuring scheme where a ferroelectric capacitive input circuit can be programmed to perform different logic functions by adjusting the switching threshold of the ferroelectric capacitive input circuit. Digital inputs are received by respective capacitors on first terminals of those capacitors. The second terminals of the capacitors are connected to a summing node. A pull-up and pull-down device are coupled to the summing node. The pull-up and pull-down devices are controlled separately. During a reset phase, the pull-up and pull-down devices are turned on in a sequence, and inputs to the capacitors are set to condition the voltage on node n1. As such, a threshold for the capacitive input circuit is set. After the reset phase, an evaluation phase follows. In the evaluation phase, the output of the capacitive input circuit is determined based on the inputs and the logic function configured during the reset phase.

Abstract: A device includes, in a first region, a first conductive interconnect, an electrode structure on the first conductive interconnect, where the electrode structure includes a first conductive hydrogen barrier layer and a first conductive fill material. A trench capacitor including a ferroelectric material or a paraelectric material is on the electrode structure. A second dielectric includes an amorphous, greater than 90% film density hydrogen barrier material laterally surrounds the memory device. A via electrode including a second conductive hydrogen barrier material is on at least a portion of the memory device. A second region includes a conductive interconnect structure embedded within a less than 90% film density dielectric material.

Abstract: Asynchronous circuit elements are described. Asynchronous circuit elements include a consensus element (c-element), completion tree, and validity tree. The c-element is implemented using adjustable threshold based multi-input capacitive circuitries. The completion tree comprises a plurality of c-elements organized in a tree formation. The validity tree comprises OR gates followed by c-elements. The multi-input capacitive circuitries include capacitive structures that may comprise linear dielectric, paraelectric dielectric, or ferroelectric dielectric. The capacitors can be planar or non-planar. The capacitors may be stacked vertically to reduce footprint of the various asynchronous circuitries.

Abstract: A configuration for efficiently placing a group of capacitors with one terminal connected to a common node is described. The capacitors are stacked and folded along the common node. In a stack and fold configuration, devices are stacked vertically (directly or with a horizontal offset) with one terminal of the devices being shared to a common node, and further the capacitors are placed along both sides of the common node. The common node is a point of fold. In one example, the devices are capacitors. N number of capacitors can be divided in L number of stack layers such that there are N/L capacitors in each stacked layer. The N/L capacitors are shorted together with an electrode (e.g., bottom electrode). The electrode can be metal, a conducting oxide, or a combination of a conducting oxide and a barrier material. The capacitors can be planar, non-planar or replaced by memory elements.

Abstract: A class of complex logic gates are presented that use non-linear polar material. The logic gates include multi-input majority gates. At least one input to an individual multi-input majority gate is a fixed input. Other inputs are driven to non-linear input capacitors on their respective first terminals. The second terminals of the non-linear input capacitors are coupled a summing node, which provides a majority function of the inputs. The summing node is coupled to a CMOS logic. Leakage through the capacitors is configured such that capacitors of a majority gate have substantially equal leakage, and this leakage has a I-V behavior which is symmetric. As such, reset device(s) on the summing node are not used. The non-linear charge response from the non-linear input capacitors results in output voltages close to or at rail-to-rail voltage levels, which reduces the high leakage problem faced from majority gates that use linear input capacitors.

Abstract: A device includes, in a first region, a first conductive interconnect, an electrode structure on the first conductive interconnect, where the electrode structure includes a first conductive hydrogen barrier layer and a first conductive fill material. A trench capacitor including a ferroelectric material or a paraelectric material is on the electrode structure. A second dielectric includes an amorphous, greater than 90% film density hydrogen barrier material laterally surrounds the memory device. A via electrode including a second conductive hydrogen barrier material is on at least a portion of the memory device. A second region includes a conductive interconnect structure embedded within a less than 90% film density dielectric material.

Abstract: Methods and server systems for computing fraud risk scores for various merchants associated with an acquirer described herein. The method performed by a server system includes accessing merchant-related transaction data including merchant-related transaction indicators associated with a merchant from a transaction database. Method includes generating a merchant-related transaction features based on the merchant-related indicators. Method includes generating via risk prediction models, for a payment transaction with the merchant, merchant health and compliance risk scores, merchant terminal risk scores, merchant chargeback risk scores, and merchant activity risk scores based on the merchant-related transaction features. Method includes facilitating transmission of a notification message to an acquirer server associated with the merchant.

Abstract: A configuration for efficiently placing a group of capacitors with one terminal connected to a common node is described. The capacitors are stacked and folded along the common node. In a stack and fold configuration, devices are stacked vertically (directly or with a horizontal offset) with one terminal of the devices being shared to a common node, and further the capacitors are placed along both sides of the common node. The common node is a point of fold. In one example, the devices are capacitors. N number of capacitors can be divided in L number of stack layers such that there are N/L capacitors in each stacked layer. The N/L capacitors are shorted together with an electrode (e.g., bottom electrode). The electrode can be metal, a conducting oxide, or a combination of a conducting oxide and a barrier material. The capacitors can be planar, non-planar or replaced by memory elements.

Abstract: A device includes, in a first region, a first conductive interconnect, an electrode structure on the first conductive interconnect, where the electrode structure includes a first conductive hydrogen barrier layer and a first conductive fill material. A trench capacitor including a ferroelectric material or a paraelectric material is on the electrode structure. A second dielectric includes an amorphous, greater than 90% film density hydrogen barrier material laterally surrounds the memory device. A via electrode including a second conductive hydrogen barrier material is on at least a portion of the memory device. A second region includes a conductive interconnect structure embedded within a less than 90% film density dielectric material.

Abstract: A pocket integration for high density memory and logic applications and methods of fabrication are described. While various examples are described with reference to FeRAM, capacitive structures formed herein can be used for any application where a capacitor is desired. For instance, the capacitive structure can be used for fabricating ferroelectric based or paraelectric based majority gate, minority gate, and/or threshold gate.

Abstract: Approaches for integrating FE memory arrays into a processor, and the resulting structures are described. Simultaneous integrations of regions with ferroelectric (FE) cells and regions with standard interconnects are also described. FE cells include FE capacitors that include a FE stack of layers, which is encapsulated with a protection material. The protection material protects the FE stack of layers as structures for regular logic are fabricated in the same die.

Abstract: A computer-aided design (CAD) tool is provided for logic optimization and synthesis. The CAD tool executes a process that involves optimizing power, performance, and area (PPA) of a logic circuit by minimizing a number of CMOS gates, and majority and/or minority gates in the circuit and its depth. The CAD tool implements a methodology of optimizing logic synthesis based on a mix of standard cell libraries (such as AND, OR, NAND, NOR, XOR, Multiplexer, full adder, half adder, etc.) and varying input majority and minority gates (where the number of inputs in the minority and majority gates could vary as odd numbers from 3 and above). The standard cell libraries cells may contain minority and/or majority gates.

Abstract: A class of complex logic gates are presented that use non-linear polar material. The logic gates include multi-input majority gates. At least one input to an individual multi-input majority gate is a fixed input. Other inputs are driven to non-linear input capacitors on their respective first terminals. The second terminals of the non-linear input capacitors are coupled a summing node, which provides a majority function of the inputs. The summing node is coupled to a CMOS logic. Leakage through the capacitors is configured such that capacitors of a majority gate have substantially equal leakage, and this leakage has a I-V behavior which is symmetric. As such, reset device(s) on the summing node are not used. The non-linear charge response from the non-linear input capacitors results in output voltages close to or at rail-to-rail voltage levels, which reduces the high leakage problem faced from majority gates that use linear input capacitors.

Abstract: Cosmetic and dermatological compositions, including color changing compositions, are provided which typically include a plurality of synthetic particles having a size in the micrometer or nanometer range. Each synthetic particle typically includes one or more aggregates of a pigment selected from phenoxazone, phenoxazine, and a derivate or precursor thereof, and a stabilizing material which has a refractive index larger than 1.45; the aggregates having a size larger than about 100 nm and the composition being biodegradable and biocompatible.

Abstract: Biologically-inspired compositions, including color changing compositions, and corresponding embodiments such as sensors, textile materials, coatings and films, are provided which typically include a solid, transparent and nondegradable matrix. The matrix contains a plurality of (i) synthetic particles having a size in the micrometer or nanometer range, each synthetic particle including one or more aggregates of a pigment selected from phenoxazone, phenoxazine, and a derivate or precursor thereof, and a stabilizing material which has a refractive index larger than 1.45, the aggregates having a size larger than about 100 nm; or (ii) submicrometer natural particles extracted and purified from homogenized tissue.

Abstract: This disclosure generally relates to compositions with omniphobic properties, and methods of preparing the compositions thereof. The omniphobic compositions can be used as coatings to make omniphobic materials, which can be used to manufacture a variety of apparatuses such as wearable devices, e.g., hearing aids.

Abstract: Cosmetic and dermatological compositions, including color changing compositions, are provided which typically include a plurality of synthetic particles having a size in the micrometer or nanometer range. Each synthetic particle typically includes one or more aggregates of a pigment selected from phenoxazone, phenoxazine, and a derivate or precursor thereof, and a stabilizing material which has a refractive index larger than 1.45; the aggregates having a size larger than about 100 nm and the composition being biodegradable and biocompatible.

Abstract: Processes, scales, and devices to measure and quantify wetness perception in humans. Exemplary devices and scales utilize sensor fusion of temperature and pressure modalities, for which humans have dedicated receptors in the skin, to understand how the perception of wetness comes about. Processes test the utility of wetness perception as a biomarker for assaying peripheral neuropathy. Wetness perception devices include a Peltier module. The temperature of the Peltier module can be varied precisely using a computer-aided feedback system, mounted on a load scale to enable concomitant pressure measurements. Devices may include an insulation chamber with desiccators in place to lower internal humidity and prevent condensation. Wetness perception can be used as a non-invasive biomarker for disease-related peripheral neuropathy in which sensory mechanisms are disrupted.

Abstract: Biologically-inspired compositions, including color changing compositions, and corresponding embodiments such as sensors, textile materials, coatings and films, are provided which typically include a solid, transparent and nondegradable matrix. The matrix contains a plurality of (i) synthetic particles having a size in the micrometer or nanometer range, each synthetic particle including one or more aggregates of a pigment selected from phenoxazone, phenoxazine, and a derivate or precursor thereof, and a stabilizing material which has a refractive index larger than 1.45, the aggregates having a size larger than about 100 nm; or (ii) submicrometer natural particles extracted and purified from homogenized tissue.

Abstract: Cosmetic and dermatological compositions, including color changing compositions, are provided which typically include a plurality of synthetic particles having a size in the micrometer or nanometer range. Each synthetic particle typically includes one or more aggregates of a pigment selected from phenoxazone, phenoxazine, and a derivate or precursor thereof, and a stabilizing material which has a refractive index larger than 1.45; the aggregates having a size larger than about 100 nm and the composition being biodegradable and biocompatible.