Patents by Inventor Amrita Singh

Amrita Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240119457
    Abstract: Methods and server systems for computing fraud risk scores for various merchants associated with an acquirer described herein. The method performed by a server system includes accessing merchant-related transaction data including merchant-related transaction indicators associated with a merchant from a transaction database. Method includes generating a merchant-related transaction features based on the merchant-related indicators. Method includes generating via risk prediction models, for a payment transaction with the merchant, merchant health and compliance risk scores, merchant terminal risk scores, merchant chargeback risk scores, and merchant activity risk scores based on the merchant-related transaction features. Method includes facilitating transmission of a notification message to an acquirer server associated with the merchant.
    Type: Application
    Filed: October 6, 2023
    Publication date: April 11, 2024
    Applicant: MASTERCARD INTERNATIONAL INCORPORATED
    Inventors: Smriti Gupta, Adarsh Patankar, Akash Choudhary, Alekhya Bhatraju, Ammar Ahmad Khan, Amrita Kundu, Ankur Saraswat, Anubhav Gupta, Awanish Kumar, Ayush Agarwal, Brian M. McGuigan, Debasmita Das, Deepak Yadav, Diksha Shrivastava, Garima Arora, Gaurav Dhama, Gaurav Oberoi, Govind Vitthal Waghmare, Hardik Wadhwa, Jessica Peretta, Kanishk Goyal, Karthik Prasad, Lekhana Vusse, Maneet Singh, Niranjan Gulla, Nitish Kumar, Rajesh Kumar Ranjan, Ram Ganesh V, Rohit Bhattacharya, Rupesh Kumar Sankhala, Siddhartha Asthana, Soumyadeep Ghosh, Sourojit Bhaduri, Srijita Tiwari, Suhas Powar, Susan Skelsey
  • Publication number: 20230276718
    Abstract: A semiconductor device is fabricated by: forming a shadow wall on a substrate; subsequently growing a nanowire of semiconductor material on the substrate; and directionally depositing a layer of a further material on the nanowire from a direction selected such that the shadow wall casts a shadow on the nanowire, the shadow being a region in which the further material is not deposited. The nanowire is vertically orientated relative to the substrate. The shadow wall comprises a base portion and a bridge portion. The bridge portion overhangs the substrate and is supported by the base portion. Patterning of the further material may be achieved without the use of etching, thereby avoiding damage to the semiconductor. Also provided is a semiconductor-superconductor hybrid device; a quantum computing device comprising the semiconductor-superconductor hybrid device; and a shadow wall for controlling directional deposition of a material.
    Type: Application
    Filed: July 16, 2020
    Publication date: August 31, 2023
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Amrita Singh, Elvedin Memisevic, Peter Krogstrup Jeppesen
  • Publication number: 20230233245
    Abstract: Various aspects of a generator, ultrasonic device, and method for estimating a state of an end effector of an ultrasonic device are disclsoed. The ultrasonic device includes an electromechanical ultrasonic system defined by a predetermined resonant frequency, including an ultrasonic transducer coupled to an ultrasonic blade. A control circuit measures a complex impedance of an ultrasonic transducer, wherein the complex impedance is defined as Z g ( t ) = V g t I g t . The control circuit receivs a complex impedance measurement data point and compares the complex impedance measurement data point to a data point in a reference complex impedance characteristic pattern. The control circuit then classifies the complex impedance measurement data point based on a result of the comparison analysis and assigns a state or condition of the end effector based on the result of the comparison analysis.
    Type: Application
    Filed: October 10, 2022
    Publication date: July 27, 2023
    Inventors: Cameron R. Nott, Foster B. Stulen, Fergus P. Quigley, John E. Brady, Gregory A. Trees, Amrita Singh Sawhney, Rafael J. Ruiz Ortiz, Patrick J. Scoggins, Kristen G. Denzinger, Craig N. Faller, Madeleine C. Jayme, Alexander R. Cuti, Matthew S. Schneider, Chad P. Boudreaux, Brian D. Black, Maxwell T. Rockman, Gregory D. Bishop, Frederick E. Shelton, IV, David C. Yates
  • Publication number: 20230147168
    Abstract: One aspect provides semiconductor-superconductor hybrid device comprises a substrate, a first semiconductor component arranged on the substrate, a superconductor component arranged to be capable of energy level hybridisation with the first semiconductor component, and a second semiconductor component arranged as a gate electrode for gating the first semiconductor component. Another aspect provides a semiconductor-superconductor hybrid device, comprising: a substrate; a semiconductor component arranged on the substrate; a gate electrode for gating the semiconductor component; and a superconductor component capable of undergoing energy level hybridisation with the semiconductor component; wherein the gate electrode is arranged in a channel in the substrate. Also provided are methods of fabricating the semiconductor-superconductor hybrid devices.
    Type: Application
    Filed: March 31, 2020
    Publication date: May 11, 2023
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Marina QUINTERO PÉREZ, David Johannes VAN WOERKOM, Vinay Kumar CHINNI, Amrita SINGH
  • Publication number: 20230106283
    Abstract: A shadow wall for controlling directional deposition of a material is arranged on a substrate. The shadow wall comprises a base portion and a bridge portion. The base portion is arranged on the substrate and is configured to support the bridge portion. The bridge portion overhangs the substrate. The shadow wall may have improved compatibility with non-directional deposition processes, because adatoms on the surface of the substrate may diffuse under the bridge. Also provided are a method of fabricating a device using the shadow wall, and a method of fabricating the shadow wall.
    Type: Application
    Filed: February 28, 2020
    Publication date: April 6, 2023
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Elvedin MEMISEVIC, Amrita SINGH, Pavel ASEEV
  • Publication number: 20230046728
    Abstract: In some embodiments, the invention relates to methods and reagents for the identification of compounds that traverse he cell membrane of an animal cell. In some embodiments, the invention provides additional methods for determining if a candidate compound that traverses an animal cell membrane is able to modulate an intracellular target, as well as reagents and kits for reagents and kits for performing the disclosed methods.
    Type: Application
    Filed: December 11, 2020
    Publication date: February 16, 2023
    Inventors: Amrita Singh Chandhoke, James Andrew Madsen, Yue-Mei Zhang, John Hanney McGee, Marco Peter Fekkes
  • Patent number: 11571234
    Abstract: A generator, ultrasonic device, and method of determining a temperature of an ultrasonic blade are disclosed. A control circuit coupled to a memory determines an actual resonant frequency of an ultrasonic electromechanical system comprising an ultrasonic transducer coupled to an ultrasonic blade by an ultrasonic waveguide. The actual resonant frequency is correlated to an actual temperature of the ultrasonic blade. The control circuit retrieves from the memory a reference resonant frequency of the ultrasonic electromechanical system. The reference resonant frequency is correlated to a reference temperature of the ultrasonic blade. The control circuit then infers the temperature of the ultrasonic blade based on the difference between the actual resonant frequency and the reference resonant frequency.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: February 7, 2023
    Assignee: Cilag GmbH International
    Inventors: Cameron R. Nott, Fergus P. Quigley, Amrita Singh Sawhney, Stephen M. Leuck, Brian D. Black, Eric M. Roberson, Patrick J. Scoggins, Craig N. Faller, Madeleine C. Jayme, Jacob S. Gee, Frederick E. Shelton, IV, David C. Yates
  • Publication number: 20230008296
    Abstract: A method of fabricating a hollow wall for controlling directional deposition of material comprises: forming a layer of resist on a substrate; removing a portion of the resist selectively to form a channel in the resist; forming a layer of an amorphous dielectric material in the channel; and removing the resist to form the hollow wall. The channel has a front surface configured to prevent bending of a corresponding front face of the hollow wall. The hollow wall is useful for controlling deposition of material when fabricating semiconductor-superconductor hybrid devices, for example. By configuring the channel appropriately, bending of the hollow wall can be prevented, allowing for more precise deposition of material. Also provided is a further method of fabricating a hollow wall; and a method of fabricating a device using the hollow walls.
    Type: Application
    Filed: December 5, 2019
    Publication date: January 12, 2023
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Pavel ASEEV, Ekaterina CHERNYSHEVA, Amrita SINGH, Guanzhong WANG
  • Patent number: 11464559
    Abstract: Various aspects of a generator, ultrasonic device, and method for estimating a state of an end effector of an ultrasonic device are disclosed. The ultrasonic device includes an electromechanical ultrasonic system defined by a predetermined resonant frequency, including an ultrasonic transducer coupled to an ultrasonic blade. A control circuit measures a complex impedance of an ultrasonic transducer, wherein the complex impedance is defined as Z g ? ( t ) = V g ? ( t ) I g ? ( t ) . The control circuit receives a complex impedance measurement data point and compares the complex impedance measurement data point to a data point in a reference complex impedance characteristic pattern. The control circuit then classifies the complex impedance measurement data point based on a result of the comparison analysis and assigns a state or condition of the end effector based on the result of the comparison analysis.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: October 11, 2022
    Assignee: Cilag GmbH International
    Inventors: Cameron R. Nott, Foster B. Stulen, Fergus P. Quigley, John E. Brady, Gregory A. Trees, Amrita Singh Sawhney, Rafael J. Ruiz Ortiz, Patrick J. Scoggins, Kristen G. Denzinger, Craig N. Faller, Madeleine C. Jayme, Alexander R. Cuti, Matthew S. Schneider, Brian D. Black, Maxwell Rockman, Gregory D. Bishop, Frederick E. Shelton, IV, David C. Yates
  • Publication number: 20220288131
    Abstract: The present invention generally relates to novel mesoderm-derived vascular progenitor cells (meso-VPCs) and methods of producing the meso-VPCs. The present invention also relates to methods of treating a vascular disease, such as critical limb ischemia, by administering the meso-VPCs into a subject.
    Type: Application
    Filed: August 27, 2020
    Publication date: September 15, 2022
    Inventors: Maria Mirotsou, Nutan Prasain, Amrita Singh, Robert Lanza
  • Publication number: 20220280572
    Abstract: The present invention provides methods for treating vascular diseases with hemogenic endothelial cells (HEs) obtained in vitro from pluripotent stem cells. The present invention also provides compositions and methods of producing the HEs.
    Type: Application
    Filed: August 27, 2020
    Publication date: September 8, 2022
    Inventors: Nagisa Sakurai, Maria Mirotsou, Nutan Prasain, Amrita Singh, Robert Lanza
  • Publication number: 20220227999
    Abstract: The present invention relates to an unsymmetrical squaraine dye of formula (I) and process for the preparation thereof. Further, the present invention relates to an electronic device with an enhanced device efficiency containing a dye of formula (I) co-sensitized with a sqaurine dye.
    Type: Application
    Filed: March 17, 2022
    Publication date: July 21, 2022
    Inventors: Jayaraj Nithyanandhan, Ambarish Kumar Singh, Amrita Singh
  • Publication number: 20210296560
    Abstract: There is provided a method of selectively patterning a device structure. A hollow shadow wall is formed on a substrate. The hollow shadow wall is formed of a base lying on a surface of the substrate, and one or more side walls connected to the base. The one or more side walls extend away from the surface of the substrate and around the base to define an internal cavity of the hollow shadow wall. A device structure supported by the substrate adjacent to the shadow wall is selectively patterned by using a deposition beam to selectively deposit a layer of deposition material on the device structure. The deposition beam has a non-zero angle of incidence relative to a normal to the surface of the substrate and an orientation in the plane of the substrate's surface, such that the shadow wall prevents deposition on a surface portion of the device structure within a shadow region defined by the shadow wall.
    Type: Application
    Filed: May 27, 2021
    Publication date: September 23, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Senja Ramakers, Pavel Aseev, Amrita Singh, Jie Shen, Leonardus P. Kouwenhoven
  • Patent number: 11024792
    Abstract: There is provided a method of selectively patterning a device structure. A hollow shadow wall is formed on a substrate. The hollow shadow wall is formed of a base lying on a surface of the substrate, and one or more side walls connected to the base. The one or more side walls extend away from the surface of the substrate and around the base to define an internal cavity of the hollow shadow wall. A device structure supported by the substrate adjacent to the shadow wall is selectively patterned by using a deposition beam to selectively deposit a layer of deposition material on the device structure. The deposition beam has a non-zero angle of incidence relative to a normal to the surface of the substrate and an orientation in the plane of the substrate's surface, such that the shadow wall prevents deposition on a surface portion of the device structure within a shadow region defined by the shadow wall.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: June 1, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Senja Ramakers, Pavel Aseev, Amrita Singh, Jie Shen, Leonardus P. Kouwenhoven
  • Publication number: 20200243742
    Abstract: There is provided a method of selectively patterning a device structure. A hollow shadow wall is formed on a substrate. The hollow shadow wall is formed of a base lying on a surface of the substrate, and one or more side walls connected to the base. The one or more side walls extend away from the surface of the substrate and around the base to define an internal cavity of the hollow shadow wall. A device structure supported by the substrate adjacent to the shadow wall is selectively patterned by using a deposition beam to selectively deposit a layer of deposition material on the device structure. The deposition beam has a non-zero angle of incidence relative to a normal to the surface of the substrate and an orientation in the plane of the substrate's surface, such that the shadow wall prevents deposition on a surface portion of the device structure within a shadow region defined by the shadow wall.
    Type: Application
    Filed: January 25, 2019
    Publication date: July 30, 2020
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Senja Ramakers, Pavel Aseev, Amrita Singh, Jie Shen, Leonardus P. Kouwenhoven
  • Publication number: 20190201073
    Abstract: Various aspects of a generator, ultrasonic device, and method for estimating a state of an end effector of an ultrasonic device are disclosed. The ultrasonic device includes an electromechanical ultrasonic system defined by a predetermined resonant frequency, including an ultrasonic transducer coupled to an ultrasonic blade. A control circuit measures a complex impedance of an ultrasonic transducer, wherein the complex impedance is defined as Z g ? ( t ) = V g ? ( t ) I g ? ( t ) . The control circuit receives a complex impedance measurement data point and compares the complex impedance measurement data point to a data point in a reference complex impedance characteristic pattern. The control circuit then classifies the complex impedance measurement data point based on a result of the comparison analysis and assigns a state or condition of the end effector based on the result of the comparison analysis.
    Type: Application
    Filed: August 28, 2018
    Publication date: July 4, 2019
    Inventors: Cameron R. Nott, Foster B. Stulen, Fergus P. Quigley, John E. Brady, Gregory A. Trees, Amrita Singh Sawhney, Rafael J. Ruiz Ortiz, Patrick J. Scoggins, Kristen G. Denzinger, Craig N. Faller, Madeleine C. Jayme, Alexander R. Cuti, Matthew S. Schneider, Chad P. Boudreaux, Brian D. Black, Maxwell Rockman, Gregory D. Bishop, Frederick E. Shelton, IV, David C. Yates
  • Publication number: 20190201036
    Abstract: A generator, ultrasonic device, and method of determining a temperature of an ultrasonic blade are disclosed. A control circuit coupled to a memory determines an actual resonant frequency of an ultrasonic electromechanical system comprising an ultrasonic transducer coupled to an ultrasonic blade by an ultrasonic waveguide. The actual resonant frequency is correlated to an actual temperature of the ultrasonic blade. The control circuit retrieves from the memory a reference resonant frequency of the ultrasonic electromechanical system. The reference resonant frequency is correlated to a reference temperature of the ultrasonic blade. The control circuit then infers the temperature of the ultrasonic blade based on the difference between the actual resonant frequency and the reference resonant frequency.
    Type: Application
    Filed: August 28, 2018
    Publication date: July 4, 2019
    Inventors: Cameron R. Nott, Fergus P. Quigley, Amrita Singh Sawhney, Stephen M. Leuck, Brian D. Black, Eric M. Roberson, Patrick J. Scoggins, Craig N. Faller, Madeleine C. Jayme, Jacob S. Gee, Frederick E. Shelton, IV, David C. Yates