Patents by Inventor Amy W. K. Liu

Amy W. K. Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Stacking fault and twin blocking barrier for integrating III-V on Si
    Publication number: 20080032478
    Abstract: A stacking fault and twin blocking barrier for forming a III-V device layer on a silicon substrate and the method of manufacture is described. Embodiments of the present invention enable III-V InSb device layers with defect densities below 1×108 cm?2 to be formed on silicon substrates. In an embodiment of the present invention, a buffer layer is positioned between a III-V device layer and a silicon substrate to glide dislocations. In an embodiment of the present invention, GaSb buffer layer is selected on the basis of lattice constant, band gap, and melting point to prevent many lattice defects from propagating out of the buffer into the III-V device layer. In a specific embodiment, a III-V InSb device layer is formed directly on the GaSb buffer.
    Type: Application
    Filed: August 2, 2006
    Publication date: February 7, 2008
    Inventors: Mantu K. Hudait, Mohamad A. Shaheen, Loren A. Chow, Peter G. Tolchinsky, Joel M. Fastenau, Dmitri Loubychev, Amy W.K. Liu