Abstract: Nanostructured model device of energy sensing and monitoring apparatus comprises arrays of orderly nanotubes parallel oriented forming 3D cross-bar with vertically oriented nanopillars membrane through self-assembly affixed onto an electrode; the membrane comprises active sites of an innate Heat Shock Protein (HSP) cross-linked with conductive polymers on an electrode to be able to monitor toxic protein ?-amyloid (A?) energy landscape change, and the reversed membrane potential was restored in the presence of an antibiotic drug. By depositing the HSP60 polymer mixtures on a top of a MMP-2 membrane, it promoted a moonlighting protein network that was able to 97.3% impaired A? refolding with imprecision 0.05%, which was not depending on antibiotic drug's concentration, wherein to be able to maintain the RMP.

Abstract: Disclosed is a blockage-proof water diversion and drainage device for highway tunnel construction. The device may include an inlet cleaning component, a diversion component connected to a bottom of the inlet cleaning component, a debris collection component connected to an end of the diversion component close to the inlet cleaning component, and a pre-storage component connected to a bottom of the diversion component. An outlet end of the pre-storage component may be connected to the debris collection component. An openable baffle component and a screen plate may be provided inside a main pipe of the diversion component which can transfer filtered sludge and other debris to the debris collection component, keeping the main pipe clean, maintaining the drainage speed of accumulated water, and reducing the frequency of manual cleaning. Additionally, the device can scrape and clean a surface of the screen plate to prevent blocked, thus extending device maintenance time.

Abstract: An electronic device including a first substrate, a semiconductor layer, a second substrate and a color filter is disclosed. The first substrate has a peripheral region. The semiconductor layer is disposed on the first substrate in the peripheral region. The second substrate is opposite to the first substrate. The color filter is disposed between the first substrate and the second substrate and in the peripheral region of the first substrate, and the color filter overlaps the semiconductor layer.

Abstract: An automatic generation method for a robot return-to-base code includes the following steps that: on the basis of a preset signal collection mode, a robot collects a guide signal which is sent by a charging base and distributed within a preset range (S1); the robot transmits signal information and position information of the robot recorded when the guide signal is collected to a data processing device (S2); and the data processing device generates a robot return-to-base code corresponding to the charging base according to the received signal information and position information (S3). By means of the information collected by the robot in different modes, the data processing device automatically generates, according to the information, the robot return-to-base code corresponding to the charging base, so that research and development personnel do not need to delve into a robot return-to-base algorithm or write a specific return-to-base code.

Abstract: An integrated circuit structure includes a first capacitor structure, disposed in a first layer on a semiconductor substrate and comprising a plurality of capacitors; a second capacitor structure, adjacent to first capacitor structure in the first layer, wherein the second capacitor structure and the first capacitor structure are arranged as a strip-shaped structure; a first conductive plate, disposed at one end of the strip-shaped structure in the first layer; and a second conductive plate, disposed in a second layer on the semiconductor substrate over the strip-shaped structure and extending toward the other end of the strip-shaped structure from the one end of the strip-shaped structure.

Abstract: Disclosed is a light-emitting diode which includes a light-emitting epitaxial layered unit, an insulation layer, a transparent conductive layer, a protective layer, a first electrode, and a second electrode. The light-emitting epitaxial layered unit includes a first semiconductor layer, a second semiconductor layer, and a light-emitting layer sandwiched between the first and second semiconductor layers, and has a first electrode region which includes a pad area and an extension area. The insulation layer is disposed on the first semiconductor layer and at the extension area of the first electrode region. Also disclosed is a method for manufacturing the light-emitting diode.

Abstract: Systems and methods are provided for sample processing. A device may be provided, capable of receiving the sample, and performing one or more of a sample preparation, sample assay, and detection step. The device may be capable of performing multiple assays. The device may comprise one or more modules that may be capable of performing one or more of a sample preparation, sample assay, and detection step. The device may be capable of performing the steps using a small volume of sample.

Abstract: A method for forging a niobium-tungsten alloy forged ring, including: (S1) subjecting an alloy ingot to turning, chamfering, spraying with an anti-oxidation coating, stainless-steel sheathing, heating and upsetting to obtain a primary pancake with a flat-die hammer, rapid-forging press or hydraulic press; (S2) subjecting an inner pole to wire electrical discharge machining to obtain a ring blank followed by machining to remove the stainless-steel sheath and oxide scale and defects; and subjecting the ring blank to fluorescent/dye penetrant inspection followed by vacuum stress-relief annealing; (S3) subjecting the ring blank to core shaft/saddle forging on the flat-die hammer or rapid-forging press to obtain a crude forged ring; and (S4) subjecting the crude forged ring to vacuum recrystallization annealing to obtain a desired forged ring.

Abstract: A method for forming a semiconductor structure is provided. The method includes forming first and second fin structures, wherein each of the first and the second fin structurez include first semiconductor layers and second semiconductor layers alternatingly stacked, and forming a first mask structure to cover the second fin structure. The first mask structure includes a first dielectric layer and a second dielectric layer over the first mask structure, and the first dielectric layer and the second dielectric layer are made of different materials. The method also includes forming a first source/drain feature in the first fin structure, removing the first mask structure, forming a second source/drain feature in the second fin structure, removing the first semiconductor layers of the first fin structure and the second fin structure, thereby forming first nanostructures and second nanostructures, and forming a gate stack around the first and second nanostructures.

Abstract: The invention provides a tea fiber/PHBV/PBAT ternary composite and its preparation method and application. Comprising the components in parts by weight, the composite contains 30-80 parts of a blending polymer of poly(butyleneadipate-co-terephthalate) (PBAT) and poly(3-hydroxybutyrate-co-3-hydroxyvalerate) (PHBV), 20-70 parts of tea powder, 1-19 parts of a plasticizer, 0.6-6 parts of an interface modifier, 3.3-10 parts of an auxiliary packing and 0.7-2 parts of a nucleating agent. The composite is environmental-friendly and cost-effective, exhibiting excellent mechanical properties such as hardness, compressive strength, and ductility. It can be used to manufacture environmental-friendly cups, tableware, compost bags, trash bags, shopping bags, electronic packaging bags, mulch films, 3D printing materials, foaming materials, and other plastic products.

Abstract: A semiconductor device includes a substrate, an isolation structure, a first gate structure, a second gate structure, a first slot contact structure, a first gate contact structure, and a second gate contact structure. The substrate includes a first active region and a second active region elongated in a first direction respectively. The first gate structure, the second gate structure, and the first slot contact structure are continuously elongated in a second direction respectively. The first gate contact structure and the second gate contact structure are disposed at two opposite sides of the first slot contact structure in the first direction respectively.

Abstract: The disclosure is directed towards semiconductor devices and methods of manufacturing the semiconductor devices. The methods include forming fins in a device region and forming other fins in a multilayer stack of semiconductor materials in a multi-channel device region. A topmost nanostructure may be exposed in the multi-channel device region by removing a sacrificial layer from the top of the multilayer stack. Once removed, a stack of nanostructures are formed from the multilayer stack. A native oxide layer is formed to a first thickness over the topmost nanostructure and to a second thickness over the remaining nanostructures of the stack, the first thickness being greater than the second thickness. A gate dielectric is formed over the fins in the device region. A gate electrode is formed over the gate dielectric in the device region and surrounding the native oxide layer in the multi-channel device region.

Abstract: An optical lens assembly includes seven lens elements which are, in order from object side to image side: first lens element, second lens element, third lens element, fourth lens element, fifth lens element, sixth lens element and seventh lens element. The first lens element has object-side surface having at least one convex shape in off-axis region thereof. The second lens element with positive refractive power has object-side surface being convex in paraxial region thereof. The third lens element has image-side surface being convex in paraxial region thereof. The sixth lens element with positive refractive power has object-side surface being convex in paraxial region thereof. The seventh lens element has image-side surface being concave in paraxial region thereof, and the image-side surface of the seventh lens element has at least one convex critical point in off-axis region thereof. The optical lens assembly has a total of seven lens elements.

Abstract: Various implementations described herein are directed to a device having memory circuitry having multi-port bitcells, wherein each bitcell of the multi-port bitcells has a read-write port and a read port. The device may have read-write circuitry coupled to the read-write port, wherein the read-write circuitry has write-drive logic and read-sense logic that provide for at least one write and at least one read in a single clock cycle.

Abstract: An unmanned aerial vehicle cluster system, a method, apparatus, and system of launching, and a readable medium. The unmanned aerial vehicle cluster includes a plurality of unmanned aerial vehicles located in a launch area. The method of launching the unmanned aerial vehicle cluster includes: acquiring (S210) launch positions for the plurality of unmanned aerial vehicles in the launch area; acquiring (S220) an assembly area which corresponds to the launch area and includes a plurality of target positions; determining (S230) a target position for each unmanned aerial vehicle of the plurality of unmanned aerial vehicles according to the launch positions for the plurality of unmanned aerial vehicles and the plurality of target positions; and launching (S240) the plurality of unmanned aerial vehicles according to the launch position for each unmanned aerial vehicle of the plurality of unmanned aerial vehicles and the target position for each unmanned aerial vehicle.

Abstract: Embodiments relate to a display device with subpixels that share switch transistors that selectively connect sources of driving transistors to a high voltage source. Further, part of reset transistors or part of a select transistor may be shared across multiple subpixels. The reset transistor selectively connects an anode of an organic light emitting diode (OLED) to a low voltage source. The select transistor selectively passes through pixel data from a data line when a gate signal is received via a gate line. Driver transistors and capacitors of the subpixels are independent and not shared. In this way, the dimensions of the subpixels may be reduced and enable increase in the density of the pixels.

Abstract: Methods and apparatuses for video coding are provided. The method includes that a decoder receives a first syntax element in picture parameter sets (PPS) specifying whether a picture corresponding to the PPS comprises one or more network abstraction layer (NAL) units and whether the one or more NAL units have a same NAL unit type, receives a second syntax element in a picture header (PH) specifying whether the picture corresponding to the PH is an intra random access point (IRAP) picture or a gradual intra refreshing (GDR) picture, and determines a value of the first syntax element based on a value of the second syntax element or determines the value of the second syntax element based on the value of the first syntax element.