Abstract: A mobile device is disclosed. The device includes a communicator, a GPS unit for calculating location information, a memory, a display, and a processor, and the processor is configured to generate movement path information of the mobile device by performing homomorphic encryption of a plurality of pieces of location information stored in the memory, transmit the movement path information to a server apparatus through the communicator, based on operation result data obtained by operating based on the movement path information and comparison target path information being transmitted from the server apparatus, decrypt the operation result data, and output a message notifying whether a route overlaps the comparison target path information based on a decrypted result through the display. Therefore, the route overlap is rapidly and accurately confirmed without invasion of privacy.

Abstract: The present disclosure relates to a method for preparing a mordenite zeolite, the method including crystallizing, at a temperature of 150° C. to 190° C., a gel which includes, in mol based on 1 mol of silica, 0.02 to 0.2 of an alumina precursor, 0.01 to 0.04 of a structure-directing agent, 0.1 to 0.18 of a pH control agent, and 10 to 100 of water. According to the present disclosure, a mordenite zeolite having high particle size uniformity and a particle size controllable while maintaining the particle size uniformity may be prepared.

Abstract: Disclosed are a pouch exterior capable of easily mounting an electrode assembly at an accurate position between accommodating parts, having an integrated form to minimize sealing parts contacting the air and to increase a lifetime of a battery, capable of preventing a rupture of the pouch exterior in an assembly process, and capable of increasing an energy density of a cell, a pouch-type secondary battery using the pouch exterior, and a method of manufacturing the pouch-type secondary battery. A pouch exterior for a secondary battery, according to the present disclosure, includes two corresponding accommodating parts configured to mount an electrode assembly therebetween and symmetrically formed at both sides by disposing a protruding part therebetween, and is folded along two folding lines outside a center pan of the protruding part by vertically mounting a side surface of the electrode assembly on the protruding part, such that folded parts surround side edges of the electrode assembly.

Abstract: According to some aspects of the disclosure, an organic light-emitting display device including a display panel including a driving thin film transistor (TFT), comprises a sensing unit configured to perform a sensing operation for external compensation of the display panel, and an analog-digital converter (ADC) configured to perform a conversion operation of converting an analog value held in the sensing unit into a digital value, wherein the sensing unit comprises a basic sensing unit configured to perform a sensing operation on the driving TFT, and a dummy sensing unit configured to perform a sensing operation on changes in a gain and an offset of the ADC, and the basic sensing unit and the dummy sensing unit are in a cascade connection to each other.

Abstract: A lighting device includes a light guide plate configured to guide and diffuse a light from a light source, and a garnish body including a lighting area to which the diffused light is radiated, wherein the light guide plate is disposed at a predetermined angle with respect to the garnish body.

Abstract: The present invention relates to a method of controlling a flexible thermoelectric element to provide dynamic thermal therapy, and to a dynamic thermal therapy device, wherein the flexible thermoelectric element has a plurality of thermoelectric modules, each corresponding to a plurality of regions arranged sequentially, wherein the plurality of thermoelectric modules can selectively perform either exothermic or endothermic operation on the plurality of regions by control of a current.

Abstract: The liquefied gas storage tank includes a primary barrier, a primary insulation wall, a secondary barrier, and a secondary insulation wall. In a state where unit elements are arranged adjacent to each other, each of the unit elements being formed by stacking the secondary insulation wall, the secondary barrier, and a fixed insulation wall which is a part of the primary insulation wall, the primary insulation wall may comprise: a connection insulation wall provided in the space between the adjacent fixed insulation walls; first slits formed between the fixed insulation walls and the connection insulation wall when the connection insulation wall is inserted and installed between the adjacent fixed insulation walls; a plurality of second slits formed in a lengthwise direction and a widthwise direction of the fixed insulation walls; and a first insulating filler material for filling the first slits.

Abstract: A method for isolating proteins from prokaryotes is disclose. The method enables easy break down of bacterial cell walls to obtain intact proteins without damage by a simple process of adding organic solvents including lower alcohols or nitrile derivatives; or applying osmotic stimulation to samples containing pathogenic bacteria or the like. The method may be usefully applied to rapid and accurate identification of periplasmic proteins of gram-negative bacteria without additional purification process.

Abstract: A semiconductor device includes a plurality of gate electrodes spaced apart from each other in a vertical direction on a substrate, a plurality of channel structures respectively penetrating a plurality of gate electrodes and extending in the vertical direction, each comprising a channel layer having a stacked structure of a first oxide semiconductor channel layer and a second oxide semiconductor channel layer which have different conductivities, and a gate insulating layer disposed between the channel layer and each of the plurality of gate electrodes, and a plurality of bit lines disposed on the plurality of channel structures and respectively connected to the plurality of channel structures, and the gate insulating layer, the first oxide semiconductor channel layer, and the second oxide semiconductor channel layer are sequentially disposed.

Abstract: Disclosed is an accelerator which includes a first to a K-th stage performing an NTT (Number Theoretic Transform) operation of first input data including a polynomial of a homomorphic ciphertext, the first to K-th stages being connected in series, and a first assist circuit generating a first to a K-th enable signal based on a degree of the polynomial of the first input data. Each of the first to K-th stages performs a butterfly operation of the first input data or corresponding output data of a previous stage in response to that the corresponding enable signal among the first to K-th enable signals indicates a first logical value, and bypasses the first input data or the corresponding output data of the previous stage in response to that the corresponding enable signal among the first to K-th enable signals indicates a second logical value.

Abstract: In a method of generating a secret key according to an embodiment, a share of each of a user and a plurality of other users for a secret key of the user are generated, the share of each of the plurality of other users is provided to a user terminal of each of the plurality of other users, a share of the user for a secret key of each of the plurality of other users is received from the user terminal of each of the plurality of other users, and a new secret key of the user is generated using the share of the user for the secret key of the user and the shares of the user for the secret key of each of the plurality of other users.

Abstract: Embodiments of the current disclosure to provide a display device which can reduce the number of intersections of scan lines and data lines. According to an embodiment of the disclosure, a display device comprises: a substrate; scan lines extending along a first direction; data lines extending along a second direction that intersect the first direction; a first switching element; a first pixel electrode connected to a first source electrode of the first switching element; a second switching element; and a second pixel electrode connected to a second source electrode of the second switching element. The first pixel electrode and the second pixel electrode are disposed along the second direction, and a first source electrode and a first drain electrode of the first switching element extend along the second direction in an area overlapping a first active layer of the first switching element.

Abstract: A method of manufacturing a semiconductor device is provided including the operations of forming a peripheral circuit structure including a substrate, circuit elements on the substrate, and interconnections on the circuit elements. The method includes forming a plate layer on the peripheral circuit structure, forming a preliminary stack structure by alternately stacking sacrificial layers and interlayer insulating layers on the plate layer in a first direction perpendicular to an upper surface of the plate layer, and patterning the stack structure to form a stepped structure to form patterned sacrificial layers and patterned interlayer insulating layers. The method includes forming deposition inhibition layers on exposed surfaces of the patterned interlayer insulating layers, forming selective deposition layers on exposed surfaces of the patterned sacrificial layers, forming channel structures penetrating through the preliminary stack structure in the first direction, and contacting the plate layer.

Abstract: An inkjet head unit capable of performing high-resolution pixel printing on a large-size substrate and a substrate treatment apparatus including the inkjet head unit are provided. The substrate treatment apparatus includes: a processing unit supporting and moving a substrate; an inkjet head unit performing pixel printing on the substrate; and a gantry unit moving the inkjet head unit over the substrate, wherein the inkjet head unit includes head packs, which include a plurality of nozzles ejecting a substrate treatment liquid onto the substrate, and a head base, in which the head packs are installed and the head packs are disposed in a single row in the head base.

Abstract: An image processing apparatus applies an image to a first learning network model to optimize the edges of the image, applies the image to a second learning network model to optimize the texture of the image, and applies a first weight to the first image and a second weight to the second image based on information on the edge areas and the texture areas of the image to acquire an output image.

Abstract: Provided are an image processing apparatus and an operation method of the image processing apparatus. The image processing apparatus includes a memory storing one or more instructions, and a processor configured to execute the one or more instructions stored in the memory to, by using one or more convolution neural networks, extract target features by performing a convolution operation between features of target regions having same locations in a plurality of input images and a first kernel set, extract peripheral features by performing a convolution operation of features of peripheral regions located around the target regions in the plurality of input images and a second kernel set, and determine a feature of a region corresponding to the target regions in an output image, based on the target features and the peripheral features.

Abstract: A flexible flat cable according to various embodiments of the disclosure may include a first insulation layer having a plate shape, a first conductive pattern disposed on the first insulation layer, a second conductive pattern disposed on the first insulation layer to be spaced apart from the first conductive pattern at a predetermined interval, a second insulation layer covering at least a portion of the first conductive pattern and disposed on the first insulation layer to cover the first conductive pattern, a first shield member including a first shield layer disposed on the first insulation layer and the second insulation layer to cover the first conductive pattern and the second conductive pattern, and a second shield layer disposed on the first shield layer to cover the first shield layer, and a third insulation layer surrounding the first shield layer such that at least a portion of the first shield layer of the first shield member, which is exposed between the first insulation layer and the second shi

Abstract: The present disclosure provides a reducer for an electric vehicle, the reducer including an input shaft connected to a motor, a differential disposed coaxially with the input shaft and relatively rotatable, a planetary gear train configured to decelerate power of the input shaft and transmit the power to a differential casing of the differential, and a drive shaft configured to penetrate the input shaft and coupled to one side gear of the differential.

Abstract: An automated method for generating a prosthesis from a 3D scan data, the method includes automatically extracting tooth information of a tooth included in the 3D scan data from the 3D scan data, automatically extracting a margin line of a prepared tooth, generating a plurality of two dimensional (“2D”) images including the prepared tooth and an adjacent tooth adjacent to the prepared tooth, automatically generating a 3D temporary prosthesis data based on the plurality of 2D images and deforming a single tooth model corresponding to the prepared tooth using the margin line and the 3D temporary prosthesis data to generate a 3D prosthesis data.

Abstract: A semiconductor device includes a conductive pattern, an insulating pattern, a channel film extending in a vertical direction inside a channel hole, a charge trap pattern between the conductive pattern and the channel film inside the channel hole, a tunneling dielectric film between the charge trap pattern and the channel film, and a blocking dielectric film extending between the conductive pattern and the charge trap pattern and between the insulating pattern and the tunneling dielectric film. The insulating pattern includes a first insulating pattern overlapping the conductive pattern in the vertical direction and a second insulating pattern protruding in the lateral direction from the first insulating pattern into the channel hole and toward the channel film. The first insulating pattern has a first dielectric constant, and the second insulating pattern has a second dielectric constant that is lower than the first dielectric constant.