Patents by Inventor An Cheon

An Cheon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11004860
    Abstract: A method for fabricating a non-volatile memory device is provided. The method includes forming a channel hole and a first contact hole simultaneously, several times, in order to achieve a desired a high aspect ratio.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: May 11, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seok Cheon Baek, Geun Won Lim
  • Publication number: 20210135222
    Abstract: The present invention relates to a device and a method of preparing a SiOx, and a SiOx anode material, and more particularly, to a device and a method of preparing a SiOx, in which a SiOx is prepared by reacting liquid silicon and solid silicon dioxide in one or more crucibles, and a metal raw material is simultaneously supplied during SiOx preparing to continuously prepare a metal-SiOx in a single process, and a SiOx anode material.
    Type: Application
    Filed: December 11, 2020
    Publication date: May 6, 2021
    Applicant: TERA TECHNOS CO., LTD
    Inventors: Jae Woo LEE, Jin Gee PARK, Sun Ho CHOI, Jung Hoon CHEON
  • Publication number: 20210129030
    Abstract: The present invention relates to an advertising method and system that when a service of a card game is provided to member customers online by using a deck of playing cards in which an advertisement is converted into a story, provide an inseparable relationship between a game and an advertisement, thereby allowing players participating in the game to enjoy the advertisement contained in the playing cards together with the game in an amusing and interesting manner. According to an embodiment of the present invention, there is provided a system for advertising through a playing card game, in which a plurality of player terminals connects with a game server over a network and plays a game using a deck of playing cards (hereinafter “cards”) created by converting an advertisement into a story.
    Type: Application
    Filed: January 17, 2019
    Publication date: May 6, 2021
    Inventors: Beoung Cheon KIM, Bae Rim KIM
  • Publication number: 20210134806
    Abstract: A semiconductor device includes a substrate including first and second region, a bit line structure on the first region, key structures on the second region, each key structure having an upper surface substantially coplanar with an upper surface of the bit line structure, a first trench disposed between two adjacent key structures spaced apart from each other in a first direction, a filling pattern in a lower portion of the first trench, the filling pattern having a flat upper surface and including a first conductive material, and a first conductive structure on the flat upper surface of the filling pattern, an upper sidewall of the first trench, and the upper surface of each of the plurality of key structures, the first conductive structure including a second conductive material.
    Type: Application
    Filed: June 16, 2020
    Publication date: May 6, 2021
    Inventors: Yanghee Lee, Jonghyuk Park, Ilyoung Yoon, Boun Yoon, Heesook Cheon
  • Publication number: 20210129122
    Abstract: Disclosed are a catalyst and a preparation method therefor, the catalyst being able to maintain a high production yield of C8 aromatic hydrocarbons in the process of converting a feedstock containing alkyl aromatics to C8 aromatic hydrocarbons such as mixed xylene through disproportionation/transalkylation/dealkylation while reducing a content of ethylbenzene in the products.
    Type: Application
    Filed: October 29, 2020
    Publication date: May 6, 2021
    Inventors: Sang Il Lee, Ji Hoon Lee, Young Eun Cheon, Yeon Ho Kim
  • Publication number: 20210135107
    Abstract: A low forming voltage NVM device is provided by forming a pair of sacrificial conductive pads on an interconnect dielectric material layer that embeds a pair of second electrically conductive structures and a patterned material stack. One of the sacrificial conductive pads has a first area and contacts a surface of one of the second electrically conductive structures that contacts a surface of an underlying first electrically conductive structure, and the other of the sacrificial conductive pads has a second area, different from the first area, and contacts a surface of another of the second electrically conductive structures that contacts a surface of a top electrode of the patterned material stack. A plasma treatment is performed to induce an antenna effect and to convert a dielectric switching material of the patterned material stack into a conductive filament. After plasma treatment, the pair of sacrificial conductive pads is removed.
    Type: Application
    Filed: November 1, 2019
    Publication date: May 6, 2021
    Inventors: Youngseok Kim, Injo Ok, Alexander Reznicek, Soon-Cheon Seo
  • Publication number: 20210132445
    Abstract: A color conversion display panel includes a substrate. A color conversion portion is disposed on the substrate. The color conversion portion includes a semiconductor nanocrystal. A transmission portion is disposed on the substrate. A blue light blocking filter is disposed between the substrate and the color conversion portion. The blue light blocking filter includes a first convex portion that protrudes toward the substrate. The transmission portion includes a first region including a scatterer and a second region including a second convex portion that protrudes toward the substrate.
    Type: Application
    Filed: December 14, 2020
    Publication date: May 6, 2021
    Inventors: JA HUN KOO, Kyung-Hun Lee, Tae-Jong Jun, Woo-Young Cheon
  • Patent number: 10998303
    Abstract: A method of manufacturing a package-on-package device includes a bonding step carried out by a bonding apparatus including a pressing member and a light source that produces a laser beam. A bottom package including a lower substrate, lower solder balls alongside an edge of the lower substrate, and a lower chip on a center of the lower substrate is provided, the bottom package is bonded to an interposer substrate having upper solder balls aligned with the lower solder balls, and a top package having an upper substrate and an upper chip on the upper substrate is bonded to the interposer substrate. While the interposer substrate is disposed on the bottom package, the pressing member presses the interposer substrate against the bottom package, and the laser beam adheres the lower solder balls to the upper solder balls.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: May 4, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Junho Cho, Ohchul Kwon, Seungjin Cheon, Tea-Geon Kim, Bubryong Lee, Junglae Jung
  • Patent number: 10997039
    Abstract: A method for operating a data storage device which includes a nonvolatile memory device including a plurality of memory blocks, includes generating a valid page count table including the number of valid pages of each of closed blocks among the plurality of memory blocks in which data are written in all pages thereof and the number of valid pages of at least one open block among the plurality of memory blocks in which data is written in a part of pages thereof; generating a valid page scan table including a scan pointer for scanning the number of valid pages of the open block; and backing up the valid page count table and the valid page scan table in a meta block among the plurality of memory blocks.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: May 4, 2021
    Assignee: SK hynix Inc.
    Inventors: Duck Hoi Koo, Yong Tae Kim, Soong Sun Shin, Cheon Ok Jeong
  • Patent number: 10998343
    Abstract: A thin-film transistor (TFT) array substrate is provided. The TFT array substrate includes a base substrate, a semiconductor layer disposed on the base substrate, an insulating layer disposed on the semiconductor layer, and a gate electrode disposed on the insulating layer. A top surface of a portion of the insulating layer overlapping the semiconductor layer in a plan view of the base substrate and a top surface of the gate electrode are placed on the same level.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: May 4, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Byoung Kwon Choo, Joon Hwa Bae, Hyun Jin Cho, Jun Hyuk Cheon, Zi Yeon Yoon, Woo Jin Cho, Sung Hwan Choi, Jeong Hye Choi
  • Patent number: 10997881
    Abstract: A display device includes a base substrate which includes a display area and a peripheral area, the peripheral area including a bending area; a first test signal line and a second test signal line which are located on the peripheral area; a lower insulating layer which is located on the first test signal line and the second test signal line; a first test connection pattern which is located on the lower insulating layer and connected to the first test signal line; a second test connection pattern which is located on the lower insulating layer, spaced apart from the first test connection pattern, and connected to the second test signal line; an upper insulating layer; and a first crack detection line which is located on the upper insulating layer, is connected to the first and second test connection patterns, and has at least a portion overlapping the bending area.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: May 4, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jun Cheol Shin, Won Jang Ki, Mi Jung Kim, Sang Cheon Han
  • Publication number: 20210125955
    Abstract: A semiconductor package includes a substrate, a first semiconductor chip disposed on the substrate, and a second semiconductor chip disposed on a top surface of the first semiconductor chip. The first semiconductor chip includes a conductive pattern disposed on the top surface of the first semiconductor chip and a first protective layer covering the top surface of the first semiconductor chip and at least partially surrounds the conductive pattern. The second semiconductor chip includes a first pad that contacts a first through electrode on a bottom surface of the second semiconductor chip. A second protective layer surrounds the first pad and covers the bottom surface of the second semiconductor chip. A third protection layer fills a first recess defined in the second protective layer to face the inside of the second protective layer. The first protective layer and the third protective layer contact each other.
    Type: Application
    Filed: August 13, 2020
    Publication date: April 29, 2021
    Inventors: JIHWAN SUH, UN-BYOUNG KANG, TAEHUN KIM, HYUEKJAE LEE, JIHWAN HWANG, SANG CHEON PARK
  • Publication number: 20210124305
    Abstract: Provided are a hologram display device and a method of manufacturing the hologram display device. The hologram display device includes a light source unit that emits light, a spatial light modulator that modulates the light emitted from the light source unit, and a random pinhole panel. The random pinhole panel includes a plurality of pinholes of a random position or a random size and is arranged in line with an output part of the spatial light modulator. In the hologram display device and the method of manufacturing the hologram display device, a position and size of a random pinhole on the random pinhole are not limited to inside each pixel of the spatial light modulator.
    Type: Application
    Filed: August 7, 2020
    Publication date: April 29, 2021
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Hae KIM, Seong-Mok CHO, Chi-Sun HWANG, Ji Hun CHOI, Gi Heon KIM, Jong-Heon YANG, Sang Hoon CHEON, Kyunghee CHOI, Jae-Eun PI
  • Publication number: 20210126379
    Abstract: A communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT) are provided. The disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. According to the disclosure, an antenna module includes a first substrate layer on which at least one substrate is stacked; an antenna coupled to an upper end surface of the first substrate layer; a second substrate layer having an upper end surface coupled to a lower end surface of the first substrate layer and on which at least one substrate is stacked; and a radio frequency (RF) element coupled to a lower end surface of the second substrate layer.
    Type: Application
    Filed: October 5, 2020
    Publication date: April 29, 2021
    Inventors: Kwanghyun BAEK, Seungtae KO, Kijoon KIM, Juho SON, Sangho LEE, Youngju LEE, Jungyub LEE, Yonghun CHEON, Dohyuk HA
  • Patent number: 10991537
    Abstract: A vertical vacuum transistor with a sharp tip structure, and associated fabrication process, is provided that is compatible with current vertical CMOS fabrication processing. The resulting vertical vacuum channel transistor advantageously provides improved operational characteristics including a higher operating frequency, a higher power output, and a higher operating temperature while at the same time providing a higher density of vertical transistor devices during the manufacturing process.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: April 27, 2021
    Assignee: International Business Machines Corporation
    Inventors: Injo Ok, Choonghyun Lee, Soon-Cheon Seo, Seyoung Kim
  • Patent number: 10991717
    Abstract: A vertical memory device may include gate electrodes on a substrate, a merged pattern structure and a cell contact plug. The gate electrodes may be spaced apart in a first direction orthogonal to the substrate, and may extend in a second direction parallel to the substrate. The merged pattern structure may extend in the second direction while merging ends of the gate electrodes of each level. Edges of the merged pattern structure may have a step shape. The merged pattern structure may include pad patterns electrically connected to the gate electrodes. The cell contact plug may extend through the merged pattern structure and be electrically connected to one of the pad patterns. The cell contact plug may be electrically insulated from other gate electrodes. The cell contact plug may contact a conductive material underlying. An upper surface of the cell contact plug may only contact an insulation material.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: April 27, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Seok-Cheon Baek
  • Patent number: 10989151
    Abstract: A cooler for a vehicle that is configured to cool an exhaust gas exhausted from an engine of the vehicle includes: a cooler housing in which a coolant flow path and a plurality of tubes forming an exhaust gas flow path are formed. Each of the tubes includes micro fins that have a constant pattern formed along a length direction and are formed along an outer circumference surface of each of the tubes. A height of each of the micro fins is less than or equal to about 200 ?m.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: April 27, 2021
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventor: Jong Cheon Kim
  • Publication number: 20210119237
    Abstract: The present disclosure relates to a polymer electrolyte membrane for medium and high temperature, a preparation method thereof and a high-temperature polymer electrolyte membrane fuel cell including the same, more particularly to a technology of preparing a composite membrane including an inorganic phosphate nanofiber incorporated into a phosphoric acid-doped polybenzimidazole (PBI) polymer membrane by adding an inorganic precursor capable of forming a nanofiber in a phosphoric acid solution when preparing phosphoric acid-doped polybenzimidazole and using the same as a high-temperature polymer electrolyte membrane which is thermally stable even at high temperatures of 200-300° C. without degradation of phosphoric acid and has high ion conductivity.
    Type: Application
    Filed: April 27, 2020
    Publication date: April 22, 2021
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: So Young LEE, Seung Ju LEE, Min Jae LEE, Hyun Seo PARK, Jong Hyun JANG, Hyoung-Juhn KIM, Suk Woo NAM, Young Suk JO, Yeong Cheon KIM
  • Publication number: 20210114245
    Abstract: Disclosed is a method that may include the steps of: (a) previously acquiring information on defect positions of the optical film along the length direction of the optical film; (b) dividing the whole area of the optical film into a plurality of large calculation areas for deriving a plurality of cutting positions, based on a normal cutting distance condition and minimum cutting distance condition in the length direction, and the information on the defect positions of the optical film; and (c) determining the cutting positions from an area, in which none of the cutting positions are determined in the length direction of the optical film, among the plurality of large calculation areas.
    Type: Application
    Filed: September 27, 2019
    Publication date: April 22, 2021
    Inventors: Soon Ki HEO, Mun Cheon KWAK, Eung Jin JANG, Chan Soo KIM, Kyu Hwang LEE
  • Publication number: 20210113717
    Abstract: A magnetic resonance imaging (MRI) T1 contrast agent composition including T1 contrast material coated on the surface of a nanoparticle support and an imaging method using the MRI T1 contrast agent. The MRI T1 contrast agent composition has excellent T1 spin magnetic relaxation effects by modifying the paramagnetic T1 contrast material on the nanoparticle support having a certain diameter such that the paramagnetic T1 contrast material has a certain thickness or less, and thereby remarkably increasing the surface-to-volume ratio of the T1 contrast material. The MRI T1 contrast agent provides more precise and clear T1 positive contrast images, and is thus useful for highly reliable image diagnosis.
    Type: Application
    Filed: December 18, 2020
    Publication date: April 22, 2021
    Applicant: INVENTERA PHARMACEUTICALS INC.
    Inventors: Jin Woo CHEON, Tae Hyun SHIN