Abstract: An oscillator includes a charging circuit to charge and discharge a capacitive node, and a detector having a trigger point, and an input node operatively coupled to the capacitive node. The detector can comprise an inverter generating a detector output as a function of the trigger point and a voltage on the capacitive node, including means for reducing variation in the trigger point as a consequence of process variation a control circuit to alternately enable the charging circuit to charge the capacitive node and to discharge the capacitive node in response to changes in the detector output, and to provide an oscillator output signal.

Abstract: A package structure including a reconstructed wafer, a heat dissipation substrate, a semiconductor device, and a fixing mechanism is provided. The heat dissipation substrate is disposed on a side of the reconstructed wafer and includes an inlet, a base plate located between the inlet and the reconstructed wafer, and a connection member located and coupled between the inlet and the base plate. The connection member has an inclined fluid channel that descends from the inlet to the base plate. The semiconductor device is disposed on another side of the reconstructed wafer, wherein the heat dissipation substrate and the semiconductor device are respectively located on opposite sides of the reconstructed wafer. The fixing mechanism fixes the reconstructed wafer, the heat dissipation substrate, and the semiconductor device together.

Abstract: The present invention provides a combination for inhibiting the cancer cells, which comprises a pharmaceutically effective dose of CCN2 or a CCN2 functional fragment, and a pharmaceutically effective dose of a cancer drug; the present invention also provides a method for inhibiting the cancer cells, which comprises administrating to the cancer cells a pharmaceutically effective dose of CCN2 or a CCN2 functional fragment, and a pharmaceutically effective dose of a cancer drug.

Abstract: A wavelength conversion device includes a wavelength conversion plate, a reflective layer, a driving component and a thermal conductive layer. The wavelength conversion plate includes a lateral edge, at least one surface and a conversion region. The reflective layer is disposed on the surface of the wavelength conversion plate. The driving component is disposed near the lateral edge of the wavelength conversion plate and configured to displace the wavelength conversion plate. The thermal conductive layer is disposed on the surface of the wavelength conversion plate and thermally connected to the conversion region for conducting heat generated by the conversion region during a wavelength conversion. By disposing the thermal conductive layer on the surface of the wavelength conversion plate, the thermal conductive layer is thermally directly connected to the conversion region, so that the heat generated at the conversion region during the wavelength conversion is efficiently dissipated.

Abstract: A wavelength conversion device includes a substrate, a reflective layer, a phosphor layer and a thermal conductive layer. The substrate has a surface. The reflective layer is disposed on the surface of the substrate. The phosphor layer is disposed on the reflective layer and has a conversion region configured to perform a wavelength conversion. The thermal conductive layer is disposed on the surface of the substrate and thermally directly connected to the conversion region for conducting a heat generated at the conversion region during the wavelength conversion. The thermal resistance of the reflective layer is high and causes heat in the conversion region to accumulate. By disposing the thermal conductive layer adjacent to a side of the phosphor layer, the thermal conductive layer is thermally directly connected to the conversion region, so that the heat generated at the conversion region during the wavelength conversion is efficiently dissipated.

Abstract: A support member system is described for association with an overhead transport system. The support member system provides a safety feature to the overhead transport system by which the overhead transport system is able to avoid damage to wafers that are contained within a wafer cassette that is unintentionally released by the overhead transport system. The support member system is able to prevent such released cassettes from impacting the ground or tools located under the overhead transport system. The support member system targets wafer cassettes that have dimensions which are different than the dimensions of wafer cassettes for which the overhead transport system was originally designed to transport. Stocker systems for receiving, storing and delivering different types of wafer cassettes are also described.

Abstract: Semiconductor devices, integrated circuits and methods of forming the same are provided. In one embodiment, a method includes depositing a first dielectric layer over a metal pad disposed over a workpiece, forming a first opening in the first dielectric layer to expose a portion of the metal pad, after the forming of the first opening, forming a second dielectric layer over the exposed portion of the metal pad, depositing a first polymeric material over the second dielectric layer, forming a second opening through the first polymeric material and the second dielectric layer to expose the metal pad, and forming a bump feature over the exposed metal pad.

Abstract: A method of fabricating a semiconductor structure including the following steps is provided. A mask layer is formed on a semiconductor substrate. The semiconductor substrate revealed by the mask layer is anisotropically etched until a cavity is formed in the semiconductor substrate, wherein anisotropically etching the semiconductor substrate revealed by the mask layer comprises performing a plurality of first cycles and performing a plurality of second cycles after performing the first cycles, each cycle among the first and second cycles respectively includes performing a passivating step and performing an etching step after performing the passivating step. During the first cycles, a first duration ratio of the etching step to the passivating step is variable and ramps up step by step. During the second cycles, a second duration ratio of the etching step to the passivating step is constant, and the first duration ratio is less than the second duration ratio.

Abstract: The invention relates to crystalline forms of the bis-HCI salt of a compound represented by Structural Formula 1, and pharmaceutical compositions comprising crystalline forms of the bis-HCL salt of a compound represented by Structural Formula 1 described herein. The crystalline forms of the bis-HCl salt of a compound of Structural Formula 1 and compositions comprising the crystalline forms of the compound of Structural Formula 1 provided herein, in particular, crystalline Form I, crystalline Form J, crystalline Form A, and crystalline Form B, or mixtures thereof, can be incorporated into pharmaceutical compositions, which can be used to treat various disorders. Also described herein are methods for preparing the crystalline forms (e.g., Forms I, J, B and A) of the bis-HCI salt of a compound represented by Structural Formula 1.

Abstract: A semiconductor device includes passive electrical components in a substrate; and an interconnect structure over the passive electrical components, conductive features of the interconnect structure being electrically coupled to the passive electrical components. The conductive features of the interconnect structure includes a first conductive line over the substrate; a conductive bump over the first conductive line, where in a plan view, the conductive bumps has a first elongated shape and is entirely disposed within boundaries of the first conductive line; and a first via between the first conductive line and the conductive bump, the first via electrically connected to the first conductive line and the conductive bump, where in the plan view, the first via has a second elongated shape and is entirely disposed within boundaries of the conductive bump.

Abstract: A memory data management method includes the following steps: reading a plurality of data of a plurality of memory cells of a memory block; determining whether error bits of the data exceed an error correction code (ECC) threshold; if the error bits of the data exceed the ECC threshold, a programming process being executed to enhance a first state data of the data for exceeding a first threshold, to enhance a second state data of the data for exceeding a second threshold, and to enhance a third state data of the data for exceeding a third threshold.

Abstract: A method for forming a semiconductor structure is provided. The method includes patterning a semiconductor substrate to form a first semiconductor fin and a second semiconductor fin, and depositing a first dielectric material on the first and second semiconductor fins. There is a trench between the first and second semiconductor fins. The method also includes depositing a semiconductor material on the first dielectric material, heating the semiconductor material to cause the semiconductor material to flow to a bottom region of the trench, filling a top region of the trench with a second dielectric material, and heating the first dielectric material, the second dielectric material, and the semiconductor material to form an isolation structure between the first and second semiconductor fins.

Abstract: An embodiment is a semiconductor structure. The semiconductor structure includes a fin on a substrate. A gate structure is over the fin. A source/drain is in the fin proximate the gate structure. The source/drain includes a bottom layer, a supportive layer over the bottom layer, and a top layer over the supportive layer. The supportive layer has a different property than the bottom layer and the top layer, such as a different material, a different natural lattice constant, a different dopant concentration, and/or a different alloy percent content.

Abstract: A rotor, which includes a rotor main body and a fan. The rotor main body includes a rotor core, a rotary shaft extending through the rotor core, and a permanent magnet mounted in the rotor core. The fan includes a plurality of fixing portions embedded in the rotor main body and configured to fix the permanent magnet. The rotor has a simple structure, can be easily assembled, and has a low cost.

Abstract: An ultrasonic imaging system includes an ultrasonic probe and a processing unit. The ultrasonic probe is operable at multiple different tilt angles to perform ultrasonic measurement and to obtain a plurality 2D ultrasonic images corresponding respectively to the different tilt angles. The processing unit calculates a 3D ultrasonic images based on the 2D ultrasonic images and the corresponding tilt angles.

Abstract: A semiconductor package includes an integrated passive device (IPD) including one or more passive devices over a first substrate; and metallization layers over and electrically coupled to the one or more passive devices, where a topmost metallization layer of the metallization layers includes a first plurality of conductive patterns; and a second plurality of conductive patterns interleaved with the first plurality of conductive patterns. The IPD also includes a first under bump metallization (UBM) structure over the topmost metallization layer, where the first UBM structure includes a first plurality of conductive strips, each of the first plurality of conductive strips electrically coupled to a respective one of the first plurality of conductive patterns; and a second plurality of conductive strips interleaved with the first plurality of conductive strips, each of the second plurality of conductive strips electrically coupled to a respective one of the second plurality of conductive patterns.

Abstract: A method for forming a semiconductor structure is provided. The method includes patterning a semiconductor substrate to form a first semiconductor fin and a second semiconductor fin adjacent to the first semiconductor fin, and depositing a first dielectric material on the first semiconductor fin and the second semiconductor fin on the semiconductor substrate using an atomic layer deposition process. There is a first trench between the first semiconductor fin and the second semiconductor fin. The method also includes filling the first trench with a flowable dielectric material, and heating the flowable dielectric material and the first dielectric material to form an isolation structure between the first semiconductor fin and the second semiconductor fin.

Abstract: Disclosed are an aromatic amine derivative and an organic electroluminescent device including the same. A fluorenyl/silafluorenyl group having an ortho-substituted group is introduced into the structure of the aromatic amine derivative. The aromatic amine derivative may be used as a light-emitting material in a light-emitting layer of an organic electroluminescent device. These novel compounds can provide better device performance.

Abstract: Methods, systems, and devices for wireless communication are described. In some systems (e.g., Wi-Fi systems), a transmitting device such as an access point (AP) or mobile station (STA), may identify a number of spatial streams for a data transmission that is less than a number of transmit antennas, and may transmit a packet over a channel. In a first implementation, the packet may be formatted in a multi-user frame format, with a number of long training field (LTF) symbols equal to the number of transmit antennas. In a second implementation, the packet may be a null data packet (NDP), and the device may transmit a separate data packet. In a third implementation, the packet may be formatted in single-user frame format with a modified LTF. A receiving device may receive the packet, and may perform channel estimation and power amplifier (PA) distortion cancellation based on the received packet.

Abstract: A bearing assembly and a rotary shaft apparatus employing the same are provided. The bearing assembly is rotatably coupled with a first shaft and a second shaft. The first bearing housing includes a first annular recess having a first axial depth. The first bearing is connected with the first annular recess and the first shaft and has a first axial thickness. The second bearing housing includes a second annular recess having a second axial depth. The second bearing is connected with the first annular recess, the second annular recess and the second shaft and has a second axial thickness. The spacer is disposed between the first bearing and the second bearing and has a third axial thickness. The sum of the first axial thickness, the second axial thickness and the third axial thickness is greater than the sum of the first axial depth and the second axial depth.