Patents by Inventor An-Chi Wei
An-Chi Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250147205Abstract: An optical lens assembly includes, from an object side to an image side, at least four optical lens elements. At least one of the at least four optical lens elements includes an anti-reflective coating. The at least one optical lens element including the anti-reflective coating is made of a plastic material. The anti-reflective coating is arranged on an object-side surface or an image-side surface of the at least one optical lens element including the anti-reflective coating. The anti-reflective coating includes at least one coating layer. One of the at least one coating layer at the outer of the anti-reflective coating is made of ceramics. The anti-reflective coating includes a plurality of holes, and sizes of the plurality of holes adjacent to the outer of the anti-reflective coating are larger than sizes of the plurality of holes adjacent to the inner of the anti-reflective coating.Type: ApplicationFiled: January 9, 2025Publication date: May 8, 2025Inventors: Wen-Yu TSAI, Chien-Pang CHANG, Chi-Wei CHI, Wei-Fong HONG, Chun-Hung TENG, Kuo-Chiang CHU
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Publication number: 20250146120Abstract: An evaporation mask includes an outer frame and a sub-mask. The outer frame is provided with an opening, and both sides of the opening are provided with two opposite positioning side edges. The sub-mask is adapted to be connected to the outer frame and is provided with a pattern area and two fixed areas. The pattern area is located at a center of the sub-mask. A surface of the sub-mask is provided with a first datum point and a second datum point. The first datum point is located at a center of the pattern area. The second datum point is located at an edge, close to one of the fixed areas, of the pattern area. A first distance between the first datum point and the second datum point is less than or equal to 200 ?m. A method for evaluating the evaporation mask is also provided.Type: ApplicationFiled: August 20, 2024Publication date: May 8, 2025Inventor: CHI-WEI LIN
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Patent number: 12288723Abstract: A method includes forming first and second gate stacks extending across a semiconductor fin on a substrate; forming source/drain regions in the semiconductor fin, wherein one of the source/drain region is between the first and second gate stacks; forming a dielectric layer laterally surrounding the first and second gate stacks; doping a portion of the dielectric layer between the first and second gate stacks with a dopant; removing the second gate stack to form a gate trench next to the doped first portion of the dielectric layer; performing an annealing process to expand the doped first portion of the dielectric layer toward the gate trench; forming an isolation structure in the gate trench and next to the expanded first portion of the dielectric layer; forming a source/drain contact extending through the dielectric layer to the one of the source/drain regions.Type: GrantFiled: May 11, 2022Date of Patent: April 29, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chi-Wei Wu, Hsin-Che Chiang, Chun-Sheng Liang
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Patent number: 12282260Abstract: A method for cleaning is provided. The method includes: removing a pellicle frame from a top surface of a photomask by debonding an adhesive between the photomask and the pellicle frame, wherein a first portion of the adhesive is remained on the top surface of the photomask, and removing the first portion of the adhesive on the top surface of the photomask, including applying an alkaline solution to the top surface of the photomask, and performing a mechanical impact to the photomask.Type: GrantFiled: December 23, 2021Date of Patent: April 22, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yu-Hsin Hsu, Hao-Ming Chang, Shao-Chi Wei, Sheng-Chang Hsu, Cheng-Ming Lin
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Publication number: 20250126858Abstract: Semiconductor structures and methods for manufacturing the same are provided. The semiconductor structure includes first nanostructures formed over a substrate along a first direction, and second nanostructures formed over the substrate along the first direction. The semiconductor structure includes a first gate structure formed over the first nanostructures along a second direction, and a second gate structure formed over the second nanostructures along the second direction. The semiconductor structure also includes a dielectric wall structure between the first gate structure and the second gate structure along the second direction. The dielectric wall structure includes a top portion and a bottom portion, and a top width of a top surface of the top portion is smaller than a bottom width of a bottom surface of the bottom portion of the dielectric wall structure.Type: ApplicationFiled: October 17, 2023Publication date: April 17, 2025Inventors: Hsin-Che CHIANG, Chi-Wei WU, Pang-Hsuan LIU, Wei-Chih KAO, Jeng-Ya YEH, Mu-Chi CHIANG, Jhon-Jhy LIAW
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Publication number: 20250126305Abstract: A server comprising a circuitry, wherein the circuitry is configured to perform: generating a virtual chatbot via a machine learning model; determining an emotion of the virtual chatbot; feeding information of the emotion into the machine learning model; and setting the virtual chatbot in a live streaming room. According to the present disclosure, the communication between the viewers and AI V-Liver may be improved. Moreover, the quality of the live streaming platform with AI V-Livers may also be improved. Therefore, the user experience may also be improved.Type: ApplicationFiled: September 13, 2024Publication date: April 17, 2025Inventors: Yung-Chi HSU, Chi-Wei LIN, Chin-Wei LIU, Chia-Han CHANG, Hsing-Yu TSAI
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Publication number: 20250125012Abstract: A tumor neoantigen prediction method and a tumor neoantigen prediction system are provided. In the method, multiple amino acid sequences in genes of a person to be tested are extracted as multiple test peptides to be compared with multiple human protein sequences in a protein sequence database to find multiple similar peptides that match the human protein sequences. The similar peptides are filtered out from the test peptides and the filtered test peptides are input to multiple trained human leukocyte antigen (HLA) models to obtain multiple ranking results of the test peptides. A weighted sum of rankings of each test peptide in the ranking results is calculated as a score of the test peptide. At least one of the test peptides is selected as a neoantigen adapted for the person to be tested according to the score.Type: ApplicationFiled: November 7, 2023Publication date: April 17, 2025Applicant: Acer IncorporatedInventors: Chi-Wei Lu, Ying-Ja Chen, Li-Tzu Yeh, Tao-Chuan Shih, Cing-Han Yang, Tun-Wen Pai
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Publication number: 20250107104Abstract: A semiconductor structure includes a semiconductor-on-insulator (SOI) substrate including a handle substrate, a buried insulating layer, and a top semiconductor layer; a first deep trench isolation structure that vertically extends through the top semiconductor layer and the buried insulating layer, and includes a first inner insulating liner laterally surrounding a first portion of the top semiconductor layer that is located in a first device region in a plan view, a first non-insulating moat structure laterally surrounding the first inner insulating liner, and a first outer insulating liner that laterally surrounds the first non-insulating moat structure; and a resistive memory array located on the first portion of the top semiconductor layer, and located entirely within the first device region in the plan view.Type: ApplicationFiled: January 11, 2024Publication date: March 27, 2025Inventors: Kao-Chao Lin, Chi-Wei Ho, Yu-Ting Tsai, Ching-Tzer Weng, Chia-Ta Hsieh
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Patent number: 12243924Abstract: Semiconductor device structures with a gate structure having different profiles at different portions of the gate structure may include a fin structure on a substrate, a source/drain structure on the fin structure, and a gate structure over the fin structure and along a sidewall of the fin. The source/drain structure is proximate the gate structure. The gate structure has a top portion having a first sidewall profile and a bottom portion having a second sidewall profile different from the first sidewall profile.Type: GrantFiled: March 13, 2023Date of Patent: March 4, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih Ping Wang, Chao-Cheng Chen, Jr-Jung Lin, Chi-Wei Yang
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Patent number: 12235409Abstract: An optical lens assembly includes, from an object side to an image side, at least four optical lens elements. At least one of the at least four optical lens elements includes an anti-reflective coating. The at least one optical lens element including the anti-reflective coating is made of a plastic material. The anti-reflective coating is arranged on an object-side surface or an image-side surface of the at least one optical lens element including the anti-reflective coating. The anti-reflective coating includes at least one coating layer. One of the at least one coating layer at the outer of the anti-reflective coating is made of ceramics. The anti-reflective coating includes a plurality of holes, and sizes of the plurality of holes adjacent to the outer of the anti-reflective coating are larger than sizes of the plurality of holes adjacent to the inner of the anti-reflective coating.Type: GrantFiled: December 17, 2021Date of Patent: February 25, 2025Assignee: LARGAN PRECISION CO., LTD.Inventors: Wen-Yu Tsai, Chien-Pang Chang, Chi-Wei Chi, Wei-Fong Hong, Chun-Hung Teng, Kuo-Chiang Chu
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Patent number: 12237312Abstract: A light-emitting diode (LED) packaging module includes a plurality of LED chips spaced apart from one another, an encapsulating layer that fills in a space among the LED chips, a light-transmitting layer disposed on the encapsulating layer, a wiring assembly disposed on and electrically connected to the LED chips, and an insulation component that covers the encapsulating layer and the wiring assembly. Each of the LED chips includes an electrode assembly including first and second electrodes. The light-transmitting layer includes a light-transmitting layer that has a light transmittance greater than that of the encapsulating layer.Type: GrantFiled: March 10, 2022Date of Patent: February 25, 2025Assignee: QUANZHOU SANAN SEMICONDUCTOR TECHNOLOGY CO., LTD.Inventors: Shuning Xin, Chen-Ke Hsu, Aihua Cao, Junpeng Shi, Weng-Tack Wong, Yanqiu Liao, Zhen-Duan Lin, Changchin Yu, Chi-Wei Liao, Zheng Wu, Chia-En Lee
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Patent number: 12235410Abstract: An optical lens assembly includes, from an object side to an image side, at least four optical lens elements. At least one of the at least four optical lens elements includes an anti-reflective coating. The at least one optical lens element including the anti-reflective coating is made of a plastic material. The anti-reflective coating is arranged on an object-side surface or an image-side surface of the at least one optical lens element including the anti-reflective coating. The anti-reflective coating includes at least one coating layer. One of the at least one coating layer at the outer of the anti-reflective coating is made of ceramics. The anti-reflective coating includes a plurality of holes, and sizes of the plurality of holes adjacent to the outer of the anti-reflective coating are larger than sizes of the plurality of holes adjacent to the inner of the anti-reflective coating.Type: GrantFiled: January 17, 2022Date of Patent: February 25, 2025Assignee: LARGAN PRECISION CO., LTD.Inventors: Wen-Yu Tsai, Chien-Pang Chang, Chi-Wei Chi, Wei-Fong Hong, Chun-Hung Teng, Kuo-Chiang Chu
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Publication number: 20250058412Abstract: A laser welding mechanism includes a main body having a space and two securing devices which are respectively attached to two ends of the body. A linkage assembly includes a bearing and a linkage tube. A refraction mirror unit includes two mirrors connected to the linkage tube of the linkage assembly. A laser unit is pivotally connected to a swinging member which is connected to the linkage tube of the linkage assembly. A drive unit including a motor, a driving gear, and a driven gear. A rotation unit is connected to the swinging member of the laser unit. The laser unit rotates relative to the first workpiece and the second workpiece during welding, ensuring a stable rotation at the joining faces of the two workpieces.Type: ApplicationFiled: October 17, 2023Publication date: February 20, 2025Inventors: KUO CHIANG TSENG, NAN KAI WENG, CHIH YU WENG, PEI YU WANG, TZU WEN SUNG, FENG CHI WEI, MAO TE CHUANG
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Patent number: 12230612Abstract: A light-emitting diode (LED) packaging module includes light-emitting units arranged in an array having m row(s) and n column(s), an encapsulating layer, and a wiring assembly, where m and n each independently represents a positive integer. Each of the light-emitting units includes LED chips each including a chip first surface, a chip second surface, a chip side surface, and an electrode assembly disposed on the chip second surface. The encapsulating layer covers the chip side surface and fills a space among the LED chips. The wiring assembly is disposed on the chip second surface and is electrically connected to the electrode assembly.Type: GrantFiled: March 10, 2022Date of Patent: February 18, 2025Assignee: QUANZHOU SANAN SEMICONDUCTOR TECHNOLOGY CO., LTD.Inventors: Shuning Xin, Zhen-Duan Lin, Yanqiu Liao, Junpeng Shi, Aihua Cao, Changchin Yu, Chen-Ke Hsu, Chi-Wei Liao, Chia-En Lee, Zheng Wu
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Patent number: 12230611Abstract: A light-emitting device includes a number (N) of light-emitting units, a number (a) of first metal pads and a number (b) of second metal pads. Each of the light-emitting units includes a number (n) of light-emitting chips each having two distinct terminals, where N and n are integers and N>1, n>?3. The numbers (a) and (b) are integers and a>1, b>1, and the terminals of each of the light-emitting chips are electrically connected to a unique combination of one of the number (a) of first metal pads and a number (b) of second metal pads, respectively. The numbers (N), (n), (a) and (b) satisfy the equation: a*b=n*N.Type: GrantFiled: February 8, 2022Date of Patent: February 18, 2025Assignee: QUANZHOU SANAN SEMICONDUCTOR TECHNOLOGY CO., LTD.Inventors: Yanqiu Liao, Junpeng Shi, Shuning Xin, Chen-ke Hsu, Zhen-duan Lin, Changchin Yu, Aihua Cao, Chi-Wei Liao, Zheng Wu, Chia-en Lee
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Patent number: 12222580Abstract: A lens autofocus actuating device includes a base, a guide rail unit, a lens carrier, an actuating member, a plurality of balls, and a shell. The base includes an upper surface. The guide rail unit is disposed on the upper surface of the base. The lens carrier is disposed above the base. The lens carrier is located between a plurality of position-limiting members. The actuating member is disposed on the upper surface of the base. The actuating member comprises two electrode terminal pairs and two shape-memory alloy wires. The balls are divided into groups. The shell is connected to the base.Type: GrantFiled: April 5, 2022Date of Patent: February 11, 2025Assignee: TDK TAIWAN CORP.Inventor: Chi-Wei Chiu
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Publication number: 20250047919Abstract: A method for facilitating streamer interaction with a viewer includes extracting a history topic based on an activity record of the viewer; calculating a score of each of the history topics based on at least one parameter; and generating a topic suggestion based on the history topic and the score which is corresponding to the history topic, and providing the topic suggestion to the streamer. The method is suitable for providing a topic suggestion (or interact topic suggestion) with respect to the viewer to the streamer via a live-streaming platform executed by a computing device. Thereby, the method can be used for facilitating streamer interaction with viewers and provides an appropriate topic suggestion. In addition, a computing device and a computer-readable storage medium which are capable of implementing the method are also provided.Type: ApplicationFiled: January 24, 2024Publication date: February 6, 2025Inventors: YUNG-CHI HSU, CHI-WEI LIN, SHAO-TANG CHIEN, WEI-HSIANG HUNG, WEI-KUN LU, YU-CHENG FAN, CHIA-HAN CHANG, HUNG-KUANG TAI
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Publication number: 20250022810Abstract: A package substrate and a method of fabrication thereof including stress buffer layers. Each stress buffer layer may be vertically spaced from and at least partially overlap with a corresponding bonding pad of the package substrate. The stress buffer pads may provide structural reinforcement to distribute tensile stress on the package substrate and inhibit warpage and crack formation in the package substrate. Accordingly, semiconductor package reliability and yields may be improved.Type: ApplicationFiled: July 10, 2023Publication date: January 16, 2025Inventors: Chung-Hsin Chen, Chi Wei Hsu, Sih Han Chen, Yi Chung Chen
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Publication number: 20250022789Abstract: A package substrate and a method of fabrication thereof including stress buffer layers. Each stress buffer layer may be vertically spaced from and at least partially overlap with a corresponding bonding pad of the package substrate. The stress buffer pads may provide structural reinforcement to distribute tensile stress on the package substrate and inhibit warpage and crack formation in the package substrate. The stress buffer pads may additionally improve an insertion loss characteristic of the package substrate. Accordingly, semiconductor package performance, reliability and yields may be improved.Type: ApplicationFiled: July 31, 2024Publication date: January 16, 2025Inventors: Chung-Hsin Chen, Chi Wei Hsu, Sih Han Chen, Yi Chung Chen
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Patent number: 12199145Abstract: An epitaxial structure includes a composite base unit and an emitter unit. The composite base unit includes a first base layer and a second base layer formed on the first base layer. The first base layer is made of a material of InxGa(1-x)As(1-y)Ny, in which 0<x?0.2, and 0?y?0.035, and when y is not 0, x=3y. The second base layer is made of a material InmGa(1-m)As, in which 0.03?m?0.2. The emitter unit is formed on the second base layer 12 opposite to the first base layer 11, and is made of an indium gallium phosphide-based material. A transistor including the epitaxial structure is also disclosed.Type: GrantFiled: February 29, 2024Date of Patent: January 14, 2025Assignee: Xiamen Sanan Integrated Circuit Co., Ltd.Inventors: Chih-Hung Yen, Wenbi Cai, Houng-Chi Wei