Abstract: A lens module reducing stray light includes at least two overlapping lenses, each of the lenses includes a light passing area and a flange area outside the light passing area. Each of the lenses includes a first surface disposed toward one adjacent lens. The first surface has optical microstructures, the optical microstructures scatter light entering the flange area. The first surface also includes an overlapping portion protruding from the first surface in the flange area. Adjacent lenses are accurately aligned by the overlapping portion, the overlapping portion includes a second surface away from the first surface. The second surface of each lens is in contact with the second surface of the adjacent lens, and the second surface is a smooth surface. An optical lens and an electronic device are also disclosed.

Abstract: A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.

Abstract: A chip packaging structure includes a circuit redistribution structure, a chip, a sealing layer, and an antenna pattern. The circuit redistribution structure includes a first and a second circuit layer, and a conductive pad. The second circuit layer is disposed on and electrically connected to the first circuit layer. The conductive pad is electrically connected to the second circuit layer. The chip is disposed on the circuit redistribution structure and electrically connected to the second circuit layer. The sealing layer having an opening and a groove covers the chip and the circuit redistribution structure. The opening exposes the conductive pad. A portion of the groove communicates with the opening. The antenna pattern includes a first and a second portion. The first portion covers sidewalls of the opening and is electrically connected to the conductive pad. The second portion is filled in the groove and electrically connected to the first portion.

Abstract: A mobile group-purchase system and implementing method thereof is provided, in which the system is formed by a group-purchase server and at least one mobile communication device. User can send a group-purchase invitation by a mobile communication device to a plurality of designated mobile communication devices and create an original buying group so that each member of the group can order commodity offered by the group. Moreover, any member of the original buying group can also create an extended sub-group, so that the creator can get more favorable purchase price. When group-purchase activity is completed, the group-purchase server further calculated out a spread profit which is then feedback to the creator of the extended sub-group, so as to encourage the member of the buying group to use the mobile group-purchase system.

Abstract: A composite substrate structure includes a circuit substrate, a first anisotropic conductive film, a first glass substrate, a dielectric layer, a patterned circuit layer and a conductive via. The first anisotropic conductive film is disposed on the circuit substrate. The first glass substrate is disposed on the first anisotropic conductive film and has a first surface and a second surface opposite to the first surface. The first glass substrate includes a first circuit layer, a second circuit layer and at least one first conductive via. The first circuit layer is disposed on the first surface. The second circuit layer is disposed on the second surface. The first conductive via penetrates the first glass substrate and is electrically connected to the first circuit layer and the second circuit layer. The first glass substrate and the circuit substrate are respectively located on two opposite sides of the first anisotropic conductive film.

Abstract: An electronic device is provided. The electronic device includes a display, a substrate, and an anti-explosion layer. The substrate is disposed on the display. The anti-explosion layer is disposed between the substrate and the display, and the anti-explosion layer has a tensile strength in a range from 10 MPa to 30 MPa.

Abstract: A pretreatment liquid for water-based pigment textile printing is disclosed, which includes: 1 wt % to 30 wt % of aqueous non-ionic polyurethane; 1 wt % to 20 wt % of a metal salt; 0.1 wt % to 10 wt % of a melamine resin; and the balance being a solvent. A method for forming a pattern on a textile using the aforesaid pretreatment liquid is also disclosed.

Abstract: A lens fixing module is configured to fix a lens, wherein the lens has a flange. The lens fixing module includes a fixing base and a fixing ring. The fixing base has a hollow pillar and a first connecting portion. The fixing ring has a restraining portion and a second connecting portion. An end of the lens is inserted into the hollow pillar, the fixing ring is disposed on the lens and the hollow pillar, and the first connecting portion is connected to the second connecting portion, such that the flange is sandwiched in between the restraining portion and the hollow pillar.

Abstract: An embedded chip package includes a circuit board, a chip, a dielectric material layer, and a build-up circuit structure. The circuit board includes a glass substrate and at least one conductive via. The glass substrate has a first surface, a second surface opposite the first surface, and a through-hole penetrating the glass substrate. The conductive via penetrates the glass substrate. The chip is disposed inside the through-hole. The dielectric material layer is filled inside the through-hole and covers the chip. The build-up circuit structure is disposed on the circuit board. The build-up circuit structure is electrically connected to the conductive via. A lower surface of the chip is exposed outside the dielectric material layer.

Abstract: An image processing system includes an image capturing device, a pixel binning device, a temporal filter, a first memory, a re-mosaic device, a second memory, and a blending device. The image capturing device is used for capturing a raw image. The pixel binning device is coupled to the image capturing device for outputting an enhanced image according to the raw image. The temporal filter is coupled to the pixel binning device for outputting a preview image according to the enhanced image. The first memory is used for buffering the raw image. The re-mosaic device is coupled to the first memory for outputting a processed image. The second memory is used for buffering the enhanced image. The blending device is coupled to the re-mosaic device and the second memory for outputting a snapshot image according to the processed image and the enhanced image.

Abstract: A manufacturing method of a substrate structure includes the following steps. A first build-up circuit structure is formed. At least one copper pillar is formed on the first build-up circuit structure. A dielectric layer is formed on the first build-up circuit structure, and the dielectric layer wraps the copper pillar. A second build-up circuit structure and a capacitive element are formed on the dielectric layer. In particular, the second build-up circuit structure and the first build-up circuit structure are respectively located at two opposite sides of the dielectric layer. The capacitive element is disposed in a capacitive element setting region within the second build-up circuit structure. The copper pillar penetrates the dielectric layer and is electrically connected to the second build-up circuit structure and the first build-up circuit structure.

Abstract: A manufacturing method of a substrate structure includes the following steps. A first build-up circuit structure is formed. At least one copper pillar is formed on the first build-up circuit structure. A dielectric layer is formed on the first build-up circuit structure, and the dielectric layer wraps the copper pillar. A second build-up circuit structure and a capacitive element are formed on the dielectric layer. In particular, the second build-up circuit structure and the first build-up circuit structure are respectively located at two opposite sides of the dielectric layer. The capacitive element is disposed in a capacitive element setting region within the second build-up circuit structure. The copper pillar penetrates the dielectric layer and is electrically connected to the second build-up circuit structure and the first build-up circuit structure. A substrate structure obtained by the manufacturing method of the substrate structure is provided.

Abstract: A composite substrate structure includes a circuit substrate, a first anisotropic conductive film, a first glass substrate, a dielectric layer, a patterned circuit layer and a conductive via. The first anisotropic conductive film is disposed on the circuit substrate. The first glass substrate is disposed on the first anisotropic conductive film and has a first surface and a second surface opposite to the first surface. The first glass substrate includes a first circuit layer, a second circuit layer and at least one first conductive via. The first circuit layer is disposed on the first surface. The second circuit layer is disposed on the second surface. The first conductive via penetrates the first glass substrate and is electrically connected to the first circuit layer and the second circuit layer. The first glass substrate and the circuit substrate are respectively located on two opposite sides of the first anisotropic conductive film.

Abstract: A substrate structure includes a glass substrate, a first circuit layer, a second circuit layer, and at least one conductive region. The glass substrate has a first surface and a second surface opposing the first surface. The first circuit layer is disposed on the first surface. The second circuit layer is disposed on the second surface. The conductive region includes a plurality of conductive micro vias. The conductive micro vias penetrate through the glass substrate. The conductive micro vias are electrically connected to the first circuit layer and the second circuit layer, and the conductive micro vias have a via size of 2 ?m to 10 ?m.

Abstract: A carrier structure including a glass substrate, a buffer layer, and an inner circuit layer is provided. The glass substrate has a first surface, a second surface opposite to the first surface, and at least one through hole penetrating through the glass substrate. The buffer layer is disposed on the first surface and the second surface of the glass substrate. The inner circuit layer is disposed on the buffer layer and in the through hole of the glass substrate. The inner circuit layer exposes a part of the buffer layer.

Abstract: A light-emitting diode package including a carrier structure, a patterned conductive layer, at least one chip, a dielectric layer, at least one first conductive via, a build-up circuit structure, and at least one light-emitting diode is provided. The patterned conductive layer is disposed on the carrier structure. The chip is disposed on the carrier structure. The dielectric layer is disposed on the carrier structure and encapsulates the chip and the patterned conductive layer. The first conductive via penetrates the dielectric layer and is electrically connected to the patterned conductive layer. The build-up circuit structure is disposed on the dielectric layer and electrically connected to the first conductive via. The light-emitting diode is disposed on the build-up circuit structure.

Abstract: A carrier structure including a glass substrate, a buffer layer, and an inner circuit layer is provided. The glass substrate has a first surface, a second surface opposite to the first surface, and at least one through hole penetrating through the glass substrate. The buffer layer is disposed on the first surface and the second surface of the glass substrate. The inner circuit layer is disposed on the buffer layer and in the through hole of the glass substrate. The inner circuit layer exposes a part of the buffer layer.

Abstract: A flow field visualization device includes a chamber, a power supply, at least one pair of electrodes, and at least two high-speed cameras. The power supply outputs a voltage for plasma generation, and the pair of electrodes is disposed in the chamber. The pair of electrodes includes a first electrode and a second electrode. The first electrode has a plurality of first tips, the second electrode has a plurality of second tips, and the first tips and the second tips are aligned with each other. The pair of electrodes generates a periodically densely distributed plasma by exciting a gas in the chamber through the voltage from the power supply. The high-speed cameras are disposed outside the chamber and are positioned in different directions corresponding to the pair of electrodes in order to capture images of different dimensions.

Abstract: A chip packaging structure includes a circuit redistribution structure, a chip, a sealing layer, and an antenna pattern. The circuit redistribution structure includes a first and a second circuit layer, and a conductive pad. The second circuit layer is disposed on and electrically connected to the first circuit layer. The conductive pad is electrically connected to the second circuit layer. The chip is disposed on the circuit redistribution structure and electrically connected to the second circuit layer. The sealing layer having an opening and a groove covers the chip and the circuit redistribution structure. The opening exposes the conductive pad. A portion of the groove communicates with the opening. The antenna pattern includes a first and a second portion. The first portion covers sidewalls of the opening and is electrically connected to the conductive pad. The second portion is filled in the groove and electrically connected to the first portion.

Abstract: Provided is a display device including: a backlight module; a first display panel disposed on the backlight module and including a first polarizer; and a second display panel disposed on the backlight module and including a second polarizer, wherein the first polarizer has a first projection, the second polarizer has a second projection, and an area of an overlap between the first projection and the second projection accounts for 10% or less of an area of the second projection.