Abstract: A semiconductor device includes a substrate having an array region defined thereon, a ring of magnetic tunneling junction (MTJ) region surrounding the array region, a gap between the array region and the ring of MTJ region, and metal interconnect patterns overlapping part of the ring of MTJ region. Preferably, the array region includes a magnetic random access memory (MRAM) region and a logic region and the ring of MTJ region further includes a first MTJ region and a second MTJ region extending along a first direction and a third MTJ region and a fourth MTJ region extending along a second direction.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes multiple semiconductor nanostructures, and the semiconductor nanostructures include a first semiconductor material. The semiconductor device structure also includes multiple epitaxial structures extending from edges of the semiconductor nanostructures. The epitaxial structures include a second semiconductor material that is different than the first semiconductor material. The semiconductor device structure further includes a gate stack wrapped around the semiconductor nanostructures.

Abstract: Provided are methods and compositions for use in cancer immunotherapies. In various embodiments, the compositions include functionally enhanced derivative effector cells obtained from directed differentiation of genomically engineered iPSCs. In various embodiments, the derivative cells provided herein have stable and functional genome editing that delivers improved or enhanced therapeutic effects. Also provided are therapeutic compositions and the use thereof comprising the functionally enhanced derivative effector cells alone, or with antibodies or checkpoint inhibitors in combination therapies.

Abstract: Battery pack transmissions are disclosed herein. An example battery pack including at least one battery cell; a radio frequency (RF) chip; a battery contact contacting an end of the at least one battery cell; a first excitor connecting to the battery contact via the first RF port; and a second excitor connecting to the battery contact via the second RF port; wherein: the RF chip determining if the signal is to be transmitted at a first frequency or a second frequency, the RF chip sends the signal to the battery contact via the first excitor, the first excitor resonates at a first transmission frequency and energizes the at least one battery cell and the battery contact at the first frequency for transmission of the signal, and when the signal is transmitting at the second frequency, the RF chip sends the signal to the battery contact via the second excitor.

Abstract: A compound of Formula (I) below, or a pharmaceutically acceptable salt, stereoisomer, solvate, or prodrug thereof: in which R1, R2, R3, R5, R6, and R7 are defined as in the SUMMARY section. Further disclosed are a method of using the above-described compound, salt, stereoisomer, solvate, or prodrug for treating microbial infections and a pharmaceutical composition containing the same.

Abstract: A micro puree machine including a housing, a power shaft, a bowl assembly and a platform. The power shaft extends from the housing. The bowl assembly including at least one locking bowl element. The platform includes at least one complementary locking platform element that is configured to engage the at least one locking bowl element such that rotation of the bowl assembly relative to the platform is prevented at times the bowl assembly is positioned thereon. The platform is rotatable from a first position to a second position relative to the housing such that the platform raises the bowl assembly towards the power shaft during the rotation of the bowl assembly and platform. The raising of the bowl assembly facilitates connection between the power shaft and a blade assembly that is positioned in a lid assembly on the bowl assembly.

Abstract: A method for reserving a cloud-based instrument and adapted to a system for reserving an instrument is provided. The system includes a group of remote instruments with a plurality of remote instruments, a system for reserving an instrument, and a bastion server. The reservation information includes a plurality of reservable time periods and a plurality of reserved time periods. The method for reserving the cloud-based instrument includes: establishing a secure connection between the bastion server and the remote instrument designated in any one of the reserved time periods, establishing a dedicated connection between the designated remote instrument and a user workstation designated in any one of the reserved time periods at start of any one of the reserved time periods according to pairing information and the reservation information, and terminating the secure connection and the dedicated connection at end of any one of the reserved time periods.

Abstract: A head-mountable device including a frame, a display positioned in the frame, a processor, and a facial interface connected to the frame. The facial interface can include a sensor electrically coupled to the processor. The sensor can collect biometric information from a nasal region of a user and generate a signal based on the biometric information.

Abstract: A method for forming a semiconductor device includes forming a front side of the semiconductor device, the front side comprising a metal wire M2, and a plurality of power rails coupled to the M2. Further, the method includes forming a through silicon via (TSV) from a back side of the semiconductor device to the front side, the TSV connecting a first power rail of the front side with a metal wire M1 on the back side. Further, the method includes forming a power delivery network on the back side, the TSV providing power from the power delivery network to the front side.

Abstract: A battery module includes neighboring first and second battery cells and a heat sink in contact with and configured to absorb thermal energy from each of the battery cells. The module additionally includes a module enclosure surrounded by ambient environment, housing each of the first and second battery cells and the heat sink, and configured to include a thermal conductivity path from the first cell to at least one of the second cell and the heat sink and from the heat sink to the enclosure. The battery module further includes a metal-hydroxide element configured to undergo a chemical decomposition and discharge moisture within the thermal conductivity path in response to thermal energy released by the first cell when the first cell undergoes a thermal runaway event. The metal-hydroxide element thereby controls propagation of the thermal runaway event from the first cell to the second cell.

Abstract: A composition, method of making, and method of using an active agent against a myriad of known as well as unknown pathogens comprising: binding a live influenza virus with a neuraminidase inhibitor in vitro; and administering the active agent with or without elimination of unbound neuraminidase inhibitors by intranasal administration or oral inhalation into patients. The active agent confers rapid and broad protection to a patient performing at least one of: i) elicit an innate immune response against known or unknown pathogens; ii) mitigate lymphopenia in general; iii) enable natural infection to activate adaptive immunity by allowing pathogens to harmlessly linger in an infected patient for a limited amount of time; and/or iv) eliciting protective immunity against influenza virus as a rapid-response influenza vaccine by making a clinically-isolated influenza virus immediately benign with a neuraminidase inhibitor in vitro without the time-consuming requirement to generate conventional influenza vaccines.

Abstract: A secondary battery and an electrochemical device are provided. The secondary battery includes a positive electrode plate, a separator, an electrolyte solution, and a negative electrode plate. The negative electrode plate includes a negative electrode current collector, and a negative electrode active material layer disposed on the negative electrode current collector. Non-faradaic electric quantity Q C of the negative electrode plate satisfies: 0.05?Q?2.5, wherein Q=Cdl×?U, Cdl nF is non-faradaic capacitance of the negative electrode plate, and ?U V is potential interval of the negative electrode active material layer.

Abstract: The optical device includes an illuminator configured to emit illumination light in a first horizontal direction, a polarizing prism configured to polarize the illumination light incident thereto through a first surface thereof in the first horizontal direction, a first reflector and a second reflector, each configured to reflect the illumination light from the polarizing prism, and a first lens and a second lens configured to condense the illumination light reflected from the first and second reflectors, respectively.

Abstract: An interconnect structure includes a first metal layer comprising at least one metal wire with a first segment and a local extension having a width in a first direction that is larger than a width of the first segment. A second metal layer is on top or below the first metal layer comprising at least one metal wire. A via is connected between the at least one metal wire of the first metal layer and the at least one metal wire of the second metal layer.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a nucleation layer, a buffer layer, a superlattice stack, a cap layer, a first transistor area and a second transistor area. The first superlattice stacked layers form a two dimensional electron gas carrier transport to generate a first current channels group and the second superlattice stacked layers forming a two dimensional hole gas carrier transport at different depths to generate a second current channels group. The first transistor area has a first depth contacted to the first superlattice stacked layers. The second transistor area has a second depth contacted to the second superlattice stacked layers. The first transistor area controls the first current channels group and the second current channels group, and the second transistor area controls the second current channels group.

Abstract: A robot is provided. The robot includes a camera, a driving unit, and a processor. The robot is configured to, if a plurality of users included in one group are identified in an image captured via the camera, acquire profile information of each of the plurality of users, based on the profile information, acquire group feature information including group type information of the group, priority information of the plurality of users, and preferred waypoint information of the one group, and control the driving unit to perform a route guidance function based on the group feature information and destination information.

Abstract: A computer implemented method performs data skipping in a hierarchically organized computing system. A group of processor units determines leaf node data sketches for data in leaf nodes in the hierarchically organized computing system. The leaf node data sketches summarize attributes of data in the leaf nodes. The group of processor units aggregates the leaf node data sketches at intermediate nodes in the hierarchically organized computing system to form aggregated data sketches at the intermediate nodes and retains data sketches received at the intermediate nodes from a group of child nodes to form retained data sketches. The retained data sketches are one of leaf node data sketches and the aggregated data sketches. The group of processor units searches the data using the retained data sketches and the data skipping within the hierarchically organized computing system in response to queries made to the intermediate nodes in the hierarchically organized computing system.

Abstract: A method (480, 580) of depositing layers of a thin-film transistor on a substrate using a sputter deposition source comprising at least one first pair of electrodes and at least one second pair of electrodes, the method comprising moving (482, 582) the substrate to a first vacuum chamber; depositing (484, 584) a first layer of the layers on the substrate by supplying the at least one first pair of electrodes with bipolar pulsed DC voltage, wherein a first material of the first layer comprises a first metal oxide; moving (486, 586) the substrate from the first vacuum chamber to a second vacuum chamber without a vacuum break; and depositing (488, 588) a second layer of the layers on the first layer by supplying the at least one second pair of electrodes with bipolar pulsed DC voltage, wherein a second material of the second layer comprises a second metal oxide, the second material being different from the first material.

Abstract: Methods for fabricating an integrated circuit (IC) device with a protection liner between doped semiconductor regions are provided. An example IC device includes a channel material having a first face and a second face opposite the first face, a first doped region and a second doped region in the channel material, extending from the second face towards the first face by a first distance; and an insulator structure in a portion of the channel material between the first and second doped regions, the insulator structure extending from the second face towards the first face by a second distance greater than the first distance. The insulator structure includes a first portion between the second face and the first distance and a second portion between first distance and the second distance. The insulator structure includes a liner material on sidewalls of the first portion but absent on sidewalls of the second portion.

Abstract: Embodiments disclosed herein include transistors and methods of forming transistors. In an embodiment, a transistor comprises a source, a drain, and a pair of spacers between the source and the drain. In an embodiment, a semiconductor channel is between the source and the drain, where the semiconductor channel passes through the pair of spacers. In an embodiment, the semiconductor channel has a first thickness within the pair of spacers and a second thickness between the pair of spacers, where the second thickness is less than the first thickness. In an embodiment, the transistor further comprises a gate stack over the semiconductor channel between the pair of spacers.