Patents by Inventor An-Chung Chen

An-Chung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973260
    Abstract: A light-transmitting antenna includes a substrate, a first and a second conductive pattern. The first and the second conductive pattern is disposed on a first and a second surface of the substrate respectively. The first conductive pattern includes a first feeder unit, a first and a second radiation unit, a first and a second coupling unit and a first parasitic unit. The first feeder unit is connected to the second radiation unit. The first and the second radiation unit are located between the first and the second coupling unit. One side and the other side of the first parasitic unit is connected to the second coupling unit and adjacent to the first coupling unit respectively. The second conductive pattern includes a second feeder unit, a third coupling unit, a second parasitic unit, and a fourth coupling unit.
    Type: Grant
    Filed: November 9, 2022
    Date of Patent: April 30, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Ruo-Lan Chang, Mei-Ju Lee, Cheng-Hua Tsai, Meng-Hsuan Chen, Wei-Chung Chen
  • Patent number: 11973302
    Abstract: The present disclosure provides a method for aligning a master oscillator power amplifier (MOPA) system. The method includes ramping up a pumping power input into a laser amplifier chain of the MOPA system until the pumping power input reaches an operational pumping power input level; adjusting a seed laser power output of a seed laser of the MOPA system until the seed laser power output is at a first level below an operational seed laser power output level; and performing a first optical alignment process to the MOPA system while the pumping power input is at the operational pumping power input level, the seed laser power output is at the first level, and the MOPA system reaches a steady operational thermal state.
    Type: Grant
    Filed: February 20, 2023
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Lin Louis Chang, Henry Tong Yee Shian, Alan Tu, Han-Lung Chang, Tzung-Chi Fu, Bo-Tsun Liu, Li-Jui Chen, Po-Chung Cheng
  • Patent number: 11971824
    Abstract: Disclosed is a method for enhancing memory utilization and throughput of a computing platform in training a deep neural network (DNN). The critical features of the method includes: calculating a memory size for every operation in a computational graph, storing the operations in the computational graph in multiple groups with the operations in each group being executable in parallel and a total memory size less than a memory threshold of a computational device, sequentially selecting a group and updating a prefetched group buffer, and simultaneously executing the group and prefetching data for a group in the prefetched group buffer to the corresponding computational device when the prefetched group buffer is update. Because of group execution and data prefetch, the memory utilization is optimized and the throughput is significantly increased to eliminate issues of out-of-memory and thrashing.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: April 30, 2024
    Assignee: AETHERAI IP HOLDING LLC
    Inventors: Chi-Chung Chen, Wei-Hsiang Yu, Chao-Yuan Yeh
  • Patent number: 11973113
    Abstract: Provided is a semiconductor device including a substrate having a lower portion and an upper portion on the lower portion; an isolation region disposed on the lower portion of the substrate and surrounding the upper portion of the substrate in a closed path; a gate structure disposed on and across the upper portion of the substrate; source and/or drain (S/D) regions disposed in the upper portion of the substrate at opposite sides of the gate structure; and a channel region disposed below the gate structure and abutting between the S/D regions, wherein the channel region and the S/D regions have different conductivity types, and the channel region and the substrate have the same conductivity type.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Chung Chen, Chi-Feng Huang, Victor Chiang Liang, Chung-Hao Chu
  • Publication number: 20240135553
    Abstract: A movement detection method, applied to a navigation input device with a navigation pattern comprising a center pattern and a radial pattern. The movement detection method comprises: (a)capturing a sensing image comprising a center pattern image and at least portion of a radial pattern image by an image sensor, wherein the center pattern image corresponds to the center pattern and the radial pattern image corresponding to the radial pattern; (b)computing a translation of the navigation input device according to shift of the center pattern image; and (c)computing a rotation angle of the navigation input device according to a first pattern relation between the center pattern image and a first portion of the radial pattern image. The translation and the rotation angle can be precisely and sensitively detected even if the joystick device is miniaturized, since the translation and the rotation angle are computed according to the navigation pattern.
    Type: Application
    Filed: October 19, 2022
    Publication date: April 25, 2024
    Applicant: PixArt Imaging Inc.
    Inventors: Yi-Chung Chen, Chao-Chien Huang, Chung-Yuo Wu
  • Publication number: 20240133427
    Abstract: An air-floating guide rail device includes a guide rail unit, a slider unit, and a linear motor unit. The guide rail unit includes a guide rail body and two air-floating block sets made of a material different from that of the guide rail body and each including top and side air-floating blocks. The slider unit includes a main sliding seat and two lateral sliding seats connected integrally to the main sliding seat and each having first and second guiding surfaces transverse to each other and disposed respectively adjacent to corresponding top and side air-floating blocks, and first and second air guiding passages connecting the first and second guiding surfaces to the external environment. The linear motor unit includes a stator and a mover mounted fixedly to the main sliding seat and movable relative to the stator for driving linear movement of the slider unit relative to the guide rail unit.
    Type: Application
    Filed: December 20, 2022
    Publication date: April 25, 2024
    Inventors: KUN-CHENG TSENG, KUEI-TUN TENG, WEI-CHIH CHEN, WEN-CHUNG LIN
  • Publication number: 20240138152
    Abstract: In accordance with embodiments, a memory array is formed with a multiple patterning process. In embodiments a first trench is formed within a multiple layer stack and a first conductive material is deposited into the first trench. After the depositing the first conductive material, a second trench is formed within the multiple layer stack, and a second conductive material is deposited into the second trench. The first conductive material and the second conductive material are etched.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Inventors: Feng-Cheng Yang, Meng-Han Lin, Sheng-Chen Wang, Han-Jong Chia, Chung-Te Lin
  • Publication number: 20240130614
    Abstract: An intraocular pressure inspection device includes an intraocular pressure detection unit, a high-precision positioning system and a wide-area positioning system, wherein according to the position of the intraocular pressure detection unit, a set of high-precision coordinates output by the high-precision positioning system and a set of wide-area coordinates output by the wide-area positioning system are integrated in appropriate weights to obtain a set of more precise integrated coordinate. The above-mentioned intraocular pressure inspection device can prevent the intraocular pressure detection unit from failing to operate once it is not in the working area of the high-precision positioning system.
    Type: Application
    Filed: October 13, 2023
    Publication date: April 25, 2024
    Inventors: Shao Hung HUANG, Chao-Ting CHEN, Fong Hao KUO, Yu-Chung TUNG, Chu-Ming CHENG, Chi-Yuan KANG
  • Publication number: 20240130637
    Abstract: System and method for sensing movement such as chest movement of each of a plurality of target test subjects by: transmitting, at each of N transmitting antennas (TXs) of a phased multiple-input multiple-output (phased-MIMO) radar, a common frequency modulated continuous wave (FMCW) signal in each of a plurality of time division multiplex (TDM) slots, each TDM slot having associated with it a respective weight selected in accordance with a transmit steering vector configured to cause a coherent summation of transmitted signal in a desired direction ?0 toward at least one target; receiving target-reflected energy associated with the transmitted FMCW signals at a virtual array formed by stacking signal from P TDM slots received via M receiving antennas (RXs) of the phased-MIMO radar; and processing an output of the virtual array to extract therefrom signal received from the desired direction ?0 to determine thereby target movement in the desired direction ?0.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 25, 2024
    Applicant: Rutgers, The State University of New Jersey
    Inventors: Athina Petropulu, Yingying Chen, Zhaoyi Xu, Chung-Tse Michael Wu, Cong Shi, Tianfang Zhang, Shuping Li, Yichao Yuan
  • Publication number: 20240135677
    Abstract: Disclosed is a method for training a graphics processing neural network with a patch-based approach, which involves calculating an overlapping size and an invalid size of an output of each of at least one of multiple feature extraction layers of the graphic processing neural network according to a predetermined cropping scheme, dividing an input image into first patches in the forward pass and the first gradients into second patches in the backward pass to run streamline operation of the first and second patches. Before training, each first patch overlaps neighboring first patches at adjacent edges. In the forward pass, an invalid portion of the output of each of the at least one of the feature extraction layers cropped out based on the predetermined cropping scheme and a corresponding invalid size. Such method secures streamline operation in favor of enhanced memory utilization in training and accurate model prediction.
    Type: Application
    Filed: August 26, 2020
    Publication date: April 25, 2024
    Applicant: AETHERAI IP HOLDING LLC
    Inventor: Chi-Chung CHEN
  • Patent number: 11967596
    Abstract: An integrated circuit includes a first-voltage power rail and a second-voltage power rail in a first connection layer, and includes a first-voltage underlayer power rail and a second-voltage underlayer power rail below the first connection layer. Each of the first-voltage and second-voltage power rails extends in a second direction that is perpendicular to a first direction. Each of the first-voltage and second-voltage underlayer power rails extends in the first direction. The integrated circuit includes a first via-connector connecting the first-voltage power rail with the first-voltage underlayer power rail, and a second via-connector connecting the second-voltage power rail with the second-voltage underlayer power rail.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Guo-Huei Wu, Shih-Wei Peng, Wei-Cheng Lin, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien, Lee-Chung Lu
  • Patent number: 11966077
    Abstract: A light emission apparatus includes a laser diode configured to emit a light; a laser driver electrically coupled to the laser diode, the laser driver being configured to drive the laser diode to generate the light; and an optical module arranged to receive the light emitted by the laser diode, the optical module comprising at least one optical element and being configured to adjust the light and emits a transmitting light; wherein the transmitting light emits from the optical module with an illumination angle and the optical module adjusts the light to vary the illumination angle.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: April 23, 2024
    Assignee: Artilux, Inc.
    Inventors: Yun-Chung Na, Chien-Lung Chen, Chieh-Ting Lin, Yu-Yi Hsu, Hui-Wen Chen, Bo-Jiun Chen, Shih-Tai Chuang
  • Publication number: 20240128194
    Abstract: Integrated circuit packages and methods of forming the same are provided. In an embodiment, a device includes: a power distribution interposer including: a first bonding layer; a first die connector in the first bonding layer; and a back-side interconnect structure including a power rail connected to the first die connector; and an integrated circuit die including: a second bonding layer directly bonded to the first bonding layer by dielectric-to-dielectric bonds; a second die connector in the second bonding layer, the second die connector directly bonded to the first die connector by metal-to-metal bonds; and a device layer on the second bonding layer, the device layer including a contact and a transistor, the transistor including a first source/drain region, the contact connecting a back-side of the first source/drain region to the second die connector.
    Type: Application
    Filed: January 9, 2023
    Publication date: April 18, 2024
    Inventors: Ming-Fa Chen, Yun-Han Lee, Lee-Chung Lu
  • Publication number: 20240128151
    Abstract: A package structure includes a bonding substrate, an integrated circuit, and a heat sink metal. The integrated circuit includes an active region facing the bonding substrate. The heat sink metal is located between the bonding substrate and the active region of the integrated circuit. The heat sink metal is electrically insulated with the integrated circuit.
    Type: Application
    Filed: October 16, 2023
    Publication date: April 18, 2024
    Inventors: Chun-Yen PENG, Kuo-Bin HONG, Shih-Chen CHEN, Hao-Chung KUO
  • Publication number: 20240129012
    Abstract: A wearable device includes a frame element and a dielectric substrate. The frame element includes a first metal element, a second metal element, and a third metal element. A first gap is provided between the first metal element and the second metal element. A second gap is provided between the second metal element and the third metal element. A third gap is provided between the third metal element and the first metal element. The dielectric substrate is surrounded by the first metal element, the second metal element, and the third metal element. A first antenna element is formed by the first metal element. A second antenna element is formed by the second metal element. A third antenna element is formed by the third metal element.
    Type: Application
    Filed: December 6, 2022
    Publication date: April 18, 2024
    Inventors: Jing-Yao XU, Chung-Ting HUNG, Chun-Yuan WANG, Chu-Yu TANG, Yi-Chih LO, Yu-Chen ZHAO, Chih-Tsung TSENG
  • Patent number: 11961545
    Abstract: Various embodiments of the present disclosure are directed towards a memory device. The memory device has a first transistor having a first source/drain and a second source/drain, where the first source/drain and the second source/drain are disposed in a semiconductor substrate. A dielectric structure is disposed over the semiconductor substrate. A first memory cell is disposed in the dielectric structure and over the semiconductor substrate, where the first memory cell has a first electrode and a second electrode, where the first electrode of the first memory cell is electrically coupled to the first source/drain of the first transistor. A second memory cell is disposed in the dielectric structure and over the semiconductor substrate, where the second memory cell has a first electrode and a second electrode, where the first electrode of the second memory cell is electrically coupled to the second source/drain of the first transistor.
    Type: Grant
    Filed: December 7, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Fa-Shen Jiang, Hsia-Wei Chen, Hsun-Chung Kuang, Hai-Dang Trinh, Cheng-Yuan Tsai
  • Publication number: 20240120315
    Abstract: A semiconductor package includes a first semiconductor die and a second semiconductor die disposed laterally adjacent one another. The semiconductor package includes a semiconductor bridge overlapping a first corner of the first semiconductor die and a second corner of the second semiconductor die. The semiconductor bridge electrically couples the first semiconductor to the second semiconductor die. The semiconductor package includes a third semiconductor die and a fourth semiconductor die electrically coupled to the first semiconductor die and the second semiconductor die, respectively. The semiconductor bridge is interposed between the third semiconductor die and the fourth semiconductor die.
    Type: Application
    Filed: February 15, 2023
    Publication date: April 11, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Fa Chen, Tze-Chiang Huang, Yun-Han Lee, Lee-Chung Lu
  • Publication number: 20240115790
    Abstract: Disclosed is a drainage bottle system comprising: a system housing, a drainage bottle, a drainage tube, a motorless suction device and a liquid detection device, wherein a piezoelectric suction pump of the motorless suction device generates a negative pressure by means of piezoelectric effect to drive the drainage tube to suck and collect a liquid to be detected into the drainage bottle.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 11, 2024
    Applicant: PACIFIC HOSPITAL SUPPLY CO., LTD.
    Inventors: Jung-Yen TSAI, Ming-Chung CHEN, Hsuan-Chiao HO
  • Publication number: 20240121722
    Abstract: An example device is to monitor communications throughput rates and select modulation and coding protocols in order to minimize specific absorption rates experienced by users of the devices by minimizing or reducing transmission power settings.
    Type: Application
    Filed: March 12, 2021
    Publication date: April 11, 2024
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: I-Chen Lin, Chung-Chun Chen, Cheng-Fang Lin, Hung-Wen Cheng, Isaac Lagnado, Leo Joseph Gerten
  • Patent number: D1024932
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: April 30, 2024
    Assignee: WALSIN LIHWA CORPORATION
    Inventors: Ko-Ming Chen, Shih-Hsiang Wang, An-Hung Lin, Min-Chuan Wu, Shao-Pei Lin, Chien-Chung Ni, Chun-Ying Lin