Abstract: The subject application is directed to a system and method for customizing a document processor interface. A user successfully logs onto a document processing device and selects to generate a customized graphical user-interface. When the user has previously created such an interface, the device retrieves stored selection data associated with the user and uses such data to selectively generate a customized interface. To create the customized interface, the user first selects desired functions to be displayed. The selected functions are then stored in association with user identification information by the device. A tangible output document is capable of being generated inclusive of encoded indicia representing selection data and user identification information.

Abstract: An integrated circuit is configured with a pin for specifying a reset configuration vector of a circuitry within the integrated circuit. The resistance value of a low cost external resistor coupled to the pin is detected and utilized to identify the configuration. Logic on the integrated circuit detects and utilizes the resistor value to index to a configuration vector in a look-up table. The integrated circuit is then configured in accordance with the indexed configuration vector.

Abstract: The present invention provides an implantable electrode with increased stability having a clustered structure wherein the surface of the electrode is covered with a material comprising openings which are filled with sticks or posts. The present invention provides an implantable electrode with increased stability wherein the surface is of the electrode comprises mesh grids which are filled with sticks which are filed with a conducting or insulating material. The present invention provides a method of manufacturing an electrode with increased stability, comprising: depositing a metal layer on an base layer; applying photoresist layer on the metal layer; patterning the photoresist layer providing openings; electroplating the openings with metal; removing the photoresist layer leaving spaces; and filling the spaces with polymer.

Abstract: An ESD protection circuit that protects a mixed-voltage input/output (I/O) buffer circuit in an integrated circuit is provided. The ESD protection circuit includes an ESD discharging circuit coupled to the I/O pad and ESD detection circuit coupled to the discharging circuit providing a means for detecting an ESD and triggering the discharging circuit to conduct the ESD to ground. The ESD discharging circuit comprises stacked NMOS transistors or a field oxide device (FOD). The protection circuit can also be used in an ESD protection circuit for a high-voltage-tolerant input pad or to protect multiple input pads and/or multiple I/O pads in an integrated circuit.

Abstract: An apparatus for interfacing a test head to a peripheral system is provided. The apparatus includes a first unit having a first connection member for providing electrical communication with the peripheral system, a second unit having a second connection member for providing electrical communication with the test system, and pivot members coupling the first unit and the second unit. The pivot members enable motion in the following sequence as one of the first and second unit moves towards the other: a) pivotal motion between the first connection member and the second connection member; and b) linear motion which decreases linear distance between the first connection member and the second connection member while maintaining respective contact surfaces of the first and second connection members in parallel.

Abstract: The present application deals generally with the stimulation of neural tissue by electronic means and specifically with controlling the level of electrical stimulation in order to prevent damage to the neural tissue. Methods presented in the disclosure include detecting current leakage via electrode impedance measurement, electrode capacitance measurement, and testing the electrode response to a test current pulse. Apparatus presented in the disclosure include circuitry and systems capable of performing the methods disclosed.

Abstract: The present invention provides efficient window partitioning algorithms for entropy-encoding. The present invention enhances compression performance of entropy encoding based on the approach of modeling a dataset with the frequencies of its n-grams. The present invention may then employ approximation algorithms to compute good partitions in time O(s*log s) and O(s) respectively, for any data segment S with length s.

Abstract: Embodiments of the invention provide a method and apparatus, such as a processing chamber, suitable for etching high aspect ratio features. Other embodiments include a showerhead assembly for use in the processing chamber. In one embodiment, a processing chamber includes a chamber body having a showerhead assembly and substrate support disposed therein. The showerhead assembly includes at least two fluidly isolated plenums, a region transmissive to an optical metrology signal, and a plurality of gas passages formed through the showerhead assembly fluidly coupling the plenums to the interior volume of the chamber body.

Abstract: An apparatus and method for accessing data from a storage medium is disclosed. The apparatus fetches a data block from the storage medium via an accessing unit, and corrects an error of the data block by an error correction code (ECC) decoder according to an ECC of the data block. The apparatus also includes an error detection code (EDC) processor for calculating an EDC of each data sector of the data block, and a flag register for storing a flag associated with each data sector. The method includes re-fetching a data sector if the associated flag indicates the EDC of the data sector is incorrect; and bypassing a data sector if the associated flag indicates that the EDC of the data sector is correct, even though the ECC of the data block indicates that the data sector contains an error.

Abstract: A programmable logic device (PLD) includes a central processing unit (CPU) and a programmable interface coupled to the CPU, wherein the programmable interface includes a core designated by a user. The programmable interface core allows devices, both on and off-chip, to communicate with the CPU. In one embodiment, the programmable interface core includes a crosspoint switch for coupling a plurality of devices and the CPU. Re-programmability of the PLD provides significant flexibility in providing features that can be parameterized based on the user's needs and/or associated design. Specifically, these parameterized features can be implemented in programmable resources on the PLD, thereby allowing these features to be modified at any time. Moreover, only those resources actually needed for the programmable interface core need be implemented, thereby allowing the user to optimize use of the remainder of the PLD.

Abstract: In electrically stimulating neural tissue it is important to prevent over stimulation and unbalanced stimulation which would cause damage to the neural tissue, the electrode, or both. It is critical that neural tissue in not subjected to any direct current or alternating current above a safe threshold. Further, it is important to identify defective electrodes as continued use may result in neural and further electrode damage. The present invention presents system and stimulator control mechanisms to prevent damage to neural tissue.

Abstract: The present invention relates to a sealed box apparatus for a pool cleaning machine wherein the sealed box is installed inside the body of the pool cleaning machine. The box contains and seals electronic devices for the cleaning machine. At least one waterproofed tube is provided for inputting and outputting wires for connecting the electronic devices sealed inside the box with peripherals. A transparent portion is installed on one side of the box. A humidity display is installed inside the box, and corresponds to the position of the transparent portion. The sealed box provides an excellent airproof seal for protecting the inside electronic circuits from being waterlogged, and to provide excellent heat elimination, while leakage into the sealed box may be conveniently monitored in real-time.

Abstract: A semiconductor device has two types of multi-gate transistors, N channel and P channel, in which each type has a bottom gate and a top gate. The bottom gate and the top gate of the N channel transistors are chosen to be of a metal or metals that are for optimizing the performance of the N channel transistors. Similarly, the bottom gate and the top gate of the P channel transistors are chosen to be of a metal or metals that are for optimizing the performance of the P channel transistors.

Abstract: This invention relates to new quinolone based compounds that exhibit prolyl hydroxylase inhibitory activity. This invention also relates to methods of increasing HIF levels or activity in a subject or treating a condition associated with HIF levels or activity in a subject by administering to the subject at least one quinolone based compound. This invention further involves assays for the detection of a hydroxyproline residue in a HIF molecule.

Abstract: A novel system and method for determining a qualified loan applicant is disclosed. In one embodiment, applicant information and potential first liens are compared to determine candidate first liens based on applicant information. Debt-to-income ratio requirement information associated with the candidate first liens is stored. Candidate second liens associated with the candidate first liens are determined, and the debt-to-income ratio of the combination of the candidate first and second liens is determined. Qualifying combinations are determined by comparing the debt-to-income ratio to the stored debt-to-income ratio requirement. In another embodiment, candidate first liens are organized by common characteristics and outputted with associated second liens. Other embodiments, such as optimizations on the system and method, are disclosed herein.

Abstract: A system and method for determining and communicating a traffic anomaly at a point to at least one receiving vehicle includes a traffic information center and at least one probe device. Each probe device is configured to determine and store within an on-board database a current value of a condition at the point during each of a plurality of trips, so as to build a history of condition values. The probe device is further configured to compare the current value to the historic values during each trip, and selectively transmit notification of an anomalous value to the center.

Abstract: A programmable logic device (PLD) includes a central processing unit (CPU) and a programmable interface coupled to the CPU, wherein the programmable interface includes a core designated by a user. The programmable interface core allows devices, both on and off-chip, to communicate with the CPU. In one embodiment, the programmable interface core includes a crosspoint switch for coupling a plurality of devices and the CPU. Re-programmability of the PLD provides significant flexibility in providing features that can be parameterized based on the user's needs and/or associated design. Specifically, these parameterized features can be implemented in programmable resources on the PLD, thereby allowing these features to be modified at any time. Moreover, only those resources actually needed for the programmable interface core need be implemented, thereby allowing the user to optimize use of the remainder of the PLD.

Abstract: Method and apparatus for controlling access to memory circuitry is described. In one example, access to the memory circuitry is controlled among a plurality of bus interfaces of a data processing system. A plurality of ports is respectively coupled to said plurality of bus interfaces. Arbitration logic is configured for communication with the plurality of ports. The arbitration logic arbitrates access to the memory circuitry among the plurality of bus interfaces on a time shared basis.

Abstract: The invention is a method of automatically adjusting an electrode array to the neural characteristics of an individual subject. The response to electrical neural stimulation varies from subject to subject. Measure of impedance may be used to predict the electrode height from the neural tissue and, thereby, predict the threshold of perception. Alternatively, electrode height may be measured directly to predict the threshold of perception. Also, impedance measurement may be used to quickly identify defective electrodes and proper electrode placement.