Patents by Inventor An Feng

An Feng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240223934
    Abstract: A headphone capable of being bent outward includes: a hanging rod; a support arm, provided on one side of the hanging rod; an earmuff, provided on one side of the support arm; and an external universal joint, provided between the hanging rod and support arm, allowing the support arm to be bent relative to the hanging rod. When a person wears the present invention, the support arm is bent outward, forward or backward, allowing the earmuff to be separated from the person's ear, thereby capable of hearing the conversation clearly for convenient talking.
    Type: Application
    Filed: January 3, 2023
    Publication date: July 4, 2024
    Inventor: Chih-Feng Ho
  • Publication number: 20240222243
    Abstract: An integrated circuit device substrate includes a first glass layer with a redistribution layer mounting region and an integrated circuit device mounting region, wherein a first major surface of the first glass layer is overlain by a first dielectric layer, and wherein the first glass layer includes a first plurality of conductive pillars. A second glass layer is on the redistribution layer mounting region on the first glass layer, wherein the second glass layer includes a second dielectric layer on a second major surface thereof, and wherein the second dielectric layer is bonded to the first dielectric layer on the first major surface of the first glass layer, the second glass layer including a second plurality of conductive pillars electrically interconnected with the first plurality of conductive pillars in the first glass layer.
    Type: Application
    Filed: December 30, 2022
    Publication date: July 4, 2024
    Applicant: Intel Corporation
    Inventors: Bohan Shan, Haobo Chen, Bai Nie, Srinivas Venkata Ramanuja Pietambaram, Gang Duan, Kyle Jordan Arrington, Ziyin Lin, Hongxia Feng, Yiqun Bai, Xiaoying Guo, Dingying Xu, Kristof Darmawikarta
  • Publication number: 20240217856
    Abstract: The present disclosure discloses a method for preparing a sludge conditioner from water supply sludge and a use of the sludge conditioner. The sludge conditioner is prepared by mixing the water supply sludge and sewage sludge. The method includes the following steps: mixing the water supply sludge and the sewage sludge in proportion, adding a pore forming agent, stirring a mixture uniformly, and conducting mechanical dehydration, air-drying, grinding, sieving, and pyrolysis to obtain the sludge conditioner. The conditioner is used in advanced oxidation technologies such as catalyzed/activated ozone oxidation, persulfate oxidation, and Fenton oxidation to condition the sludge and enhance dehydration performance.
    Type: Application
    Filed: July 27, 2022
    Publication date: July 4, 2024
    Inventors: Bin DONG, Tingting XIAO, Zuxin XU, Haibin WU, Dianchang WANG, Chong LI, Danni SHEN, Xiankai WANG, Feng LIU, Sisi CHEN
  • Publication number: 20240223314
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive information indicating whether hybrid automatic repeat request (HARQ) feedback is disabled for one or more HARQ processes. The UE may receive a downlink communication. The downlink communication may include a HARQ process identifier that indicates a HARQ process to be used for the downlink communication. The UE may selectively provide HARQ feedback for the downlink communication based at least in part on the HARQ identifier and information indicating whether HARQ feedback is disabled for the HARQ process. Numerous other aspects are provided.
    Type: Application
    Filed: January 10, 2024
    Publication date: July 4, 2024
    Inventors: Bharat SHRESTHA, Umesh PHUYAL, Xiao Feng WANG, Alberto RICO ALVARINO
  • Publication number: 20240222261
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a first die and a second die. The first die includes a substrate, an interconnection structure and a capacitor structure. The substrate has a front-side surface and a back-side surface. The interconnection structure is disposed over the front-side surface. The capacitor structure extends from the back-side surface to the front-side surface and into the interconnection structure. The second die is disposed over the back-side surface and is bonded to the first die. A method for forming a semiconductor structure is also provided.
    Type: Application
    Filed: January 4, 2023
    Publication date: July 4, 2024
    Inventors: MIN-FENG KAO, DUN-NIAN YAUNG, HSING-CHIH LIN, JEN-CHENG LIU
  • Publication number: 20240219437
    Abstract: An in-memory computing (IMC) memory device and an IMC method are provided. The IMC memory device includes: a plurality of memory cells, the memory cells forming a plurality of computing layers; and a plurality of computing layer connectors, the computing layer connectors connecting between the computing layers. A first computing layer input is inputted into a first computing layer of the computing layers. The first computing layer generates a first computing layer output. A first computing layer connector of the computing layer connectors converts the first computing layer output into a second computing layer input. The first computing layer connector inputs the second computing layer input into a second computing layer of the computing layers. The computing layer connectors are a plurality of inverters, a plurality of voltage-to-voltage converters or a plurality of current-to-voltage converters.
    Type: Application
    Filed: December 29, 2022
    Publication date: July 4, 2024
    Inventors: Yu-Yu LIN, Feng-Min LEE
  • Publication number: 20240222484
    Abstract: Transistors and integrated circuitry including a 2D channel material layer within a stack of material layers further including one or more insulator (e.g., dielectric) materials above and/or below the 2D channel material layer. These supporting insulator layers may be non-sacrificial while other material layers within a starting material stack may be sacrificial, replaced, for example, with gate insulator and/or gate material. In some exemplary embodiments, the 2D channel material is a metal chalcogenide and the supporting insulator layer is advantageously a dielectric material composition having a low dielectric constant.
    Type: Application
    Filed: December 30, 2022
    Publication date: July 4, 2024
    Applicant: Intel Corporation
    Inventors: Chia-Ching Lin, Kevin P. O'Brien, Ashish Verma Penumatcha, Chelsey Dorow, Kirby Maxey, Carl H. Naylor, Tao Chu, Guowei Xu, Uygar Avci, Feng Zhang, Ting-Hsiang Hung, Ande Kitamura, Mahmut Sami Kavrik
  • Publication number: 20240221971
    Abstract: The present invention provides a polypropylene cable protective layer and a preparation method thereof. The polypropylene cable protective layer sequentially includes a dielectric layer, a buffer layer and an insulating layer from the inside to the outside, and the thickness of the dielectric layer accounts for 5%˜12% of the thickness of the polypropylene cable protective layer; the thickness of the buffer layer accounts for 17%˜25% of the thickness of the polypropylene cable protective layer; the dielectric layer, the buffer layer and the insulating layer are respectively obtained by the wrapping of a polypropylene film A, a polypropylene film B and a polypropylene film C. The polypropylene cable protective layer of the present invention forms a dielectric gradient, and realizes the improvement of the insulation strength and voltage level of the power cable, and the increase of the transmission capability.
    Type: Application
    Filed: September 18, 2021
    Publication date: July 4, 2024
    Applicant: ELECTRIC POWER RESEARCH INSTITUTE. CHINA SOUTHERN POWER GRID
    Inventors: Yifan ZHANG, Mingli FU, Shuai HOU, Xiaolin LI, Lei JIA, Baojun HUI, Bin FENG, Wenbo ZHU, Yunpeng ZHAN, Yongjie NIE
  • Publication number: 20240224537
    Abstract: A thin film transistor includes an active layer located over a substrate, a first gate stack including a stack of a first gate dielectric and a first gate electrode and located on a first surface of the active layer, a pair of first contact electrodes contacting peripheral portions of the first surface of the active layer and laterally spaced from each other along a first horizontal direction by the first gate electrode, a second contact electrode contacting a second surface of the active layer that is vertically spaced from the first surface of the active layer, and a pair of second gate stacks including a respective stack of a second gate dielectric and a second gate electrode and located on a respective peripheral portion of a second surface of the active layer.
    Type: Application
    Filed: March 19, 2024
    Publication date: July 4, 2024
    Inventors: Yong-Jie Wu, Hui-Hsien Wei, Yen-Chung HO, Chia-Jung Yu, Chung-Te Lin, Feng-Cheng Yang, Pin-Cheng Hsu
  • Publication number: 20240217380
    Abstract: A wireless charging-based underwater energy rescue method for an autonomous underwater vehicle (AUV) cluster fully considers the actual situation of an AUV rescue system. For example, a rescue-side AUV takes speed as a constraint in order for rapid rescue, while a demand-side AUV takes minimum energy consumption as a constraint to select an optimal charging point. In addition, optimal path planning is performed in an environment with a dynamic disturbance such as a fish school. The wireless charging-based underwater energy rescue method combines path planning algorithms, namely rapidly-exploring random trees (RRT) and dynamic window approach (DWA), to achieve rapid and effective underwater energy rescue of AUVs.
    Type: Application
    Filed: March 15, 2024
    Publication date: July 4, 2024
    Applicant: Shenzhen Technology University
    Inventors: Xiaolin MOU, Zhengji FENG, Disha YANG, Heyan LI, Franz RAPS
  • Publication number: 20240219655
    Abstract: A semiconductor device and associated methods are disclosed. In one example, the electronic device includes a photonic die and a glass substrate. In selected examples, the semiconductor device includes one or more turning mirrors to direct an optical signal between the photonic die and the glass substrate. Configurations of turning mirrors are provided to improve signal integrity and manufacturability.
    Type: Application
    Filed: December 28, 2022
    Publication date: July 4, 2024
    Applicant: Intel Corporation
    Inventors: Haobo Chen, Bohan Shan, Bai Nie, Brandon C. Marin, Dingying Xu, Gang Duan, Hongxia Feng, Jeremy D. Ecton, Kristof Darmawikarta, Kyle Jordan Arrington, Srinivas Venkata Ramanuja Pietambaram, Xiaoying Guo, Yiqun Bai, Ziyin Lin
  • Publication number: 20240223165
    Abstract: The present application discloses an oscillation device and a method for oscillation thereof, in which a control signal is generated from a control circuit to a ring oscillation circuit. The ring oscillation circuit generates an oscillation signal with a first signal frequency at start up oscillation, firstly. Further, the ring oscillation circuit modulates an oscillation frequency to drive the oscillation signal change from the first signal frequency to a higher second signal frequency. Thus, the present application provides the ring oscillation device generating the oscillation signal with a lower frequency at starting up oscillation, and then make the oscillation signal change to a higher frequency. Hereby, the present application provides the oscillation signal operated at a higher operating frequency.
    Type: Application
    Filed: November 16, 2023
    Publication date: July 4, 2024
    Inventor: Ming-Feng Huang
  • Publication number: 20240222407
    Abstract: Some embodiments relate to an image sensor. The image sensor includes a semiconductor substrate including a pixel region and a peripheral region. A backside isolation structure extends into a backside of the semiconductor substrate and laterally surrounds the pixel region. The backside isolation structure includes a metal core, and a dielectric liner separates the metal core from the semiconductor substrate. A conductive feature is disposed over a front side of the semiconductor substrate. A through substrate via extends from the backside of the semiconductor substrate through the peripheral region to contact the conductive feature. The through substrate via is laterally offset from the backside isolation structure. A conductive bridge is disposed beneath the backside of the semiconductor substrate and electrically couples the metal core of the backside isolation structure to the through substrate via.
    Type: Application
    Filed: February 15, 2024
    Publication date: July 4, 2024
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Wen-Chang Kuo, Sheng-Chau Chen, Feng-Chi Hung, Sheng-Chan Li
  • Publication number: 20240221163
    Abstract: Disclosed is a method and apparatus for measuring a deviation angle of a gaze position based on 3D reconstruction. A face image sequence of a testee is acquired. Covering conditions of the face image sequence are obtained. Key frame images are determined and input into a second neural network to obtain feature point heat maps that are converted into facial feature point coordinates. An objective function is constructed. A head pose corresponding to the key frame images is obtained. An eyeball position is initialized. An eyeball rotation angle of a reference gaze position is set as a preset angle. 3D coordinates of an eyeball in a reference gaze position image in a head coordinate system is solved. 3D coordinates of an eyeball in a to-be-measured image in the head coordinate system are fixed. An eyeball rotation angle is solved. A deviation angle of a gaze position is obtained.
    Type: Application
    Filed: July 14, 2023
    Publication date: July 4, 2024
    Inventors: Ruixin Wang, Haotian Lin, Feng Xu, Xinping Yu, Junfeng Lyu
  • Publication number: 20240218902
    Abstract: This application provides a rotating mechanism, a support apparatus, and a terminal with a foldable screen. A problem that a rotating part with a large volume affects lightening and thinning of an existing terminal with a foldable screen is resolved. A transmission assembly is in a transmission connection to a first swing arm and a second swing arm, so that the first swing arm and the second swing arm rotate between a folded position and an unfolded position. When the first swing arm and the second swing arm rotate from the folded position to the unfolded position, a connection plate moves in a direction away from the shaft cover, and when the first swing arm and the second swing arm rotate from the unfolded position to the folded position, the connection plate moves in a direction close to the shaft cover.
    Type: Application
    Filed: April 26, 2022
    Publication date: July 4, 2024
    Inventors: Lei FENG, Yameng WEI, Wei ZHANG, Wenxing YAO
  • Publication number: 20240222511
    Abstract: Provided is an amorphous silicon thin-film transistor including an amorphous silicon semiconductor layer, a source electrode, and a drain electrode that are successively disposed on a base substrate. Ions doped by an ion implantation process are present in a region, proximal to the source electrode and the drain electrode, of the amorphous silicon semiconductor layer. A concentration of the ions in a surface region, proximal to the source electrode and the drain electrode, of the amorphous silicon semiconductor layer is greater than or equal to 5*10{circumflex over (?)}20 atoms/cc.
    Type: Application
    Filed: September 29, 2021
    Publication date: July 4, 2024
    Inventors: Haidong Su, Feng Li, Yezhou Fang, Lei Yao, Lei Yan, Chenglong Wang, Kai Li, Xiaogang Zhu, Hua Yang, Lin Hou, Yun Gao
  • Publication number: 20240221679
    Abstract: An electronic device includes an insulating layer, a first conductive portion, a second conductive portion, a connective portion, a processing unit and an electronic element. The first conductive portion and the second conductive portion are respectively corresponding to opposite sides of the insulating layer. The connective portion is at least partially disposed in the insulating layer. The first conductive portion is electrically connected to the second conductive portion through the connective portion. The processing unit and the electronic element are respectively corresponding to opposite sides of the insulating layer. The processing unit and the electronic element are overlapped with the connective portion. The thickness of the processing unit is greater than the thickness of the first conductive portion.
    Type: Application
    Filed: February 15, 2024
    Publication date: July 4, 2024
    Inventors: Kuan-Feng LEE, Yuan-Lin WU
  • Publication number: 20240222259
    Abstract: Methods, systems, apparatus, and articles of manufacture to produce integrated circuit (IC) packages having silicon nitride adhesion promoters are disclosed. An example IC package disclosed herein includes a metal layer on a substrate, a layer on the metal layer, the layer including silicon and nitrogen, and solder resist on the layer.
    Type: Application
    Filed: December 28, 2022
    Publication date: July 4, 2024
    Inventors: Haobo Chen, Bohan Shan, Xiyu Hu, Rhonda Jack, Catherine Mau, Hongxia Feng, Xiao Liu, Wei Wei, Srinivas Pietambaram, Gang Duan, Xiaoying Guo, Dingying Xu, Kyle Arrington, Ziyin Lin, Hiroki Tanaka, Leonel Arana
  • Publication number: 20240221858
    Abstract: A memory device includes: a memory cell array comprising a plurality of memory cells, the plurality of memory cells comprising a plurality of data memory cells including a first data memory cell and a plurality of backup memory cells including a first backup memory cell; a storage storing an error table configured to record errors in the plurality of data memory cells, the error table including a plurality of error table entries, each error table entry corresponding to one of the plurality of data memory cell and having an address and a failure count; and a controller configured to replace the first data memory cell with the first backup memory cell based on the error table.
    Type: Application
    Filed: March 18, 2024
    Publication date: July 4, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hiroki Noguchi, Ku-Feng Lin, Yih Wang
  • Publication number: 20240222339
    Abstract: In an embodiment, a device includes a first integrated circuit die, wherein the first integrated circuit die includes a substrate formed of a semiconductor material and a conductive via penetrating through the substrate; a second integrated circuit die disposed laterally adjacent to the first integrated circuit die; a first gap-filling layer disposed between the first integrated circuit die and the second integrated circuit die, wherein the first gap-filling layer is formed of a material selected from silicon, silicon carbide, silicon oxynitride, silicon nitride, the semiconductor material of the substrate, or a combination thereof; and a third integrated circuit die attached to the first integrated circuit die in a face-to-back manner.
    Type: Application
    Filed: January 10, 2023
    Publication date: July 4, 2024
    Inventors: Kuo-Chiang Ting, Sung-Feng Yeh, Ta Hao Sung