Patents by Inventor An FU

An FU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230050183
    Abstract: Disclosed are a display panel and a sound box. The display panel includes a screen body, a cover plate, a protrusion portion, a first adhesive portion and a second adhesive portion. The first adhesive portion is filled between a region of the cover plate exposed from the protrusion portion and the screen body, and the second adhesive portion is filled between the protrusion portion and the screen body, such that no gap is generated between the cover plate and the screen body and between the protrusion portion and the screen body, so as to eliminate bubbles visible to human eyes after a defoaming treatment of the screen body and the cover plate, thereby improving a display effect of the display panel.
    Type: Application
    Filed: November 2, 2022
    Publication date: February 16, 2023
    Applicant: KunShan Go-Visionox Opto-Electronics Co., Ltd.
    Inventors: Zhaoji ZHU, Liwei DING, Fu LIAO, Bo ZHANG, Hongqi HOU, Xuebin LI
  • Publication number: 20230047748
    Abstract: A method of fusing an image, a method of training an image fusion model, an electronic device, and a storage medium. The method of fusing the image includes: encoding a stitched image obtained by stitching a foreground image and a background image, so as to obtain a feature map; and decoding the feature map to obtain a fused image, wherein the feature map is decoded by: performing a weighting on the feature map by using an attention mechanism, so as to obtain a weighted feature map; performing a fusion on the feature map according to feature statistical data of the weighted feature map, so as to obtain a fused feature; and decoding the fused feature to obtain the fused image.
    Type: Application
    Filed: October 26, 2022
    Publication date: February 16, 2023
    Applicant: BEIJING BAIDU NETCOM SCIENCE TECHNOLOGY CO., LTD.
    Inventors: Fu LI, Tianwei LIN
  • Publication number: 20230048551
    Abstract: A lubricating system is disclosed. The lubricating system includes: at least one first to-be-lubricated component, wherein an inlet of each of the at least one first to-be-lubricated component is connected with a first lubrication oil inlet pipe, and an outlet of the each of the at least one first to-be-lubricated component is connected with a first lubrication oil outlet pipe; and at least one second to-be-lubricated component, wherein an inlet of each of the second to-be-lubricated component is connected with a second lubrication oil inlet pipe, and an outlet of the each of the at least one second to-be-lubricated component is connected with a second lubrication oil outlet pipe. An operating pressure of the each of the at least one first to-be-lubricated component is different from a working pressure of the each of the at least one second to-be-lubricated component.
    Type: Application
    Filed: August 31, 2022
    Publication date: February 16, 2023
    Applicant: YANTAI JEREH PETROLEUM EQUIPMENT & TECHNOLOGIES CO., LTD.
    Inventors: Xiaoyu FENG, Dawei ZHAO, Liang LV, Yongcheng LIU, Zhongzhang MA, Sheng CHANG, Shanwu FU
  • Publication number: 20230053125
    Abstract: An electronic package is provided, in which a circuit board and a circuit block are embedded in an encapsulating layer at a distance to each other, and circuit structures are formed on the two opposite surfaces of the encapsulating layer with electronic components arranged on one of the circuit structures. The circuit block and the circuit board embedded in the encapsulating layer are spaced apart from each other to allow to separate current conduction paths. As such, the circuit board will not overheat, and issues associated with warpage of the circuit board can be eliminated. Moreover, by embedding the circuit block and the circuit board in the encapsulating layer at a distance to each other, the structural strength of the encapsulating layer can be improved.
    Type: Application
    Filed: November 1, 2022
    Publication date: February 16, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Yu-Lung Huang, Chih-Ming Huang, Kuo-Hua Yu, Chang-Fu Lin
  • Publication number: 20230051641
    Abstract: An enhanced session establishment procedure is proposed for MTU parameter handling under intersystem change between 5GS and EPS. A PDU session of “Ethernet” or “Unstructured” PDU session type can be transferred to a PDN connection of “non-IP” PDN type, thus the UE can request the non-IP link MTU parameter in the PDU session establishment procedure. A PDN connection of “non-IP” PDN type can be transferred to a PDU session of “Unstructured” PDU session type, thus the UE can request the Unstructured link MTU parameter in the default EPS bearer context activation procedure.
    Type: Application
    Filed: July 8, 2022
    Publication date: February 16, 2023
    Inventors: Chien-Chun Huang-Fu, Yu-Hsin Lin
  • Publication number: 20230047243
    Abstract: A cryogen-free high-temperature superconductor undulator structure is provided. The superconductor undulator structure includes a magnetic core body and a coil structure. The magnetic core body includes a first and a second half magnetic pole arrays that are vertically aligned, a plurality of first winding cores in the first half magnetic pole array, and a plurality of second winding cores in the second half magnetic pole array. The coil structure is wound on the first winding cores and the second winding cores of the magnetic core body. The coil structure includes a plurality of first superconductor tapes in contact with each of the first winding cores and each of the second winding cores, and a plurality of second superconductor tapes, each of the second superconductor tapes is in contact with two adjacent first superconductor tapes. A method of manufacturing a cryogen-free high-temperature superconductor undulator structure is also provided.
    Type: Application
    Filed: August 16, 2021
    Publication date: February 16, 2023
    Inventors: Jyh-Chyuan JAN, Chi-Chuan TSAI, Fu-Yuan LIN, Ching-Shiang HWANG
  • Publication number: 20230052348
    Abstract: Provided herein are myeloid cell leukemia 1 protein (Mcl-1) inhibitors, methods of their preparation, related pharmaceutical compositions, and methods of using the same. For example, provided herein are compounds of Formula I, and pharmaceutically acceptable salts thereof and pharmaceutical compositions containing the compounds. The compounds and compositions provided herein may be used, for example, in the treatment of diseases or conditions, such as cancer.
    Type: Application
    Filed: October 14, 2021
    Publication date: February 16, 2023
    Applicant: AMGEN INC.
    Inventors: Sean P BROWN, David Karl BEDKE, Michael R. DEGRAFFENREID, Jiasheng FU, Zhinghong LI, Felix GONZALEZ LOPEZ DE TURISO, Ana GONZALEZ BUENROSTRO, Michael W. GRIBBLE JR., Michael G. JOHNSON, Todd J. KOHN, Kexue LI, Yunxiao LI, Mike Elias LIZARZABURU, Yosup REW, Joshua TAYGERLY, Yingcai WANG, Xuelei YAN, Ming YU, Jiang ZHU, Manuel ZANCANELLA, Xian Yun JIAO, Liusheng ZHU, Xianghong WANG, Julio C. MEDINA, Jason A. DUQUETTE, Jonathan B. HOUZE, Marc VIMOLRATANA, Mario G. CARDOZO, Alan C. CHENG
  • Publication number: 20230047402
    Abstract: A method to improve a lithographic process for imaging a portion of a patterning device pattern onto a substrate using a lithographic projection having an illumination system and projection optics, the method including: (1) obtaining a simulation model that models projection of radiation by the projection optics, wherein the simulation model models an effect of an obscuration in the projection optics, and configuring, based on the model, the portion of the patterning device pattern, and/or (2) obtaining a simulation model that models projection of radiation by the projection optics, wherein the simulation model models an anamorphic demagnification of radiation by the projection optics, and configuring, based on the model, the portion of the patterning device pattern taking into account an anamorphic manufacturing rule or anamorphic manufacturing rule ratio.
    Type: Application
    Filed: October 21, 2022
    Publication date: February 16, 2023
    Applicant: ASML NETHERLANDS B.V.
    Inventor: Duan-Fu Stephen HSU
  • Publication number: 20230049696
    Abstract: A head-mounted display including an image generator, a projection lens, and a waveguide is provided. The image generator is configured to provide an image beam. The projection lens is disposed on a path of the image beam. The projection lens has an image side and an object side. The image generator is configured at the image side. The projection lens includes a first lens element and a lens element group. The lens element group is disposed between the image generator and the first lens element. A first central axis of the first lens element and a second central axis of the lens element group are not overlapped. The waveguide is disposed on the path of the image beam and located at the object side of the projection lens.
    Type: Application
    Filed: July 12, 2022
    Publication date: February 16, 2023
    Applicant: Coretronic Corporation
    Inventors: Fu-Ming Chuang, Hsin-Hsiang Lo
  • Publication number: 20230045840
    Abstract: A method for performing an in-memory computation includes: storing data in memory cells of a memory array, the data including weights for computation; determining whether an update command to change at least one of the weights is received; in response to receiving the update command, performing a write operation on the memory array to update the at least one weight; and disabling the write operation on the memory array until receiving a next update command to change the at least one weight.
    Type: Application
    Filed: March 25, 2022
    Publication date: February 16, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: YU-DER CHIH, CHIA-FU LEE
  • Publication number: 20230052494
    Abstract: A sensing system for sensing a potential complication at a venous catheter site. The system includes a sensor module for attachment at the site of the catheter. The sensor module includes a pressure sensor configured to generate pressure data representing measured pressure at the site of the catheter; a temperature sensor configured to generate temperature data representing measured temperature at the site of the catheter; and two pairs of bio impedance electrodes that generate bioelectrical signals representing bioelectrical activity at the site of venous catheter and a transmitter for transmitting the pressure, temperature data and bio impedance data.
    Type: Application
    Filed: January 18, 2021
    Publication date: February 16, 2023
    Applicant: B. Braun Melsungen AG
    Inventors: Yasotha Padmanathan, Ka Hwee Kong, Yie Miin Lee, YongJi Fu, Hui Kuun Teoh, Noraini Jalil, Sharienna Sharman, Aik Aun Tan
  • Publication number: 20230046058
    Abstract: A memory structure including a substrate, a first dielectric layer, a second dielectric layer, a charge storage layer, an oxide layer, and a conductive layer is provided. The first dielectric layer is disposed on the substrate. The second dielectric layer is disposed on the first dielectric layer. The charge storage layer is disposed between the first dielectric layer and the second dielectric layer. The oxide layer is located at two ends of the charge storage layer and is disposed between the first dielectric layer and the second dielectric layer. The conductive layer is disposed on the second dielectric layer.
    Type: Application
    Filed: November 3, 2022
    Publication date: February 16, 2023
    Applicant: United Microelectronics Corp.
    Inventors: Chia-Hung Chen, Yu-Huang Yeh, Chuan-Fu Wang
  • Publication number: 20230049501
    Abstract: A service processing method, performed by a cloud application management server, includes: upon receiving an allocation request from a target terminal, acquiring N pieces of selection reference information corresponding to a pending edge server and related to the target terminal and running reference information, the pending edge server being one of P edge servers connected to the cloud application management server; upon determining that the pending edge server meets a requirement of providing a running service of a target cloud application for the target terminal, determining a connection reference score corresponding to the pending edge server; storing the connection reference score and identification information about the pending edge server into a candidate set; and transmitting the candidate set to the target terminal.
    Type: Application
    Filed: October 31, 2022
    Publication date: February 16, 2023
    Inventors: Shili XU, Bingwu ZHONG, Yabin FU, Yanhui LU, Kai HONG, Xiaohu MA, Yulin HU
  • Publication number: 20230052380
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a substrate, at least two gate structures disposed over the substrate, each of the at least two gate structures including a gate electrode and a spacer disposed along sidewalls of the gate electrode, wherein the spacer includes a refill portion and a bottom portion, the refill portion of the spacer has a funnel shape such that a top surface of the refill portion of the spacer is larger than a bottom surface of the refill portion of the spacer, and a source/drain contact disposed over the substrate and between the spacers of the at least two gate structures.
    Type: Application
    Filed: October 31, 2022
    Publication date: February 16, 2023
    Inventors: Cheng-Yu Yang, Yen-Ting Chen, Wei-Yang Lee, Fu-Kai Yang, Yen-Ming Chen
  • Publication number: 20230048797
    Abstract: Methods and apparatuses are disclosed for Hybrid Automatic Repeat reQuest Acknowledgement, HARQ-ACK, feedback. In one embodiment, a method implemented in a wireless device, WD, comprises receiving, from a network node, a first Downlink Control Information, DCI, scheduling a physical downlink shared channel, PDSCH; and receiving, from the network node, a second DCI, the second DCI comprising a HARQ-ACK feedback request trigger triggering a HARQ-ACK feedback for the PDSCH scheduled by the first DCI. In another embodiment, a method implemented in a network node comprises transmitting a first Downlink Control Information, DCI, scheduling the PDSCH; and transmitting a second DCI, the second DCI comprising a HARQ-ACK feedback request trigger triggering a HARQ-ACK feedback for the PDSCH scheduled by the first DCI.
    Type: Application
    Filed: October 27, 2022
    Publication date: February 16, 2023
    Inventors: Reem KARAKI, Havish KOORAPATY, Jung-Fu CHENG, Gen LI, Stephen GRANT, Daniel CHEN LARSSON
  • Publication number: 20230049010
    Abstract: Semiconductor structures and methods for manufacturing the same are provided. The semiconductor structure includes a substrate and nanostructures suspended over the substrate. The semiconductor structure also includes a gate structure wrapping around the nanostructures and a source/drain structure attached to the nanostructures. The semiconductor structure also includes a contact vertically over the source/drain structure and a first conductive structure vertically over the gate structure. The semiconductor structure also includes a second conductive structure in contact with a top surface of the first conductive structure and a top surface of the contact and including an extending portion laterally sandwiched between the first conductive structure and the contact.
    Type: Application
    Filed: November 1, 2022
    Publication date: February 16, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jia-Heng WANG, Pang-Chi WU, Chao-Hsun WANG, Fu-Kai YANG, Mei-Yun WANG
  • Publication number: 20230051588
    Abstract: A pressure sensitive adhesive (PSA) composition comprises (A) a silicate resin that is a liquid at 25° C. in the absence of any solvent. The (A) silicate resin includes an average of at least one silicon-bonded ethylenically un saturated group per molecule. The PSA composition further comprises (B) an organosilicon compound having at least two silicon-bonded hydrogen atoms per molecule. In addition, the PSA composition comprises (C) a hydrosilylation-reaction catalyst. The (A) silicate resin is miscible in the PSA composition in the absence of any solvent. The PSA composition can be at least partially cured to give a PSA.
    Type: Application
    Filed: December 22, 2020
    Publication date: February 16, 2023
    Inventors: Timothy MITCHELL, Peng-Fei FU, Zhenbin NIU, Yanhu WEI
  • Publication number: 20230052949
    Abstract: A semiconductor device includes a semiconductor film and a gate structure on the semiconductor film. The gate structure includes a multi-stepped gate dielectric on the semiconductor film and a gate electrode on the multi-stepped gate dielectric. The multi-stepped gate dielectric includes a first gate dielectric segment having a first thickness and a second gate dielectric segment having a second thickness that is less than the first thickness.
    Type: Application
    Filed: August 12, 2021
    Publication date: February 16, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Fu LIN, Chia-Ta HSIEH, Tsung-Hao YEH
  • Publication number: 20230047580
    Abstract: A high voltage transistor structure including a substrate, a first isolation structure, a second isolation structure, a gate structure, a first source and drain region, and a second source and drain region is provided. The first isolation structure and the second isolation structure are disposed in the substrate. The gate structure is disposed on the substrate, at least a portion of the first isolation structure, and at least a portion of the second isolation structure. The first source and drain region and the second source and drain region are located in the substrate on two sides of the first isolation structure and the second isolation structure. The depth of the first isolation structure is greater than the depth of the second isolation structure.
    Type: Application
    Filed: August 16, 2021
    Publication date: February 16, 2023
    Applicant: United Microelectronics Corp.
    Inventors: Chin-Hung Chen, Ssu-I Fu, Chih-Kai Hsu, Chun-Ya Chiu, Chia-Jung Hsu, Yu-Hsiang Lin
  • Publication number: 20230051000
    Abstract: A semiconductor structure includes a first dielectric layer on a substrate, a conductive structure disposed in the first dielectric layer and including a terminal portion and an extending portion connecting the terminal portion and extending away from the terminal portion, a second dielectric layer disposed on the first dielectric layer, a conductive via through the second dielectric layer and directly contacting the extending portion, and a dummy via through the second dielectric layer and directly contacting the terminal portion. In a cross-sectional view, a width of the dummy via is smaller than 50% of a width of the conductive via.
    Type: Application
    Filed: October 5, 2021
    Publication date: February 16, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ang Chan, Hsin-Jung Liu, Kun-Ju Li, Chau-Chung Hou, Fu-Shou Tsai, Yu-Lung Shih, Jhih-Yuan Chen, Chun-Han Chen, Wei-Xin Gao, Shih-Ming Lin