Abstract: A lending-borrowing system has a platform. The platform has a borrowing point gaining means, a message releasing means, and a credit point gaining means. The borrowing point gaining means is applied for providing borrowing points to a member. The message releasing means is applied for a member to release a message for lending or borrowing an object. The credit point gaining means is applied for providing a credit point to each member and increasing or decreasing the credit point of the member based on conditions.

Abstract: An antenna module includes a ground radiator, a first antenna, and a second antenna. The first antenna comprises a first radiator, a second radiator, and a third radiator. The first radiator and the second radiator resonate at a low frequency band and a first high frequency band, and a part of the first radiator and the third radiator resonate at a second high frequency band. The second antenna includes a fourth radiator, the second radiator, and a connecting section. The connecting section is connected between the fourth radiator and the second radiator. A part of the fourth radiator, the connecting section, and the second radiator resonate at the low frequency band and the second high frequency band, and the fourth radiator, the connecting section, and a part of the second radiator resonate at the first high frequency band.

Abstract: An object of the present invention is to provide a method for obtaining cells having a high migration ability or cells having a high proliferation ability as cells having an increased therapeutic effect on diseases. The present invention is a method for preparing cells for treating diseases, a method for promoting a migration ability of cells, and a method for promoting a proliferative ability of cells, each of the methods comprising subjecting cells to ultrasonic treatment. The frequency of the ultrasonic treatment is preferably 30 kilohertz to 2.0 megahertz, and the cells are preferably mesenchymal stem cells. In addition, the present invention also includes cells obtained by the preparation method of the present invention.

Abstract: Imaging systems and techniques are described. In some examples, an imaging system generates a segmentation map of an image by processing image data associated with the image using a segmentation mapper. Different object types in the image are categorized into different regions in the segmentation map. The imaging system generates an augmented segmentation map by processing at least the segmentation map using a segmentation map error correction engine. The imaging system generates processed image data by processing the image using the augmented segmentation map.

Abstract: A backlight module has a first side viewing angle luminance LAS1 and a first normal viewing angle luminance LAN1 in the side viewing mode, wherein LAS1/LAN1>50%. The backlight module has a second side viewing angle luminance LAS2 and a second normal viewing angle luminance LAN2 in the narrow viewing mode, wherein LAS2/LAN2<0.5%. The first side angle and the second side angle occur in a slanting direction. The first normal view and the second normal view occur in a normal direction. When executing a side viewing execution step, an upper backlight unit and a lower backlight unit are activated to form the side viewing mode. When executing a narrow viewing execution step, the upper backlight unit is turned off and the lower backlight unit is activated to form the narrow viewing mode. The invention also provides a display device including the backlight module.

Abstract: A ring buffer storage method includes generating data of a first output according to Q input tokens of a large language model (LLM), and writing the data of the first output into last Q column vectors of an updated first cache tensor buffer matrix. A starting memory address of a first cache tensor buffer is shifted according to the number Q of input tokens of the LLM for updating the first cache tensor buffer. The first cache tensor buffer forms a first cache tensor buffer matrix. The updated first cache tensor buffer forms the updated first cache tensor buffer matrix. The first cache tensor buffer matrix includes a plurality of space segments. Each row of the first cache tensor buffer matrix includes C space segments. C is a cache size. The plurality of space segments have continuous memory addresses.

Abstract: Methods and devices are provided that include a magnetic tunneling junction (MTJ) element. A first spacer layer abuts sidewalls of the MTJ element. The first spacer layer has a low-dielectric constant (low-k) oxide composition. A second spacer layer is disposed on the first spacer layer and has a low-k nitride composition.

Abstract: In an embodiment, a device includes: a plurality of redistribution lines over a semiconductor substrate, the redistribution lines including trace portions extending along the semiconductor substrate; a first passivation layer over the redistribution lines, the first passivation layer filling an entirety of an area between the trace portions of the redistribution lines; a passive device over the first passivation layer; a dielectric layer over the passive device; and a die connector extending through the dielectric layer, the die connector physically and electrically coupled to the passive device.

Abstract: In an embodiment, a method includes forming active devices over a semiconductor substrate; forming an interconnect structure over the semiconductor substrate, the interconnect structure comprising a contact pad embedded in a dielectric layer; forming a first passivation layer over the interconnect structure; forming a first opening through the first passivation layer to expose the contact pad; depositing a seed layer over the first passivation layer and in the first opening; forming a sacrificial material over the seed layer; patterning the sacrificial material to reform the first opening and to form a second opening; depositing conductive material to form a first redistribution line in the first opening and a second redistribution line in the second opening; removing the sacrificial material; and attaching an integrated circuit die to the first redistribution line and the second redistribution line.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure includes a first substrate having a first horizontally extending surface and a second horizontally extending surface above the first horizontally extending surface as viewed in a cross-sectional view. The first horizontally extending surface continuously wraps around an outermost perimeter of the second horizontally extending surface in a closed loop as viewed in a plan-view. A second substrate is disposed over the first substrate and includes a third horizontally extending surface above the second horizontally extending surface as viewed in the cross-sectional view. The second horizontally extending surface continuously wraps around an outermost perimeter of the third horizontally extending surface in a closed loop as viewed in the plan-view.

Abstract: A first metal layer extends across memory and logic device regions of a semiconductor structure. A dielectric barrier layer is disposed over the first metal layer. A first dielectric layer is disposed over the dielectric barrier layer in the memory device region and not in the logic device region. Multiple magnetic tunneling junction (MTJ) devices are disposed in the memory device region. A second dielectric layer is disposed in the memory device region and not in the logic device region. The second dielectric layer is disposed over the first dielectric layer and the MTJ devices. An extreme low-k dielectric layer is disposed over the dielectric barrier layer in the logic device region. A conductive feature in the logic device region penetrates the extreme low-k dielectric layer and the dielectric barrier layer to electrically connect to the first metal layer.

Abstract: Semiconductor devices, integrated circuits and methods of forming the same are provided. In one embodiment, a method includes depositing a first dielectric layer over a metal pad disposed over a workpiece, forming a first opening in the first dielectric layer to expose a portion of the metal pad, after the forming of the first opening, forming a second dielectric layer over the exposed portion of the metal pad, depositing a first polymeric material over the second dielectric layer, forming a second opening through the first polymeric material and the second dielectric layer to expose the metal pad, and forming a bump feature over the exposed metal pad.

Abstract: A wafer chip scale package (WCSP) comprises first and second dies in differing voltage domains and an isolation material between the first and second dies and contacting multiple surfaces of each of the first and second dies. The package also comprises a first resin material contacting multiple surfaces of the isolation material, with the isolation material between the resin material and the first and second dies. The package also comprises a fiberglass material contacting a surface of the resin material and a second resin material contacting a surface of the fiberglass material. The package also comprises first and second conductive structures coupled to the first and second dies, respectively. The package also includes a passivation material contacting the first and second dies and the first and second conductive structures.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming an interconnect structure over a substrate. The method further includes forming a passivation layer over the interconnect structure. The method further includes forming a conductive structure over the passivation layer, wherein the conductive structure includes a surrounding portion over the passivation layer, and a concave portion surrounded by the surrounding portion. A height of the surrounding portion is greater than a height of the concave portion calculated from a top surface of the passivation layer. The method further includes forming a liner over the conductive structure, wherein an oxygen-to-silicon ratio of the liner is lower than about 1.8.

Abstract: An electronic device includes opposite first and second sides, opposite third and fourth sides spaced apart along a first direction, and opposite fifth and sixth sides spaced apart along a second direction orthogonal to the first direction, the first and second sides being spaced apart along a third direction orthogonal to the first and second directions. The electronic device includes a molded package, first leads exposed outside the molded package along the first side, and the first leads extending outward from the molded package along a respective one of the third and fourth sides, and second leads exposed outside the molded package along the first side, the second leads having a lateral side exposed outside the molded package along a respective one of the fifth and sixth sides, and the lateral side of the individual second leads being flush with a respective side of the molded package.

Abstract: Techniques are disclosed to use robotic system simulation to control a robotic system. In various embodiments, a communication indicating an action to be performed by a robotic element is received from a robotic control system. Performance of the action by the robotic element is simulated. A state tracking data is updated to reflect a virtual change to one or more state variables as a result of simulated performance of the action. Successful completion of the action by the robotic element is reported to the robotic control system.

Abstract: An electronic device includes a metal back cover, a metal frame, and two radiators. The metal frame disposed at a side of the metal back cover includes two disconnecting parts, a second slot, and two connecting parts. A first slot is formed between each of the disconnecting parts and the metal back cover. The second slot is formed between the two disconnecting parts. The two connecting parts are connected to a side away from the second slot of the two disconnecting parts respectively and are connected to the metal back cover. Each of the radiators connects the metal back cover to the corresponding disconnecting part over the first slot. The two radiators are disposed symmetrically based on the second slot. Each radiator is coupled with the corresponding disconnecting part, the corresponding connecting part, and the metal back cover to resonate a first, a second, and a third frequency band.

Abstract: Systems and techniques are described herein for displaying information. For instance, a device for displaying information is provided. The device may include at least one memory; and at least one processor coupled to the at least one memory and configured to: detect an object in an image of a scene obtained from a first camera; determine that a user is gazing at a representation of the object displayed at a display based on an image of the user obtained from a second camera; and based on determining that the user is gazing at the representation of the object displayed at the display, display, via the display, information associated with the object.

Abstract: Unloading first few rows of pallets from a trailer using an autonomous mobile robot. The robot determines that a pallet is a first in a row where the trailer does not have sufficient space to accommodate the robot. The robot determines a pose of each observable pallet in the trailer and determines a front plane for the pallets in the same row as the target pallet. The robot navigates to a first goal position inside the trailer, based on the pallet and trailer poses, then picks up the pallet. The robot side-shifts toward an adjacent pallet until detecting contact, then adjusts back by a predetermined distance to maximize clearance between the pallet and a side wall of the trailer. The robot navigates backward in a straight line to a second goal position on a ramp, and then proceeds to drop off the pallet in the staging area.