Patents by Inventor An-Hsiu Cheng

An-Hsiu Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210323557
    Abstract: A lane change assistance method is provided. The method includes recognizing styles of two traffic lines corresponding to a lane where a vehicle is located. Whether the vehicle violates traffic rules is determined according to the styles of the two traffic lines when the vehicle is performing an operation of changing lanes. A prompt is issued when the vehicle violates traffic rules.
    Type: Application
    Filed: April 20, 2021
    Publication date: October 21, 2021
    Inventors: HSIU-HUA YEN, JIAN-CHENG LIN, CHIH-PU HSU
  • Publication number: 20210316719
    Abstract: A parking assistance method is provided. The method includes recognizing image features of a traffic line corresponding to a parking position of a vehicle. A category of the parking position of the vehicle is determined based on the image features of the traffic line. Once the vehicle is determined to be parking illegally based on the category of the parking position of the vehicle; a warning is issued.
    Type: Application
    Filed: April 13, 2021
    Publication date: October 14, 2021
    Inventors: JIAN-CHENG LIN, HSIU-HUA YEN, CHIH-PU HSU
  • Publication number: 20210316748
    Abstract: A driving assistance method for operating a vehicle includes establishing a database, wherein the database includes pre-stores keywords, the keywords are defined as words related to traffic; obtaining electronic texts of traffic rules; extracting keywords in the electronic texts according to the database; generating a trigger condition based on the extracted keywords; obtaining a plurality of current driving parameters of the vehicle; and sending a driving assistance command when the current driving parameters satisfy the trigger condition. The invention also provides a vehicle using the driving assistance method.
    Type: Application
    Filed: April 9, 2021
    Publication date: October 14, 2021
    Inventors: CHIH-PU HSU, YI-CHIN WANG, HSIU-HUA YEN, JIAN-CHENG LIN
  • Publication number: 20210313425
    Abstract: A semiconductor device includes a semiconductor substrate, a pair of source/drain regions on the semiconductor substrate, and a gate structure on the semiconductor substrate and between the pair of source/drain regions. The gate structure includes a first metal layer and a second metal layer in contact with the first metal layer. A sidewall of the first metal layer and a top surface of the semiconductor substrate form a first included angle, a sidewall of the second metal layer and the top surface of the semiconductor substrate form a second included angle. The second included angle is different from the first included angle.
    Type: Application
    Filed: June 21, 2021
    Publication date: October 7, 2021
    Inventors: I-HSIU WANG, YEAN-ZHAW CHEN, YING-TING HSIA, JHAO-PING JIANG, CHUN-CHIH CHENG
  • Publication number: 20210269765
    Abstract: A temperature-sensitive cell culture composition is provided. The temperature-sensitive cell culture composition includes a hydrogel, a cellulose, a gelatin and a collagen. Based on 1 part by weight of the collagen, a content of the hydrogel is between 0.03 parts by weight and 60 parts by weight, a content of the cellulose is between 150 parts by weight and 360 parts by weight, and a content of the gelatin is between 21 parts by weight and 12 parts by weight. In addition, a method for using the temperature-sensitive cell culture composition, a method for forming the temperature-sensitive cell culture composition, and a use of the temperature-sensitive cell culture composition are also provided.
    Type: Application
    Filed: December 18, 2020
    Publication date: September 2, 2021
    Applicant: Industrial Technology Research Institute
    Inventors: Chia-Jung LU, Jing-En HUANG, Liang-Cheng SU, Hsin-Hsin SHEN, Yuchi WANG, Ying-Hsueh CHAO, Li-Hsin LIN, Hsiu-Hua HUANG
  • Patent number: 11099675
    Abstract: A display device, an operation, a driving circuit and a timing control circuit are provided. The display device includes a touch display panel, the driving circuit and the timing control circuit. The driving circuit drives the touch display panel to display image frames and perform touch detection. The timing control circuit outputs display data to the driving circuit through a data transmission path during a display period to display the image frame on the touch display panel. The driving circuit outputs touch detection data corresponding to the touch detection to the timing control circuit through the same data transmission path during a touch detection period.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: August 24, 2021
    Assignee: Novatek Microelectronics Corp.
    Inventors: Yen-Cheng Cheng, Hsiu-Hui Yang
  • Patent number: 10867816
    Abstract: A method for processing a semiconductor wafer is provided. The method includes placing a semiconductor wafer on a wafer chuck. The method further includes performing a process over the wafer. The method also includes supplying a cooling gas to the backside of the semiconductor wafer via a groove and a number of ventilation apertures located in the groove. Two of the neighboring ventilation apertures are separated in a circumferential direction relative to the center of the wafer chuck by a predetermined angle that is less than 90 degrees.
    Type: Grant
    Filed: October 11, 2017
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Hsiu Cheng, Young-Shuen Chou, I-Che Chiu, Tsung-Hao Lu, Ken Liao
  • Patent number: 10845697
    Abstract: A transparent film is used with a projector which emits a projected light. The transparent film includes a transparent substrate; a light-scattering layer disposed at an upstream position of the transparent substrate with respect to the projected light, and including a plurality of microstructures configured to scatter the projected light; and a light-blocking layer disposed at an upstream position of the light-scattering layer with respect to the projected light, and including a plurality of separate light-blocking units, which are configured to partially block the projected light and partially allow the projected light to reach the light-scattering layer.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: November 24, 2020
    Assignee: BJ TEK CORPORATION
    Inventors: He-Yuan Jiang, Hsiu-Cheng Chang, Ching-Han Chang
  • Patent number: 10712641
    Abstract: A projection apparatus includes a light source, a light reflective member, a light valve, and a light beam adjusting member. The light source is configured to provide an illumination beam. The light reflective member is configured to reflect the illumination beam. The light valve is configured to convert the illumination beam reflected by the light reflective member into an image beam. The light beam adjusting member is optically coupled between the light source and the light reflective member and includes a collimating lens module. The collimating lens module has a light entering surface and a light leaving surface respectively at opposite sides thereof. The light entering surface and the light leaving surface respectively have a first optical axis and a second optical axis extending along different directions.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: July 14, 2020
    Assignee: HTC Corporation
    Inventors: Qing-Long Deng, Hsiu-Cheng Wang
  • Publication number: 20200192211
    Abstract: A transparent film is used with a projector which emits a projected light. The transparent film includes a transparent substrate; a light-scattering layer disposed at an upstream position of the transparent substrate with respect to the projected light, and including a plurality of microstructures configured to scatter the projected light; and a light-blocking layer disposed at an upstream position of the light-scattering layer with respect to the projected light, and including a plurality of separate light-blocking units, which are configured to partially block the projected light and partially allow the projected light to reach the light-scattering layer.
    Type: Application
    Filed: December 10, 2019
    Publication date: June 18, 2020
    Inventors: HE-YUAN JIANG, HSIU-CHENG CHANG, CHING-HAN CHANG
  • Patent number: 10629631
    Abstract: A display panel includes a gate integrated circuit, a number of scan lines extending from the gate integrated circuit for transmitting scan signals, a source integrated circuit, a number of data lines extending from the source integrated circuit for transmitting data signals, a number of pixel electrodes for receiving the scan signals and the data signals, and a number of transistors each electrically coupled to a corresponding scan line, a corresponding data line, and a corresponding pixel electrode. The transistors each include a gate electrode, a source electrode, and a drain electrode. The drain electrode includes an overlapping portion overlapping with the gate electrode. The gate integrated circuit transmits the scan signals along the scan lines. A size of the overlapping portion increases along a transmitting direction of the scan signal along the scan line.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: April 21, 2020
    Assignee: Century Technology (Shenzhen) Corporation Limited
    Inventors: Ming-Tsung Wang, Chih-Chung Liu, Yi-Hsiu Cheng, Wen-Qiang Yu
  • Patent number: 10580780
    Abstract: Provided is a semiconductor structure including a substrate, an isolation structure, a fuse and two gate electrodes. The isolation structure is located in the substrate and defines active regions of the substrate. The fuse is disposed on the isolation structure. The gate electrodes are disposed on the active regions and connected to ends of the fuse. In an embodiment, a portion of a bottom surface of the fuse is lower than top surfaces of the active regions of the substrate.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: March 3, 2020
    Assignee: United Microelectronics Corp.
    Inventors: Zi-Jun Liu, Ping-Chia Shih, Chi-Cheng Huang, Kuo-Lung Li, Hung-Wei Lin, An-Hsiu Cheng, Chih-Hao Pan, Cheng-Hua Chou, Chih-Hung Wang
  • Publication number: 20190378846
    Abstract: Provided is a semiconductor structure including a substrate, an isolation structure, a fuse and two gate electrodes. The isolation structure is located in the substrate and defines active regions of the substrate. The fuse is disposed on the isolation structure. The gate electrodes are disposed on the active regions and connected to ends of the fuse. In an embodiment, a portion of a bottom surface of the fuse is lower than top surfaces of the active regions of the substrate.
    Type: Application
    Filed: June 11, 2018
    Publication date: December 12, 2019
    Applicant: United Microelectronics Corp.
    Inventors: Zi-Jun Liu, Ping-Chia Shih, Chi-Cheng Huang, Kuo-Lung Li, Hung-Wei Lin, An-Hsiu Cheng, Chih-Hao Pan, Cheng-Hua Chou, Chih-Hung Wang
  • Publication number: 20190302585
    Abstract: A projection apparatus includes a light source, a light reflective member, a light valve, and a light beam adjusting member. The light source is configured to provide an illumination beam. The light reflective member is configured to reflect the illumination beam. The light valve is configured to convert the illumination beam reflected by the light reflective member into an image beam. The light beam adjusting member is optically coupled between the light source and the light reflective member and includes a collimating lens module. The collimating lens module has a light entering surface and a light leaving surface respectively at opposite sides thereof. The light entering surface and the light leaving surface respectively have a first optical axis and a second optical axis extending along different directions.
    Type: Application
    Filed: March 28, 2019
    Publication date: October 3, 2019
    Inventors: Qing-Long DENG, Hsiu-Cheng WANG
  • Patent number: 10379416
    Abstract: A display device includes a display area and a peripheral area surrounding the display area. The display device includes a thin film transistor substrate, a plurality of thin film transistors, a first common line, and a storage capacitor line. The first common line, the storage capacitor, and a gate electrode of the thin film transistor are located in a same layer. The first common line is directly electrically coupled to the storage capacitor line.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: August 13, 2019
    Assignee: Century Technology (Shenzhen) Corporation Limited
    Inventors: Wen-Qiang Yu, Ming-Tsung Wang, Chih-Chung Liu, Yi-Hsiu Cheng
  • Publication number: 20190237484
    Abstract: A display panel includes a gate integrated circuit, a number of scan lines extending from the gate integrated circuit for transmitting scan signals, a source integrated circuit, a number of data lines extending from the source integrated circuit for transmitting data signals, a number of pixel electrodes for receiving the scan signals and the data signals, and a number of transistors each electrically coupled to a corresponding scan line, a corresponding data line, and a corresponding pixel electrode. The transistors each include a gate electrode, a source electrode, and a drain electrode. The drain electrode includes an overlapping portion overlapping with the gate electrode. The gate integrated circuit transmits the scan signals along the scan lines. A size of the overlapping portion increases along a transmitting direction of the scan signal along the scan line.
    Type: Application
    Filed: April 10, 2019
    Publication date: August 1, 2019
    Inventors: MING-TSUNG WANG, CHIH-CHUNG LIU, YI-HSIU CHENG, WEN-QIANG YU
  • Patent number: 10340282
    Abstract: A semiconductor memory device includes a substrate, having a plurality of cell regions, wherein the cell regions are parallel and extending along a first direction. A plurality of STI structures is disposed in the substrate, extending along the first direction to isolate the cell regions, wherein the STI structures have a uniform height lower than the substrate in the cell regions. A selection gate line is extending along a second direction and crossing over the cell regions and the STI structures. A control gate line is adjacent to the selection gate line in parallel extending along the second direction and also crosses over the cell regions and the STI structures. The selection gate line and the control gate line together form a two-transistor (2T) memory cell.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: July 2, 2019
    Assignee: United Microelectronics Corp.
    Inventors: Shu-Hung Yu, Chun-Hung Cheng, Chuan-Fu Wang, An-Hsiu Cheng, Ping-Chia Shih, Chi-Cheng Huang, Kuo-Lung Li, Chia-Hui Huang, Chih-Yao Wang, Zi-Jun Liu, Chih-Hao Pan
  • Patent number: 10319084
    Abstract: The present application provides an image projection system and a calibration method of projected image. The calibration method comprises: displaying an original image data as a first image having a first boundary characteristic; projecting the first image as a projected image; analyzing a difference between a boundary shape of the projected image and the first boundary characteristic which is unadjusted; according to the difference between the boundary shape of the projected image and the unadjusted first boundary characteristic, adjusting the first boundary characteristic until the boundary shape of the projected image is similar to the unadjusted first boundary characteristic; and recording the first boundary characteristic at the time when the boundary shape of the projected image is similar to the unadjusted first boundary characteristic as a second boundary characteristic, wherein the first boundary characteristic is the shape of at least one displaying boundary line around the first image.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: June 11, 2019
    Assignee: BJ Tek Corporation
    Inventor: Hsiu-Cheng Chang
  • Patent number: 10297616
    Abstract: A display panel includes a gate integrated circuit, a number of scan lines extending from the gate integrated circuit for transmitting scan signals, a source integrated circuit, a number of data lines extending from the source integrated circuit for transmitting data signals, a number of pixel electrodes for receiving the scan signals and the data signals, and a number of transistors each electrically coupled to a corresponding scan line, a corresponding data line, and a corresponding pixel electrode. The transistors each include a gate electrode, a source electrode, and a drain electrode. The drain electrode includes an overlapping portion overlapping with the gate electrode. The gate integrated circuit transmits the scan signals along the scan lines. A size of the overlapping portion increases along a transmitting direction of the scan signal along the scan line.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: May 21, 2019
    Assignee: Century Technology (Shenzhen) Corporation Limited
    Inventors: Ming-Tsung Wang, Chih-Chung Liu, Yi-Hsiu Cheng, Wen-Qiang Yu
  • Publication number: 20180182900
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a semiconductor substrate having a tunneling well, a tunneling oxide layer, a charge storage layer and a control gate. The tunneling oxide layer is disposed on the tunneling well. The tunneling oxide layer includes a first tunneling oxide segment having a first thickness, a second tunneling oxide segment having a second thickness, and a third tunneling oxide segment having a third thickness, and the first thickness, the second thickness and the third thickness are different from each other. The charge storage layer is disposed on the tunneling oxide layer, and the control gate is disposed on the charge storage layer.
    Type: Application
    Filed: February 21, 2017
    Publication date: June 28, 2018
    Inventors: Ya-Sheng Feng, Chi-Cheng Huang, Ping-Chia Shih, Hung-Wei Lin, Yu-Chun Chen, Ling-Hsiu Chou, An-Hsiu Cheng