Abstract: An apparatus, semiconductor device and method of manufacture are presented, wherein a hard mask layer and one or more etch stop layers are etched in an etching chamber. In an embodiment the semiconductor device is placed on a mounting platform at a first height and an etch process is performed, then the semiconductor device is moved to a second height within the chamber and a second etch process is performed, with the rotational speed of the semiconductor device reduced during movements in order to reduce the chance of cross contamination.

Abstract: An intelligent defecation device for living creature includes a device body, a supporting portion, an image module, and a first analysis module. The supporting portion is formed within the inner side of the device body for accommodating a moisture absorption member so as to allow the living creature to leave over its excrement therein. The image module is also arranged at the device body for dynamically capturing the images of the excrement in the supporting portion and outputting the image. The first analysis module is arranged in the device body and connected with the image module to analyze and calculate the defecation mode with the image based on preset or accumulated data, so as to generate a signal when an abnormal defecation mode is diagnosed.

Abstract: A card connecting assembly mountable on a circuit board for insertion of an electronic card includes a card connector disposed on the circuit board, and an electronic card mounting structure having first and second guiderails for the electronic card to be slidably insertable thereinto, and a latch mechanism integrally formed and elastically connected with the first guiderail. The latch mechanism includes an operating portion and a latch portion. With the latch portion engaged in the notch when the electronic card is inserted into the card connector to prevent removal thereof. Through the operating portion operably and elastically displaced away from the first guiderail, the latch portion is disengageable from the notch, the electronic card is permitted to be removed from the card connector.

Abstract: Semiconductor devices and methods of forming the same are provided. In an embodiment, a semiconductor device includes a first fin extending along a first direction, a second fin extending parallel to the first fin, and a gate structure over and wrapping around the first fin and the second fin, the gate structure extending along a second direction perpendicular to the first direction. The first fin bents away from the second fin along the second direction and the second fin bents away from the first fin along the second direction.

Abstract: Apparatus and method for data scheduling are proposed. The user equipment (UE) may provide an indication or a measurement report to the network node. The network node may determine whether to schedule data within at least one time duration which is configured to the UE for measurement based on the indication or the measurement report. Therefore, for some real-time application (e.g., virtual reality (VR) or augmented reality (AR)), the service will not be interrupted.

Abstract: The main objective of the present invention is to provide a lactic acid bacterial strain and a composition for improving gut microbiota composition. The composition comprises the lactic acid bacterial strain and/or extracellular vesicles secreted by the lactic acid bacterial strain. Another objective of the present invention is to provide a method for improving gut microbiota composition and products of the lactic acid bacterial strain. Additionally, the composition of the present invention has the capability to influence the growth of Firmicutes and Bacteroidetes, thereby leading to an improvement in gut microbiota composition.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a conductive feature disposed over a dielectric structure on a substrate. A first layer is arranged on peripheral regions of the conductive feature. A second layer has a bottommost surface arranged on the first layer. The second layer includes a material that etches at a higher rate than the first layer when exposed to a first etchant and that etches at a lower rate than the first layer when exposed to a second etchant. An additional conductive feature extends through the first layer and the second layer to contact the conductive feature.

Abstract: A locking mechanism for removably locking a first electrical component to a second electrical component includes a positioning post secured to the second electrical component, a frame for mounting the first electrical component, and a locking member movably connected with the frame. The positioning post has a head and a neck. The locking member has a snap fastening portion, a flexible portion and an unlocking operated portion. When the snap fastening portion contacts the head and is moved toward the neck, a lateral thrust force exerted by the head spreads the snap fastening portion and cause deformation of the flexible portion to store a biasing restoring force. When the snap fastening portion is aligned with the neck, the snap fastening portion is moved by the biasing restoring force to be snap fastened to the neck. The unlocking operated portion is operated to disengage the snap fastening portion from the neck.

Abstract: A semiconductor structure includes a SiGe fin protruding from a substrate, where the SiGe fin includes a top portion having a first sidewall and a second sidewall and a bottom portion having a third sidewall and a fourth sidewall, and where a first transition region connecting the first sidewall to the third sidewall and a second transition region connecting the second sidewall to the fourth sidewall each have a tapered profile extending away from the first sidewall and the second sidewall, respectively, and a Si-containing layer disposed on the top portion of the SiGe fin, where a portion of the Si-containing layer on the first transition region extends away from the first sidewall by a first lateral distance and a portion of the Si-containing layer on the second transition region extends away from the second sidewall by a second lateral distance that is different from the first lateral distance.

Abstract: A semiconductor device including a substrate having a NMOS region and a PMOS region; a metal gate extending continuously along a first direction from the NMOS region to the PMOS region on the substrate; a first source/drain region extending along a second direction adjacent to two sides of the metal gate on the NMOS region; a second source/drain region extending along the second direction adjacent to two sides of the metal gate on the PMOS region; a first contact plug landing on the second source/drain region adjacent to one side of the metal gate; a second contact plug landing on the second source/drain region adjacent to another side of the metal gate; and a third contact plug landing directly on a portion of the metal gate on the PMOS region and between the first contact plug and the second contact plug.

Abstract: A semiconductor device package and a fabrication method thereof are disclosed. The semiconductor package comprises: a package component having a first mounting surface and a second mounting surface; and a first electronic component having a first conductive pad signal communicatively mounted on the first mounting surface through a first type connector; wherein the first type connector comprises a first solder composition having a lower melting point layer sandwiched between a pair of higher melting point layers, wherein the lower melting point layer is composed of alloys capable of forming a room temperature eutectic.

Abstract: An apparatus, semiconductor device and method of manufacture are presented, wherein a hard mask layer and one or more etch stop layers are etched in an etching chamber. In an embodiment the semiconductor device is placed on a mounting platform at a first height and an etch process is performed, then the semiconductor device is moved to a second height within the chamber and a second etch process is performed, with the rotational speed of the semiconductor device reduced during movements in order to reduce the chance of cross contamination.

Abstract: A package structure is provided. The package structure includes an electronic component, a heat dissipating element, a thermal interfacing unit, and a confining structure. The electronic component has an upper surface. The heat dissipating element is over the upper surface of the electronic component. The thermal interfacing unit is between the upper surface of the electronic component and the heat dissipating element. The thermal interfacing unit includes a thermal interfacing material (TIM). The TIM is attached to the confining structure by capillary force.

Abstract: The present invention provides a data analytic scheme for screening biomarkers for differential diagnosis of the status of Parkinson's disease, Parkinson's disease with mild cognitive impairment, Parkinson's disease dementia, Alzheimer's disease, and/or multiple system atrophy, the methodology implementing the same and the results of the screening thereof. Biomedical Oriented Logistic Dantzig Selector (BOLD Selector) was developed to identify candidate microRNAs and extracellular vesicle proteins effective at discerning between any two of the above mentioned disease categories from profiling results. The prediction models are finalized by establishing logistic regression formula for each pair of patient group differentiation.

Abstract: The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a substrate having a first side and a second side opposing the first side. The substrate has one or more sidewalls defining a trench extending along opposing sides of a pixel region having a first width. An isolation structure including one or more dielectric materials is disposed within the trench. The isolation structure has a second width. An image sensing element and a focal region are disposed within the pixel region. The focal region is configured to receive incident radiation along the second side of the substrate. A ratio of the second width to the first width is in a range of between approximately 0.1 and approximately 0.2, so that the focal region is completely confined between interior sidewall of the isolation structure facing the image sensing element.

Abstract: An optical imaging lens includes, in order from an object side to an image side, an aperture, a first lens, a second lens, a third lens, a fourth lens and a fifth lens, wherein the first lens has positive refractive power and includes an object-side surface being convex; the second lens has negative refractive power and includes an object-side surface being concave; the third lens has positive refractive power and includes an object-side surface being convex and an image-side surface being convex; the fourth lens has positive refractive power and includes an object-side surface being concave and an image-side surface being convex; the fifth lens has negative refractive power and includes an object-side surface being concave. When specific conditions are satisfied, the optical imaging lens can have a compact size, high thermal endurance and good imaging qualities.

Abstract: A manufacturing method for an antibacterial fiber includes the following steps. A dipping step is performed to soak a conductive fiber in a solution, in which the solution includes an ionic compound, and the ionic compound includes a metal cation. An oxidation step is performed by using the conductive fiber as an anode, such that an antibacterial material produced by the solution is adhered to a surface of the conductive fiber, in which the antibacterial material includes a metal oxide.

Abstract: Methods and kits for detecting alternating spatial expression of PTEN and, optionally, SMAD4, CD44, and/or TP53 in colonic tumors are described. The methods and kits are useful for identifying a cancer stem cell (CSC)-like zone within a colonic tumor, identifying an adenoma-adenocarcinoma (Ad-ACA) transition zone in a colorectal cancer (CRC) tumor, identifying a CRC tumor that contains high-grade adenoma and/or early adenocarcinoma regions, identifying CSCs in a CRC tumor, diagnosing a subject with high-grade colon adenoma and/or early adenocarcinoma, and determining the likelihood that a colonic tumor in a subject will undergo invasive transformation if left untreated.

Abstract: A semiconductor structure includes a first pair of source/drain features (S/D), a first stack of channel layers connected to the first pair of S/D, a second pair of S/D, and a second stack of channel layers connected to the second pair of S/D. The first pair of S/D each include a first epitaxial layer having a first dopant, a second epitaxial layer having a second dopant and disposed over the first epitaxial layer and connected to the first stack of channel layers, and a third epitaxial layer having a third dopant and disposed over the second epitaxial layer. The second pair of S/D each include a fourth epitaxial layer having a fourth dopant and connected to the second stack of channel layers, and a fifth epitaxial layer having a fifth dopant and disposed over the fourth epitaxial layer. The first dopant through the fourth dopant are of different species.

Abstract: An electronic package structure includes a first electronic component, a first thermal conductive structure and a second thermal conductive structure. The first thermal conductive structure is disposed over the first electronic component. The second thermal conductive structure is disposed between the first electronic component and the first thermal conductive structure. A first heat transfer rate of the second thermal conductive structure along a first direction from the first electronic component to the first thermal conductive structure is greater than a second heat transfer rate of the second thermal conductive structure along a second direction nonparallel with the first direction from the first electronic component to an element other than the first thermal conductive structure.