Patents by Inventor An-Hsun Lo

An-Hsun Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12235586
    Abstract: Impurities in a liquefied solid fuel utilized in a droplet generator of an extreme ultraviolet photolithography system are removed from vessels containing the liquefied solid fuel. Removal of the impurities increases the stability and predictability of droplet formation which positively impacts wafer yield and droplet generator lifetime.
    Type: Grant
    Filed: August 7, 2023
    Date of Patent: February 25, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Hao Lai, Ming-Hsun Tsai, Hsin-Feng Chen, Wei-Shin Cheng, Yu-Kuang Sun, Cheng-Hsuan Wu, Yu-Fa Lo, Shih-Yu Tu, Jou-Hsuan Lu, Shang-Chieh Chien, Li-Jui Chen, Heng-Hsin Liu
  • Patent number: 12229776
    Abstract: A cash handling system and a cash transaction method are provided. The cash handling system includes at least one order terminal and a cash payment terminal. The cash payment terminal communicates with the order terminal. The order terminal captures a first image, and at least one piece of first face data is included in the first image. The order terminal obtains order data and generates client data according to the order data and the at least one piece of first face data. The at least one piece of first face data is linked to the order data. The cash payment terminal obtains the client data, and the client data includes the order data and the at least one piece of first face data. The cash payment terminal captures a second image. When specific face data appears in the second image, the cash payment terminal performs a payment operation according to specific order data linked to the specific face data.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: February 18, 2025
    Assignee: Masterwork Automodules Tech Corp. Ltd
    Inventors: Ming-Hsun Liu, Yang-Chun Lo
  • Publication number: 20250044322
    Abstract: The present invention provides a quick coupling probe card, utilized to test circuit board. The quick coupling probe card comprises a base, a coaxial connector, mechanical connector, and probe holding part, wherein the base has a first surface and a second surface corresponding to the first surface, the coaxial connector arranged on the base has one end above the first surface, and is coupled to the test machine for transmitting the high frequency signal, the mechanical connector is arranged on the first surface for coupling to the test machine, and is closer to a center of the base than the coaxial connector, and the probe holding part, arranged on the second surface and utilized to couple to the coaxial connector, has one end connected to a high frequency probe corresponding to one specific kind of the different kinds of pitches.
    Type: Application
    Filed: May 23, 2024
    Publication date: February 6, 2025
    Inventors: Ya-Hung Lo, Chien-Hsun Chen, Chia-Nan Chou, Shou-Jen Tsai, Fuh-Chyun Tang
  • Publication number: 20250020570
    Abstract: A method for inspecting particles is suitable for inspecting particles on a substrate. The method for inspecting the particles includes the following. The substrate is disposed on a stage. An inspection radiation is provided to irradiate on the substrate, in which the inspection radiation is suitable for exciting the particles on the substrate to emit a secondary radiation. Also, the secondary radiation is detected to confirm whether the particles exist on the substrate and positions of the particles are detected.
    Type: Application
    Filed: April 9, 2024
    Publication date: January 16, 2025
    Applicant: National Tsing Hua University
    Inventors: Tsai-Sheng Gau, Burn Jeng Lin, Po-Hsiung Chen, Po-Hsun Lu, Meng-Chen Lo
  • Publication number: 20250023383
    Abstract: A control method applied to a power supply system. The power supply system comprises at least one first power unit and a second power unit, and the at least one first power unit is configured to provide power to an electrical load according to a power provided by a power source. The control method comprises: detecting a load status of the power supply system; when the load status is determined to be a peak load, generating a trigger signal; and in response to the trigger signal, disabling a first-stage converter in the second power unit, and controlling an energy storage capacitor in the second power unit to provide power to the electrical load, wherein the energy storage capacitor is coupled between the first-stage converter and a second-stage converter in the second power unit.
    Type: Application
    Filed: July 12, 2024
    Publication date: January 16, 2025
    Inventors: Hsieh-Hsiung CHENG, Te-Chih PENG, Ming-Hsiang LO, Kuo-Hsun CHIEN
  • Patent number: 12187806
    Abstract: The present invention relates to a novel antibody, an antigen-binding fragment thereof and the uses of the antibody and fragment, wherein the antibody and the fragment comprise specific complementarity-determining regions (CDRs) and/or specifically bind to human CD73 at specific epitopes.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: January 7, 2025
    Assignee: DEVELOPMENT CENTER FOR BIOTECHNOLOGY
    Inventors: Chun-Chung Lee, Yu-Hsun Lo, Chu-Bin Liao, Chen-Jei Hong, Sih-Yu Chen, Yen-Yu Wu, Szu-Liang Lai, Chih-Yung Hu, Wen-Bin Ke, Ya-Ting Juan, Kao-Jean Huang
  • Patent number: 12149211
    Abstract: A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first transconductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: November 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: An-Hsun Lo, Wen-Sheng Chen, En-Hsiang Yeh, Tzu-Jin Yeh
  • Publication number: 20240209095
    Abstract: The present disclosure relates to an anti-PD-L1 antibody or an antigen-binding fragment thereof, comprising: a heavy chain variable region sequence comprising the three CDRs with the sequences of SEQ ID NOs: 2 to 4, or 6 to 8; and a light chain variable region sequence comprising the three CDRs with the sequences of SEQ ID NOs: 10 to 12, or 14 to 16. The present disclosure also relates to a pharmaceutical composition and a method for detecting expression of PD-L1 in a sample.
    Type: Application
    Filed: November 29, 2023
    Publication date: June 27, 2024
    Applicant: DEVELOPMENT CENTER FOR BIOTECHNOLOGY
    Inventors: SHU-PING YEH, CHENG-CHOU YU, YU-HSUN LO, JIN-YU WANG, MEI-CHI CHAN, CHAO-YANG HUANG, SZU-LIANG LAI
  • Publication number: 20240197780
    Abstract: Disclosed herein is a chimeric antigen receptor (CAR) comprising a single-chain variable fragment specific to Globo H, a hinge and transmembrane domain, a co-stimulatory molecule, and a cytoplasmic domain. According to some embodiments of the present disclosure, the CAR further comprises a single-chain variable fragment specific to PD-L1, and optionally, a fragment crystallizable region of an immunoglobulin. Also disclosed herein are isolated nucleic acids encoding the CAR pharmaceutical kits comprising the isolated immune cells expressing the CAR, and methods of treating cancers by using isolated immune cells.
    Type: Application
    Filed: December 18, 2023
    Publication date: June 20, 2024
    Inventors: Li-Shuang AI, Yu-Hsun LO, Cheng-Chou YU, Yi-Jiue TSAI, Hsin-Yi TSAI, Show-Shan SHEU, Yi-Tian HE, Pei-Yi TSAI, Chia-Tsen LAI
  • Publication number: 20230279139
    Abstract: The present invention relates to a novel antibody, an antigen-binding fragment thereof and the uses of the antibody and fragment, wherein the antibody and the fragment comprise specific complementarity-determining regions (CDRs) and/or specifically bind to human CD73 at specific epitopes.
    Type: Application
    Filed: March 4, 2022
    Publication date: September 7, 2023
    Inventors: Chun-Chung LEE, Yu-Hsun LO, Chu-Bin LIAO, Chen-Jei HONG, Sih-Yu CHEN, Yen-Yu WU, Szu-Liang LAI, Chih-Yung HU, Wen-Bin KE, Ya-Ting JUAN, Kao-Jean HUANG
  • Publication number: 20230127322
    Abstract: A semiconductor device includes: a polygonal inductive device disposed on a first layer on a substrate, the polygonal inductive device including a first line portion; a first conductive line disposed on a second layer on the substrate; a second conductive line disposed on a third layer on the substrate; and a first conductive via arranged to electrically couple the second conductive line to the first conductive line; wherein the first layer is different from the second layer and the third layer, the first conductive line is electrically connected to a reference voltage, and the first conductive line crosses the first line portion viewing from a top of the semiconductor device.
    Type: Application
    Filed: December 21, 2022
    Publication date: April 27, 2023
    Inventors: WEN-SHENG CHEN, AN-HSUN LO, EN-HSIANG YEH, TZU-JIN YEH
  • Patent number: 11569164
    Abstract: A semiconductor device includes: a polygonal inductive device disposed on a first layer on a substrate, the polygonal inductive device including a first line portion; a first conductive line disposed on a second layer on the substrate; a second conductive line disposed on a third layer on the substrate; and a first conductive via arranged to electrically couple the second conductive line to the first conductive line; wherein the first layer is different from the second layer and the third layer, the first conductive line is electrically connected to a reference voltage, and the first conductive line crosses the first line portion viewing from a top of the semiconductor device.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: January 31, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wen-Sheng Chen, An-Hsun Lo, En-Hsiang Yeh, Tzu-Jin Yeh
  • Publication number: 20220385251
    Abstract: A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first transconductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal.
    Type: Application
    Filed: August 8, 2022
    Publication date: December 1, 2022
    Inventors: An-Hsun LO, Wen-Sheng CHEN, En-Hsiang YEH, Tzu-Jin YEH
  • Patent number: 11456710
    Abstract: A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first transconductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: September 27, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: An-Hsun Lo, Wen-Sheng Chen, En-Hsiang Yeh, Tzu-Jin Yeh
  • Patent number: 10985618
    Abstract: A wireless transmitter includes a an amplifier; and a switchable transformer, coupled to the amplifier, wherein the amplifier is configured to be coupled to the switchable transformer in first and second configurations, wherein the first configuration causes the amplifier to provide a first output impedance to the switchable transformer, and wherein the second configuration causes the amplifier to provide a second output impedance to the switchable transformer, the first and second output impedances being different from each other.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: April 20, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Sheng Chen, An-Hsun Lo, En-Hsiang Yeh, Tzu-Jin Yeh
  • Publication number: 20210021240
    Abstract: A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first transconductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal.
    Type: Application
    Filed: October 5, 2020
    Publication date: January 21, 2021
    Inventors: An-Hsun LO, Wen-Sheng Chen, En-Hsiang Yeh, Tzu-Jin Yeh
  • Patent number: 10797655
    Abstract: A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first transconductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: October 6, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: An-Hsun Lo, Wen-Sheng Chen, En-Hsiang Yeh, Tzu-Jin Yeh
  • Publication number: 20200279808
    Abstract: A semiconductor device includes: a polygonal inductive device disposed on a first layer on a substrate, the polygonal inductive device including a first line portion; a first conductive line disposed on a second layer on the substrate; a second conductive line disposed on a third layer on the substrate; and a first conductive via arranged to electrically couple the second conductive line to the first conductive line; wherein the first layer is different from the second layer and the third layer, the first conductive line is electrically connected to a reference voltage, and the first conductive line crosses the first line portion viewing from a top of the semiconductor device.
    Type: Application
    Filed: May 21, 2020
    Publication date: September 3, 2020
    Inventors: WEN-SHENG CHEN, AN-HSUN LO, EN-HSIANG YEH, TZU-JIN YEH
  • Patent number: 10672704
    Abstract: A semiconductor device includes: a polygonal inductive device disposed on a first layer on a substrate, the polygonal inductive device including a first line portion; a first conductive line disposed on a second layer on the substrate; a second conductive line disposed on a third layer on the substrate; and a first conductive via arranged to electrically couple the second conductive line to the first conductive line; wherein the first layer is different from the second layer and the third layer, the first conductive line is electrically connected to a reference voltage, and the first conductive line crosses the first line portion viewing from a top of the semiconductor device.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: June 2, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wen-Sheng Chen, An-Hsun Lo, En-Hsiang Yeh, Tzu-Jin Yeh
  • Patent number: 10644996
    Abstract: A route determining method and apparatus, and a communications device are provided. The method includes: obtaining startpoint information and endpoint information of a required path, where the startpoint information includes a sequence number of a startpoint POD and a sequence number of a startpoint edge switch, and the endpoint information includes a sequence number of an endpoint POD and a sequence number of an endpoint edge switch; determining, from an n-dimensional Latin square, an element whose row is the sequence number of the startpoint edge switch and column is the sequence number of the endpoint edge switch; and if the sequence number of the startpoint POD is the same as the sequence number of the endpoint POD, determining that the required path is the startpoint edge switch, an aggregation switch corresponding to the element in the POD, and the endpoint edge switch.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: May 5, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yuan-Hsun Lo, Wing Shing Wong, Yong Huang