Patents by Inventor An-Hsun Lo

An-Hsun Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240131819
    Abstract: A thermally conductive board includes a first metal layer, a second metal layer, and a thermally conductive layer. The material of the first metal layer includes copper, and the first metal layer has a first top surface and a first bottom surface opposite to the first top surface. A first metal coating layer covers the first bottom surface. The material of the second metal layer includes copper, and the second metal layer has a second top surface and a second bottom surface opposite to the second top surface. A second metal coating layer covers the second top surface and faces the first metal coating layer. The thermally conductive layer is an electrically insulator laminated between the first metal coating layer and the second metal coating layer.
    Type: Application
    Filed: May 3, 2023
    Publication date: April 25, 2024
    Inventors: KAI-WEI LO, WEN-FENG LEE, HSIANG-YUN YANG, KUO-HSUN CHEN
  • Publication number: 20240077188
    Abstract: A light source module includes a first light source and a second light source. The first light source is configured for emitting a first light having a first wavelength, and the first light includes a first part and a second part. The second light source is configured for emitting a second light having a second wavelength. The second light source includes a first wavelength conversion layer, and the first wavelength conversion layer is configured for converting the first light into the second light. One of the first part and the second part is incident to the first wavelength conversion layer, and the other of the first part and the second part is not incident to the first wavelength conversion layer.
    Type: Application
    Filed: August 22, 2023
    Publication date: March 7, 2024
    Applicant: Qisda Corporation
    Inventors: Chih-Shiung CHIEN, Ming-Kuen LIN, Tsung-Hsun WU, Yi-Ling LO
  • Publication number: 20230279139
    Abstract: The present invention relates to a novel antibody, an antigen-binding fragment thereof and the uses of the antibody and fragment, wherein the antibody and the fragment comprise specific complementarity-determining regions (CDRs) and/or specifically bind to human CD73 at specific epitopes.
    Type: Application
    Filed: March 4, 2022
    Publication date: September 7, 2023
    Inventors: Chun-Chung LEE, Yu-Hsun LO, Chu-Bin LIAO, Chen-Jei HONG, Sih-Yu CHEN, Yen-Yu WU, Szu-Liang LAI, Chih-Yung HU, Wen-Bin KE, Ya-Ting JUAN, Kao-Jean HUANG
  • Publication number: 20230127322
    Abstract: A semiconductor device includes: a polygonal inductive device disposed on a first layer on a substrate, the polygonal inductive device including a first line portion; a first conductive line disposed on a second layer on the substrate; a second conductive line disposed on a third layer on the substrate; and a first conductive via arranged to electrically couple the second conductive line to the first conductive line; wherein the first layer is different from the second layer and the third layer, the first conductive line is electrically connected to a reference voltage, and the first conductive line crosses the first line portion viewing from a top of the semiconductor device.
    Type: Application
    Filed: December 21, 2022
    Publication date: April 27, 2023
    Inventors: WEN-SHENG CHEN, AN-HSUN LO, EN-HSIANG YEH, TZU-JIN YEH
  • Patent number: 11569164
    Abstract: A semiconductor device includes: a polygonal inductive device disposed on a first layer on a substrate, the polygonal inductive device including a first line portion; a first conductive line disposed on a second layer on the substrate; a second conductive line disposed on a third layer on the substrate; and a first conductive via arranged to electrically couple the second conductive line to the first conductive line; wherein the first layer is different from the second layer and the third layer, the first conductive line is electrically connected to a reference voltage, and the first conductive line crosses the first line portion viewing from a top of the semiconductor device.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: January 31, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wen-Sheng Chen, An-Hsun Lo, En-Hsiang Yeh, Tzu-Jin Yeh
  • Publication number: 20220385251
    Abstract: A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first transconductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal.
    Type: Application
    Filed: August 8, 2022
    Publication date: December 1, 2022
    Inventors: An-Hsun LO, Wen-Sheng CHEN, En-Hsiang YEH, Tzu-Jin YEH
  • Patent number: 11456710
    Abstract: A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first transconductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: September 27, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: An-Hsun Lo, Wen-Sheng Chen, En-Hsiang Yeh, Tzu-Jin Yeh
  • Patent number: 10985618
    Abstract: A wireless transmitter includes a an amplifier; and a switchable transformer, coupled to the amplifier, wherein the amplifier is configured to be coupled to the switchable transformer in first and second configurations, wherein the first configuration causes the amplifier to provide a first output impedance to the switchable transformer, and wherein the second configuration causes the amplifier to provide a second output impedance to the switchable transformer, the first and second output impedances being different from each other.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: April 20, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Sheng Chen, An-Hsun Lo, En-Hsiang Yeh, Tzu-Jin Yeh
  • Publication number: 20210021240
    Abstract: A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first transconductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal.
    Type: Application
    Filed: October 5, 2020
    Publication date: January 21, 2021
    Inventors: An-Hsun LO, Wen-Sheng Chen, En-Hsiang Yeh, Tzu-Jin Yeh
  • Patent number: 10797655
    Abstract: A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first transconductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: October 6, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: An-Hsun Lo, Wen-Sheng Chen, En-Hsiang Yeh, Tzu-Jin Yeh
  • Publication number: 20200279808
    Abstract: A semiconductor device includes: a polygonal inductive device disposed on a first layer on a substrate, the polygonal inductive device including a first line portion; a first conductive line disposed on a second layer on the substrate; a second conductive line disposed on a third layer on the substrate; and a first conductive via arranged to electrically couple the second conductive line to the first conductive line; wherein the first layer is different from the second layer and the third layer, the first conductive line is electrically connected to a reference voltage, and the first conductive line crosses the first line portion viewing from a top of the semiconductor device.
    Type: Application
    Filed: May 21, 2020
    Publication date: September 3, 2020
    Inventors: WEN-SHENG CHEN, AN-HSUN LO, EN-HSIANG YEH, TZU-JIN YEH
  • Patent number: 10672704
    Abstract: A semiconductor device includes: a polygonal inductive device disposed on a first layer on a substrate, the polygonal inductive device including a first line portion; a first conductive line disposed on a second layer on the substrate; a second conductive line disposed on a third layer on the substrate; and a first conductive via arranged to electrically couple the second conductive line to the first conductive line; wherein the first layer is different from the second layer and the third layer, the first conductive line is electrically connected to a reference voltage, and the first conductive line crosses the first line portion viewing from a top of the semiconductor device.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: June 2, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wen-Sheng Chen, An-Hsun Lo, En-Hsiang Yeh, Tzu-Jin Yeh
  • Patent number: 10644996
    Abstract: A route determining method and apparatus, and a communications device are provided. The method includes: obtaining startpoint information and endpoint information of a required path, where the startpoint information includes a sequence number of a startpoint POD and a sequence number of a startpoint edge switch, and the endpoint information includes a sequence number of an endpoint POD and a sequence number of an endpoint edge switch; determining, from an n-dimensional Latin square, an element whose row is the sequence number of the startpoint edge switch and column is the sequence number of the endpoint edge switch; and if the sequence number of the startpoint POD is the same as the sequence number of the endpoint POD, determining that the required path is the startpoint edge switch, an aggregation switch corresponding to the element in the POD, and the endpoint edge switch.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: May 5, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yuan-Hsun Lo, Wing Shing Wong, Yong Huang
  • Publication number: 20200067351
    Abstract: A wireless transmitter includes a an amplifier; and a switchable transformer, coupled to the amplifier, wherein the amplifier is configured to be coupled to the switchable transformer in first and second configurations, wherein the first configuration causes the amplifier to provide a first output impedance to the switchable transformer, and wherein the second configuration causes the amplifier to provide a second output impedance to the switchable transformer, the first and second output impedances being different from each other.
    Type: Application
    Filed: October 28, 2019
    Publication date: February 27, 2020
    Inventors: Wen-Sheng Chen, An-Hsun Lo, En-Hsiang Yeh, Tzu-Jin Yeh
  • Patent number: 10491046
    Abstract: A wireless transmitter includes a an amplifier; and a switchable transformer, coupled to the amplifier, wherein the amplifier is configured to be coupled to the switchable transformer in first and second configurations, wherein the first configuration causes the amplifier to provide a first output impedance to the switchable transformer, and wherein the second configuration causes the amplifier to provide a second output impedance to the switchable transformer, the first and second output impedances being different from each other.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: November 26, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Sheng Chen, An-Hsun Lo, En-Hsiang Yeh, Tzu-Jin Yeh
  • Publication number: 20190164886
    Abstract: A semiconductor device includes: a polygonal inductive device disposed on a first layer on a substrate, the polygonal inductive device including a first line portion; a first conductive line disposed on a second layer on the substrate; a second conductive line disposed on a third layer on the substrate; and a first conductive via arranged to electrically couple the second conductive line to the first conductive line; wherein the first layer is different from the second layer and the third layer, the first conductive line is electrically connected to a reference voltage, and the first conductive line crosses the first line portion viewing from a top of the semiconductor device.
    Type: Application
    Filed: April 27, 2018
    Publication date: May 30, 2019
    Inventors: WEN-SHENG CHEN, AN-HSUN LO, EN-HSIANG YEH, TZU-JIN YEH
  • Publication number: 20190158391
    Abstract: A route determining method and apparatus, and a communications device are provided. The method includes: obtaining startpoint information and endpoint information of a required path, where the startpoint information includes a sequence number of a startpoint POD and a sequence number of a startpoint edge switch, and the endpoint information includes a sequence number of an endpoint POD and a sequence number of an endpoint edge switch; determining, from an n-dimensional Latin square, an element whose row is the sequence number of the startpoint edge switch and column is the sequence number of the endpoint edge switch; and if the sequence number of the startpoint POD is the same as the sequence number of the endpoint POD, determining that the required path is the startpoint edge switch, an aggregation switch corresponding to the element in the POD, and the endpoint edge switch.
    Type: Application
    Filed: January 17, 2019
    Publication date: May 23, 2019
    Inventors: Yuan-Hsun LO, Wing Shing WONG, Yong HUANG
  • Patent number: 10277171
    Abstract: An amplifying unit includes a converter and a feedback mechanism. The converter has a supply input coupled to a supply node. The converter further has an input terminal configured to receive an input signal. The converter is configured to amplify the input signal from the input terminal to generate an output signal. The feedback mechanism is coupled to the input terminal of the converter and is configured to cause a constant bias current to flow from the supply node through the converter based on the input signal.
    Type: Grant
    Filed: July 5, 2017
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limted
    Inventors: An-Hsun Lo, En-Hsiang Yeh, Tzu-Jin Yeh, Wen-Sheng Chen
  • Patent number: 10146127
    Abstract: A spacer manufacturing device is disclosed. The device includes a photo mask having a central light-transmitting region and a peripheral light-transmitting region disposed at a periphery of the central light-transmitting region; and an exposure device right opposite to the photo mask. Light emitted from the exposure device is irradiated to a negative photoresist material after passing through the photo mask, the light intensity passing through the peripheral light-transmitting region is less than the light intensity passing through the central light-transmitting region. A spacer is also disclosed. Only one exposure process is required to realize the spacer having a convex-shaped cross section. The process is simple and the manufacturing cost is low. At the same time, flatness of the convex shoulder of the spacer having a convex-shaped cross section is adjustable, which can satisfy the requirement for manufacturing spacers having different specifications.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: December 4, 2018
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
    Inventors: Huan Liu, Zui Wang, Jinbo Guo, Shih-hsun Lo
  • Patent number: 10095104
    Abstract: A spacer manufacturing device is disclosed. The device includes a photo mask having a central light-transmitting region and a peripheral light-transmitting region disposed at a periphery of the central light-transmitting region; and an exposure device right opposite to the photo mask. Light emitted from the exposure device is irradiated to a negative photoresist material after passing through the photo mask, the light intensity passing through the peripheral light-transmitting region is less than the light intensity passing through the central light-transmitting region. A spacer is also disclosed. Only one exposure process is required to realize the spacer having a convex-shaped cross section. The process is simple and the manufacturing cost is low. At the same time, flatness of the convex shoulder of the spacer having a convex-shaped cross section is adjustable, which can satisfy the requirement for manufacturing spacers having different specifications.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: October 9, 2018
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
    Inventors: Huan Liu, Zui Wang, Jinbo Guo, Shih-hsun Lo