Abstract: A method of designing an air bridge layout in a circuit layout is performed by a computer device, and in particular, relates to the field of chip technologies. The method includes: obtaining position information of skeleton lines of CPW lines based on position information of the coplanar waveguide CPW lines in the circuit layout, each skeleton line being a center line of a corresponding CPW line; obtaining an interweave pair from the skeleton lines of the CPW lines based on the position information of the skeleton lines of the CPW lines, the interweave pair including two parallel skeleton line segments; and deploying air bridges on the circuit layout, the air bridges being deployed along the skeleton lines, and the air bridges on the two skeleton lines in the interweave pair being arranged in a staggered manner (340). According to the foregoing solution, interferences between air bridges on different CPW lines are reduced, and a success rate of subsequent circuit fabrication is improved.