Abstract: An image capturing lens assembly includes, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. The first lens element with positive refractive power has a convex object-side surface. The second lens element has refractive power. The third lens element has refractive power, and an object-side surface and an image-side surface thereof being aspheric. The fourth lens element has negative refractive power, and an object-side surface and an image-side surface thereof are aspheric. The fifth lens element with negative refractive power has a concave object-side surface, and the object-side surface and an image-side surface thereof are aspheric.

Abstract: A transceiver circuit includes an ADC and an echo-cancellation circuit, wherein the echo-cancellation circuit includes a steady circuit, a transient circuit and an output circuit. In the operations of the transceiver circuit, the ADC is configured to perform an analog-to-digital conversion operation on an analog input signal to generate a digital input signal. The steady circuit is configured to generate a steady echo response according to a transmitting signal. The transient circuit is configured to generate an echo response adjustment signal according to a phase change of a clock signal used by the transmitting signal. The output circuit is configured to generate an output signal according to the digital input signal, the steady echo response, and the echo response adjustment signal.

Abstract: The present invention provides a low viscosity poly-?-olefin lubricating oil and a synthesis method thereof. The method comprises: (1) the ?-olefin raw material is subjected to dehydration treatment so that the water content in the raw material is ?10 ppm; (2) a reaction of the dehydration treated ?-olefin raw material is carried out in the presence of a complex catalyst and gaseous BF3 to obtain a reaction product, wherein the pressure of the gaseous BF3 is 0.01 to 1 MPa; (3) the reaction product obtained in step (2) is sequentially subjected to flash distillation, gas stripping, centrifugation, and washing treatment to obtain an intermediate product; (4) the intermediate product obtained in step (3) is subjected to distillation under reduced pressure to separate the unreacted ?-olefin raw material and ?-olefin dimers, and the remaining heavy fractions are subjected to hydrogenation saturation treatment followed by fractionation and cutting-off.

Abstract: An active device substrate includes a substrate, a silicon layer, a first insulating layer, a first gate, a first dielectric layer, a first transfer electrode, a second transfer electrode, and a second dielectric layer. Two openings penetrate through the first dielectric layer and overlap the silicon layer. The first transfer electrode and the second transfer electrode are respectively located in the two openings. The second dielectric layer is located on the first transfer electrode and the second transfer electrode. Two first through-holes penetrate through the second dielectric layer. The first transfer electrode and the second transfer electrode are etch stop layers of the two first through-holes.

Abstract: A cable is composed of a cable core including one or more electric wires, a braided shield covering a periphery of the cable core and including braided metal wires, a sheath covering a periphery of the braided shield, and a cushion layer provided between the cable core and the braided shield. The cushion layer is composed of a braid including braided linear shape fiber yarns.

Abstract: A digital circuit robustness verification method is provided that includes the following steps. An internal storage circuit and an external storage circuit corresponding to a circuit under test are set to store a plurality of random values and a configuration of the circuit under test for performing a predetermined function is set by a processing circuit. A driving signal corresponding to the predetermined function is transmitted to the circuit under test by a previous stage circuit, such that the circuit under test executes the predetermined function to further generate an output signal. The determination as to whether the output signal is correct or not is made by a next stage circuit, and the circuit under test is determined to pass a robustness verification when the output signal is correct.

Abstract: An adjustable height balance beam includes an elongate member; opposing upper and lower support columns; opposing base bars; wherein opposing attachment zones of the elongate member are configured for selective attachment to each of the opposing upper support columns, defining a first configuration, and wherein each of the opposing lower support columns is configured for attachment to the corresponding opposing base bars, and the respective opposing base bars, defining a second configuration, for selective height adjustment of the elongate bar relative to the opposing base bars; wherein the height of the elongate bar relative to the opposing base bars may be selectively adjusted when in the first configuration by aligning tension knob ports on the lower support column with a correspondingly selected one of the plurality of linearly displaced apertures on the upper support column to form an aligned attachment channel that is configured for receipt of the tension knob.

Abstract: Systems described herein provide techniques for establishing and modifying user plane communications sessions between Long-Term Evolution (“LTE”) User Equipment (“UE”) devices, connected to LTE base stations, and a Fifth Generation (“5G”) core network. An LTE-5G Interworking function (“LTE-5G IWF”) may logically generate a virtual 5G UE and/or 5G base station, map a LTE UE to the virtual 5G UE, and cause the establishment of a Protocol Data Unit (“PDU”) Session, at the 5G core network, with the virtual 5G UE. The LTE-5G IWF may provide PDU Session information to the LTE UE and base station to facilitate the establishment of user plane communications (e.g., via a tunnel) between the LTE UE and the 5G core network. The LTE-5G IWF may also receive modification parameters, such as Quality of Service (“QoS”) parameters, and provide instructions to the 5G core and/or to the LTE UE to handle traffic according to such parameters.

Abstract: Techniques and mechanisms for providing functionality of a non-planar device which includes a semiconductor body disposed on a dielectric layer and over an underlying subfin region. In an embodiment, the dielectric layer is disposed between, and adjoins each of, a first semiconductor material of the subfin region and a second semiconductor material of semiconductor body. The dielectric layer is an artefact of fabrication processing wherein an epitaxy of the semiconductor body is grown horizontally along a length of the subfin region. During such epitaxial growth, the dielectric layer prevents vertical growth of the second semiconductor material from the subfin region. Moreover, at least a portion of a dummy gate determines a shape of the semiconductor body. In another embodiment, formation of the semiconductor body is preceded by an etching to remove a section of a fin portion which is disposed over the subfin region.

Abstract: A method for manufacturing a semiconductor device includes forming a hard mask layer overlying a device layer of a semiconductor device, a mandrel underlayer over hard mask layer, and a mandrel layer over mandrel underlayer. The mandrel layer has a plurality of mandrel lines extending along a first direction. A plurality of openings are formed in mandrel underlayer extending in a second direction substantially perpendicular to first direction. A spacer layer is formed over mandrel underlayer and layer. Spacer layer fills plurality of openings in underlayer. Portions of spacer layer are removed to expose an upper surface of underlayer and mandrel layer, and mandrel layer is removed. By using remaining portions of spacer layer as a mask, underlayer and hard mask layer are removed, to form a hard mask pattern with first hard mask pattern lines extending along first direction and second hard mask pattern lines extending along second direction.

Abstract: Some embodiments relate to a semiconductor structure including an inter-level dielectric (ILD) layer overlying a substrate. A conductive via is disposed within the ILD layer. A plurality of conductive wires overlie the ILD layer. The plurality of conductive wires includes a first conductive wire laterally offset a second conductive wire. A dielectric structure is disposed laterally between the first and second conductive wires. The dielectric structure includes a first dielectric liner, a dielectric layer, and an air-gap. The air-gap is disposed between an upper surface of the first dielectric liner and a lower surface of the dielectric layer. A dielectric capping layer is disposed along an upper surface of the dielectric structure. The dielectric capping layer continuously extends between opposing sidewalls of the dielectric structure and is laterally offset from the plurality of conductive wires.

Abstract: Aspects of the present disclosure provide for opportunistic uplink transmissions within a slot. In some examples, after scheduling all regular uplink transmissions within a current slot, a base station (e.g., gNB) may identify a set of unused uplink resources within the current slot and generate and transmit unused resource information identifying the set of unused resources to the user equipment (UE) within the cell served by the base station. If a particular UE is configured to operate in an opportunistic mode, the UE may utilize the unused resource information to generate and transmit an opportunistic uplink transmission within the set of unused uplink resources.

Abstract: Systems and methods for precise position selection of an offset anchor from items within a map of a multiplayer game with touchscreen gestures. Specifically, the systems and methods utilize inputs from a touchscreen, to selectively define an offset targeting position in relation to a selected target, e.g., for the selective teleportation of a player's character. In essence, the methods and systems facilitate a user's or “player's” ability to precisely position an character, offset from a target object (generally referenced herein as a “target”), utilizing an intuitive offset-positioning focus point reticle. The offset-positioning focus point reticle, as described herein, allows the player to precisely and efficiently select a radial and offset position for a character to be teleported to relative to a selected target.

Abstract: A wire tension control device including a bobbin and a magnetic moment generator is provided. The bobbin is configured to provide a wire. The magnetic moment generator includes a stator and a rotor relatively rotatable with respect to the stator. The rotor is connected to the bobbin. When the bobbin drives the rotor to rotate, the magnetic moment generator generates a tension on the wire.

Abstract: A method may include forming a mask layer on top of a first dielectric layer formed on a first source/drain and a second source/drain, and creating an opening in the mask layer and the first dielectric layer that exposes portions of the first source/drain and the second source/drain. The method may include filling the opening with a metal layer that covers the exposed portions of the first source/drain and the second source/drain, and forming a gap in the metal layer to create a first metal contact and a second metal contact. The first metal contact may electrically couple to the first source/drain and the second metal contact may electrically couple to the second source/drain. The gap may separate the first metal contact from the second metal contact by less than nineteen nanometers.

Abstract: The present disclosure provides a differential clock cross point detection circuit and a detection method. The detection circuit includes: a first MOS transistor (M1), a second MOS transistor (M2) and a capacitor (C); a drain of the first MOS transistor (M1) is connected to a negative terminal (CLK?) of a differential clock, a gate of the first MOS transistor (M1) is connected to a positive terminal (CLK+) of the differential clock, and a source of the first MOS transistor (M1) is connected to a drain of the second MOS transistor (M2); a gate of the second MOS transistor (M2) is connected to the negative terminal (CLK?) of the differential clock, and a source of the second MOS transistor (M2) is connected to an output terminal through a node; one terminal of the capacitor (C) is connected to a node (A), and the other terminal of the capacitor (C) is grounded.

Abstract: A method and an apparatus for authenticating a chip are provided and a computer storage medium is also provided. The method may include configuring a software environment and a hardware environment associated with the chip via a configuration file, the configuration file including a plurality of instructions and data required to execute the instructions, the software environment and the hardware environment being created based on the chip; causing a plurality of instructions to be executed in a software environment and a hardware environment, respectively; obtaining a first information generated by executing instructions in a software environment and a second information generated by executing instructions in the hardware environment, respectively, the first information and the second information including the plurality of instructions being executed, its address, and data generated by executing the instructions; and authenticating the chip based on the generated first information and second information.

Abstract: The present disclosure provides an inspection system for contact network damage detection, including: a laser imaging radar, an X-ray transmitter, a booster, an X-ray receiver, and a control circuit board. The laser imaging radar emits a laser beam to a contact line for scanning. A laser radiation reflected by the contact line is received, and a continuous analog signal is generated, which is restored to a real-time image of the contact line. After the analog signal is converted into a digital signal on the control circuit board, a height of the contact line in a horizontal direction is calculated to determine a wear degree on an outer surface of the contact line. The booster boosts electric energy obtained by the pantograph on the contact line and supply power to the X-ray transmitter.

Abstract: The present invention relates to an improved synthesis of malathion. The presence of an acid facilitates the reaction between O,O-dimethyldithiophosphoric acid (O,O-DMDTPA) and maleate and leads to excellent product yield in shorter reaction time with fewer impurities.

Abstract: An example voltage controlled oscillator includes an inductor, a capacitor coupled to the inductor, and a signal source coupled to the inductor and the capacitor to sustain an oscillating signal. The voltage controlled oscillator includes a first varactor coupled to the inductor and the capacitor, wherein the first varactor is biased by a first bias voltage and is configured to change a frequency of the oscillating signal based on a first control voltage signal. The voltage controlled oscillator includes a second varactor coupled to the inductor, the capacitor, and the first varactor, wherein the second varactor is biased by a second bias voltage and is configured to compensate temperature variation of the frequency of the oscillating signal over a plurality of frequency bands based on second control voltage signal.