Abstract: Disclosed is a manufacturing method of a composite panel, comprising: a providing step of providing a flexible sheet; an attaching step of forming a lamellar structure by attaching at least one lamellar board to cover the flexible sheet; and a cutting step of cutting a plurality of longitudinal grooves in the lamellar structure layer to form a plurality of lamellar strips, thereby obtaining the composite panel that is able to be bent laterally into a curved configuration.

Abstract: A flyback power converter includes a power transformer, a first lossless voltage conversion circuit, a first low-dropout linear regulator and a secondary side power supply circuit. The first low-dropout linear regulator (LDO) generates a first operation voltage as power supply for being supplied to a sub-operation circuit. The secondary side power supply circuit includes a second lossless voltage conversion circuit and a second LDO. The second LDO generates a second operation voltage. The first operation voltage and the second operation voltage are shunted to a common node. When a first lossless conversion voltage is greater than a first threshold voltage, the second LDO is enabled to generate the second operation voltage to replace the first operation voltage as power supply supplied to the sub-operation circuit; wherein the second lossless conversion voltage is lower than the first lossless switching voltage.

Abstract: Biosensing measurements (e.g., heart rate, pupil size, cognitive load, stress level, etc.) are communicated in the context of events that occurred concurrently with the biosensing measurements. The biosensing measurements and the contextual events can be presented in real-time or as historical summaries. Such presentations allow users to easily gain useful insights into which specific events triggered which specific physiological responses in users. Therefore, the present concepts more effectively communicate insights that can be used to change user behavior, modify workflow, design improved products or services, enhance user satisfaction and wellbeing, increase productivity and revenue, and eliminate negative impacts on user's emotions and mental state.

Abstract: Positive electrode active material for solid-state batteries, comprising Li, M?, and oxygen, wherein M? comprises: Ni in a content x between 50.0 mol % and 75.0 mol %, Co in a content y between 0.0 mol % and 40.0 mol %, Mn in a content z between 0.0 mol % and 40.0 mol %, dopants in a content a between 0.0 mol % and 2.0 mol %, Zr in a content b between 0.1 mol % and 5.0 mol %, wherein x+y+z+a+b is 100.0 mol %, wherein Zr A = b ( x + y + z + b ) , wherein the positive electrode active material has a Zr content ZrB is expressed as molar fraction compared to the sum of molar fractions of Co, Mn, Ni, and Zr all as measured by XPS analysis, wherein ZrB/ZrA>50.0, the positive electrode active material comprising secondary particles having a plurality of primary particles said primary particles having an average diameter between 170 nm and 340 nm.

Abstract: Positive electrode active material for solid-state batteries, comprising Li, M?, and oxygen, wherein M? comprises: Ni in a content x between 50.0 mol % and 85.0 mol %, Co in a content y between 0.0 mol % and 40.0 mol %, Mn in a content z between 0.0 mol % and 40.0 mol %, dopants in a content a between 0.0 mol % and 2.0 mol %, Zr in a content b between 0.1 mol % and 5.0 mol %, wherein x+y+z+a+b is 100.0 mol %, wherein Zr A = b ( x + y + z + b ) , wherein the positive electrode active material has a Zr content ZrB is expressed as molar fraction compared to the sum of molar fractions of Co, Mn, Ni, and Zr all as measured by XPS analysis, wherein ZrB/ZrA>50.0, the positive electrode active material comprising secondary particles having a plurality of primary particles said primary particles having an average diameter between 170 nm and 340 nm.

Abstract: A semiconductor device includes a single-layered dielectric layer, a conductive line, a conductive via and a conductive pad. The conductive line and the conductive via are disposed in the single-layered dielectric layer. The conductive pad is extended into the single-layered dielectric layer to electrically connected to the conductive line.

Abstract: Disclosed are a conductive film and a test component. A conductive film includes a supporting layer, a circuit layer and a protective layer. The supporting layer has a first surface and a second surface opposite to the first surface. The supporting layer supports the circuit layer. The circuit layer includes a first protruding part, a second protruding part and a connecting part. The first protruding part is disposed on the first surface. The second protruding part is disposed on the second surface. The connecting part is disposed between the first protruding part and the second protruding part. The first protruding part is connected to the second protruding part through the connecting part. The protective layer covers the first protruding part. The conductive film and the test component of the disclosed embodiments may have a buffering effect or increase the service life.

Abstract: A method of performing automatic tuning on a deep learning model includes: utilizing an instruction-based learned cost model to estimate a first type of operational performance metrics based on a tuned configuration of layer fusion and tensor tiling; utilizing statistical data gathered during a compilation process of the deep learning model to determine a second type of operational performance metrics based on the tuned configuration of layer fusion and tensor tiling; performing an auto-tuning process to obtain a plurality of optimal configurations based on the first type of operational performance metrics and the second type of operational performance metrics; and configure the deep learning model according to one of the plurality of optimal configurations.

Abstract: A mending method for a display includes the steps of making a display device light to make a plurality of light emitting positions thereof shine, searching out a plurality of defect positions among the light emitting positions, providing a transferring device having a transferring surface with a plurality of miniature light emitting elements positioned correspondingly to the light emitting positions, planning a mending procedure which includes in the area the transferring surface corresponds to, choosing in chief the largest number of defect positions able to be mended at a single time according to the positions of the miniature light emitting elements and then in the area the transferring surface corresponds to, planning the rest of the defect positions according to the rest of the miniature light emitting elements, and according to the mending procedure, moving the transferring device to weld the miniature light emitting elements at the defect positions.

Abstract: A method of obtaining a parameter of a synchronous motor is disclosed and includes: setting an operating current of the motor; providing a positive fixed voltage to the motor and monitoring a feedback current from the motor; recording a triggering time for the feedback current to reach the operating current; providing a negative fixed voltage to the motor for the triggering time; obtaining a square-wave voltage with a fixed frequency based on the positive fixed voltage and the negative fixed voltage being provided; providing the square-wave voltage with the fixed frequency to one axis of the motor; transforming three-phase current from the motor into an axial current; computing an inductance value of this axis based on the fixed frequency, the square-wave voltage and the axial current; and, creating an inductance-current parameter table based on a plurality of the inductance values and the axial currents correspondingly.

Abstract: Methods of cutting gate structures, and structures formed, are described. In an embodiment, a structure includes first and second gate structures over an active area, and a gate cut-fill structure. The first and second gate structures extend parallel. The active area includes a source/drain region disposed laterally between the first and second gate structures. The gate cut-fill structure has first and second primary portions and an intermediate portion. The first and second primary portions abut the first and second gate structures, respectively. The intermediate portion extends laterally between the first and second primary portions. First and second widths of the first and second primary portions along longitudinal midlines of the first and second gate structures, respectively, are each greater than a third width of the intermediate portion midway between the first and second gate structures and parallel to the longitudinal midline of the first gate structure.

Abstract: Disclosed are antigen binding polypeptides and antigen binding polypeptide complexes (e.g., antibodies and antigen binding fragments thereof) having certain structural and/or functional features. Also disclosed are polynucleotides and vectors encoding such polypeptides and polypeptide complexes; host cells, pharmaceutical compositions and kits containing such polypeptides and polypeptide complexes; and methods of using such polypeptides and polypeptide complexes.

Abstract: A memory structure including a substrate, a first doped region, a second doped region, a first gate, a second gate, a first charge storage structure, and a second charge storage structure is provided. The first gate is located on the first doped region. The second gate is located on the second doped region. The first charge storage structure is located between the first gate and the first doped region. The first charge storage structure includes a first tunneling dielectric layer, a first dielectric layer, and a first charge storage layer. The second charge storage structure is located between the second gate and the second doped region. The second charge storage structure includes a second tunneling dielectric layer, a second dielectric layer, and a second charge storage layer. The thickness of the second tunneling dielectric layer is greater than the thickness of the first tunneling dielectric layer.

Abstract: A bimodal lithium transition metal oxide based powder mixture comprising a first and a second lithium transition metal oxide based powder. The first powder comprises a material A having a layered crystal structure comprising the elements Li, a transition metal based composition M and oxygen and has a particle size distribution with a span <1.0. The second powder has a monolithic morphology and a general formula Li1+bN?1-bO2, wherein ?0.03?b?0.10, and N?=NixM?yCozEd, wherein 0.30?x?0.92, 0.05?y?0.40, 0.05?z?0.40 and 0?d?0.10, with M? being one or both of Mn or Al, and E being a dopant different from M?. The first powder has an average particle size D50 between 10 and 40 ?m. The second powder has an average particle size D50 between 2 and 4 ?m. The weight ratio of the second powder in the bimodal mixture is between 20 and 60 wt %.

Abstract: A spike structure made of different materials includes: a sole protruding portion, an interface member and a cleat member. The interface member is disposed between the sole protruding portion and the cleat member, so that the sole protruding portion does not directly contact the cleat member, but the sole protruding portion and the cleat member are in contact with the interface member, and because the interface member is easily bonded to the cleat member, the interface member and the cleat member can be fixedly combined by bonding. Besides, the interface member and the sole protruding portion are made of hard materials with similar hardness and are not easily deformed when they are in contact with each other. Therefore, the interface member and the sole protruding portion are not easily slipped off.

Abstract: An IC structure includes a first active area including a first plurality of fin structures extending in a first direction, a second active area including a second plurality of fin structures extending in the first direction, an electrical fuse (eFuse) extending in the first direction between the first and second active areas and electrically connected to each of the first and second pluralities of fin structures, a first plurality of gate structures extending over the first active area perpendicular to the first direction, a second plurality of gate structures extending over the second active area in the second direction, a first signal line extending in the first direction adjacent to the first active area and electrically connected to the first plurality of gate structures, and a second signal line extending in the first direction adjacent to the second active area and electrically connected to the second plurality of gate structures.

Abstract: A marking method on image combined with sound signal, a terminal apparatus, and a server are provided. In the method, a first image is displayed. A selection command is detected. A target sound signal is embedded into a speech signal so as to generate a combined sound signal. The combined sound signal is transmitted. The selection command corresponds to a target region in the first image, and the selection command is generated selecting the target region through an input operation. The target sound signal corresponds to the target region of the selection command, and the speech signal is obtained by receiving sound. Accordingly, all attendants in the video conference are able to make makings on a shared screen.

Abstract: A behavior recognition device for recognizing behaviors of a semiconductor manufacturing apparatus includes a storage device and a control unit. The storage device is configured to store log data of the semiconductor manufacturing apparatus. The control unit is cooperatively connected to the storage device, and configured to build a transition state model based on the log data to analyze behaviors related to wafer transfer sequences and manufacturing operations of the semiconductor manufacturing apparatus.

Abstract: An antifuse structure and IC devices incorporating such antifuse structures in which the antifuse structure includes an dielectric antifuse structure formed on an active area having a first dielectric antifuse electrode, a second dielectric antifuse electrode extending parallel to the first dielectric antifuse electrode, a first dielectric composition between the first dielectric antifuse electrode and the second dielectric antifuse electrode, and a first programming transistor electrically connected to a first voltage supply wherein, during a programming operation a programming voltage is selectively applied to certain of the dielectric antifuse structures to form a resistive direct electrical connection between the first dielectric antifuse electrode and the second dielectric antifuse electrode.

Abstract: A method of generating an integrated circuit (IC) layout diagram includes overlapping an active region with a plurality of gate regions, thereby defining a program transistor and a read transistor of a one-time-programmable (OTP) bit, overlapping a through via region with a gate region of the plurality of gate regions or with the active region, and overlapping the through via region with a metal region of a back-side metal layer.