Patents by Inventor An-Jhih Su

An-Jhih Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190341306
    Abstract: Embodiments provide a high aspect ratio via for coupling a top electrode of a vertically oriented component to the substrate, where the top electrode of the component is coupled to the via by a conductive bridge, and where the bottom electrode of the component is coupled to substrate. Some embodiments provide for mounting the component by a component wafer and separating the components while mounted to the substrate. Some embodiments provide for mounting individual components to the substrate.
    Type: Application
    Filed: December 7, 2018
    Publication date: November 7, 2019
    Inventors: Chen-Hua Yu, Chi-Hsi Wu, Wen-Chih Chiou, Tsang-Jiuh Wu, Der-Chyang Yeh, Ming Shih Yeh, An-Jhih Su
  • Patent number: 10461036
    Abstract: A multi-stacked package-on-package structure includes a method. The method includes: adhering a first die and a plurality of second dies to a substrate, the first die having a different function from each of the plurality of second dies; attaching a passive device over the first die; encapsulating the first die, the plurality of second dies, and the passive device; and forming a first redistribution structure over the passive device, the first die, and the plurality of second dies, the passive device connecting the first die to the first redistribution structure.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: October 29, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, An-Jhih Su, Chi-Hsi Wu, Der-Chyang Yeh, Ming Shih Yeh, Wei-Cheng Wu
  • Publication number: 20190326259
    Abstract: A method includes attaching a first-level device die to a dummy die, encapsulating the first-level device die in a first encapsulating material, forming through-vias over and electrically coupled to the first-level device die, attaching a second-level device die over the first-level device die, and encapsulating the through-vias and the second-level device die in a second encapsulating material. Redistribution lines are formed over and electrically coupled to the through-vias and the second-level device die. The dummy die, the first-level device die, the first encapsulating material, the second-level device die, and the second encapsulating material form parts of a composite wafer.
    Type: Application
    Filed: July 1, 2019
    Publication date: October 24, 2019
    Inventors: Chen-Hua Yu, An-Jhih Su, Wei-Yu Chen, Ying-Ju Chen, Tsung-Shu Lin, Chin-Chuan Chang, Hsien-Wei Chen, Wei-Cheng Wu, Li-Hsien Huang, Chi-Hsi Wu, Der-Chyang Yeh
  • Publication number: 20190324057
    Abstract: A rectangular probe of a probe card device includes an upper positioned segment, an upper contacting segment, a deformable segment, a lower positioned segment, and a lower contacting segment. The upper positioned segment includes an offset portion, a first positioned portion extending from the offset portion along a first direction, and a second positioned portion extending from a second direction being parallel to and opposite to the first direction. In a width direction perpendicular to the first direction, a width of the first positioned portion is 25%-95% of a width of the offset portion, and a width of the second positioned portion is 25%-95% of the width of the offset portion. The upper contacting segment extends from the first positioned portion along the first direction. The deformable segment, the lower positioned segment, and the lower contacting segment sequentially extend from the second positioned portion along the second direction.
    Type: Application
    Filed: July 16, 2018
    Publication date: October 24, 2019
    Inventors: YEN-CHEN CHEN, WEI-JHIH SU, CHIH-PENG HSIEH
  • Publication number: 20190326132
    Abstract: A structure and method of forming are provided. The structure includes a dielectric layer disposed on a substrate. The structure includes a cavity in the dielectric layer, and a plurality of contacts positioned in the cavity and bonded to the substrate. A component is bonded to the plurality of contacts. Underfill is disposed in the cavity between the dielectric layer and the component. A plurality of connectors is on the dielectric layer, the connectors being connected through the dielectric layer to a conductor that is at a same level of metallization as the plurality of contacts.
    Type: Application
    Filed: July 1, 2019
    Publication date: October 24, 2019
    Inventors: Wei-Yu Chen, Tien-Chung Yang, An-Jhih Su, Hsien-Wei Chen
  • Publication number: 20190317131
    Abstract: A probe card device includes a first die, a second die, and a plurality of rectangular probes. Each of the rectangular probes includes a middle segment, two extending segments, and two contact end segments. In each of the rectangular probes, the two extending segments are respectively arranged in the first die and the second die, the two contact end segments respectively extend from two opposite ends of the two extending segments along a direction away from the middle segment, each of the two contact end segments includes a conductive portion, and at least one of the two contact end segments includes a piercing portion partially embedded in the conductive portion thereof. A conductivity of the piercing portion is less than that of each of the two conductive portions, and a Vickers hardness number of the piercing portion is larger than that of each of the two conductive portions.
    Type: Application
    Filed: March 20, 2019
    Publication date: October 17, 2019
    Inventors: Chih-Peng Hsieh, WEI-JHIH SU
  • Publication number: 20190302147
    Abstract: A probe head includes a first die, a second die, and a plurality of rectangular probes. Each rectangular probe includes a deformable segment arranged between the first and the second dies, a first positioned segment, and a second positioned segment, the latter two of which respectively extend from two opposite ends of the deformable segment and are respectively arranged in a first rectangular wall of the first die and a second rectangular wall of the second die. Each first rectangular wall and the corresponding second rectangular wall have a longitudinal offset and a width offset so as to press the first and second positioned segments of the corresponding rectangular probe, so that the deformable segment of the corresponding rectangular probe is compressed to be in a curved and deformed shape. A ratio of the longitudinal offset to the width offset is within a range of 10 to 1.
    Type: Application
    Filed: March 20, 2019
    Publication date: October 3, 2019
    Inventors: Chih-Peng Hsieh, WEI-JHIH SU
  • Publication number: 20190273001
    Abstract: A semiconductor device includes a first die extending through a molding compound layer, a first dummy die having a bottom embedded in the molding compound layer, wherein a height of the first die is greater than a height of the first dummy die, and an interconnect structure over the molding compound layer, wherein a first metal feature of the interconnect structure is electrically connected to the first die and a second metal feature of the interconnect structure is over the first dummy die and extends over a sidewall of the first dummy die.
    Type: Application
    Filed: May 20, 2019
    Publication date: September 5, 2019
    Inventors: Chen-Hua Yu, An-Jhih Su, Chi-Hsi Wu, Der-Chyang Yeh, Hsien-Wei Chen, Wei-Yu Chen
  • Publication number: 20190273018
    Abstract: A method includes forming a metal layer extending into openings of a dielectric layer to contact a first metal pad and a second metal pad, and bonding a bottom terminal of a component device to the metal layer. The metal layer has a first portion directly underlying and bonded to the component device. A raised via is formed on the metal layer, and the metal layer has a second portion directly underlying the raised via. The metal layer is etched to separate the first portion and the second portion of the metal layer from each other. The method further includes coating the raised via and the component device in a dielectric layer, revealing the raised via and a top terminal of the component device, and forming a redistribution line connecting the raised via to the top terminal.
    Type: Application
    Filed: May 20, 2019
    Publication date: September 5, 2019
    Inventors: Chen-Hua Yu, An-Jhih Su, Chi-Hsi Wu, Der-Chyang Yeh, Ming Shih Yeh, Jing-Cheng Lin, Hung-Jui Kuo
  • Patent number: 10401388
    Abstract: A rectangular probe of a probe card device includes a metallic pin and a metallic reinforcing body. The metallic pin includes a middle segment, a first connecting segment and a second connecting segment respectively extending from two opposite ends of the middle segment, a first contacting segment extending from the first connecting segment in a direction away from the middle segment, and a second contacting segment extending from the second connecting segment in a direction away from the middle segment. The metallic reinforcing body is integrally formed on the middle segment. The Young's modulus of the metallic reinforcing body is larger than that of the metallic pin. The electric conductivity of the metallic pin is larger than that of the metallic reinforcing body. An outside diameter jointly formed by the metallic reinforcing body and the middle segment is larger than an outside diameter of the second connecting segment.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: September 3, 2019
    Assignee: CHUNGHWA PRECISION TEST TECH. CO., LTD.
    Inventors: Wei-Jhih Su, Chih-Peng Hsieh
  • Publication number: 20190259727
    Abstract: Package structures and methods of forming the same are disclosed. One of the package structures includes a first die, a second die, a dummy substrate and an encapsulant. A bottom surface of the second die is adhered to a top surface of the dummy substrate through a glue layer, and a total area of the bottom surface of the second die is different from a total area of the top surface of the dummy substrate. A total thickness of the first die is substantially equal to a total thickness of the second die, the dummy substrate and the glue layer. The encapsulant is disposed aside the first die, the second die and the dummy substrate.
    Type: Application
    Filed: May 6, 2019
    Publication date: August 22, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Li-Hsien Huang, An-Jhih Su, Hsien-Wei Chen
  • Publication number: 20190259630
    Abstract: A semiconductor device and method for forming the semiconductor device is provided. The semiconductor device includes an integrated circuit having through vias adjacent to the integrated circuit die, wherein a molding compound is interposed between the integrated circuit die and the through vias. The through vias have a projection extending through a patterned layer, and the through vias may be offset from a surface of the patterned layer. The recess may be formed by selectively removing a seed layer used to form the through vias.
    Type: Application
    Filed: May 6, 2019
    Publication date: August 22, 2019
    Inventors: Hsien-Wei Chen, Chen-Hua Yu, Chi-Hsi Wu, Der-Chyang Yeh, An-Jhih Su, Wei-Yu Chen
  • Publication number: 20190252312
    Abstract: A method for forming a via in a semiconductor device and a semiconductor device including the via are disclosed. In an embodiment, the method may include bonding a first terminal and a second terminal of a first substrate to a third terminal and a fourth terminal of a second substrate; separating the first substrate to form a first component device and a second component device; forming a gap fill material over the first component device, the second component device, and the second substrate; forming a conductive via extending from a top surface of the gap fill material to a fifth terminal of the second substrate; and forming a top terminal over a top surface of the first component device, the top terminal connecting the first component device to the fifth terminal of the second substrate through the conductive via.
    Type: Application
    Filed: September 4, 2018
    Publication date: August 15, 2019
    Inventors: Chen-Hua Yu, An-Jhih Su, Chi-Hsi Wu, Wen-Chih Chiou, Tsang-Jiuh Wu, Der-Chyang Yeh, Ming Shih Yeh
  • Patent number: 10366959
    Abstract: Semiconductor devices and methods of forming are provided. A molding compound extends along sidewalls of a first die and a second die. A redistribution layer is formed over the first die, the second die, and the molding compound. The redistribution layer includes a conductor overlying a gap between the first die and the second die. The conductor is routed at a first angle over an edge of the first die. The first angle is measured with respect to a straight line that extends along a shortest between the first die and the second die, and the first angle is greater than 0.
    Type: Grant
    Filed: October 4, 2017
    Date of Patent: July 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsien-Wei Chen, An-Jhih Su, Tsung-Shu Lin
  • Publication number: 20190227101
    Abstract: The present disclosure discloses a probe card device and a rectangular probe. The rectangular probe includes a metallic pin, an insulating film, and an insulating latch. The metallic pin includes a connecting portion, a detecting portion, and a middle segment arranged between the connecting portion and the detecting portion. The insulating film covers entirely outer surfaces of the middle segment. The insulating latch is in a ring shape and is arranged around at least part of the insulating film. A bottom of the insulating latch is arranged adjacent to the detecting portion. A length of the insulating latch is less than or equal to that of the insulating film, and a thickness of the insulating latch is larger than that of the insulating film and is at least 10 ?m.
    Type: Application
    Filed: March 20, 2018
    Publication date: July 25, 2019
    Inventors: Chih-Peng Hsieh, Yen-Chen Chen, Wei-Jhih Su
  • Publication number: 20190212367
    Abstract: The present disclosure discloses a probe card device and a rectangular probe thereof. The rectangular probe includes a branch segment, a first contacting segment and a second contacting segment. The branch segment is ring-shaped and has a perforation, and the branch segment includes two branch arms respectively located at two sides of the perforation. The first contacting segment is located at a side of the branch segment and is pierced through a first through hole of a first guide plate. The second contacting segment is located at the other side of the branch segment. A maximum width portion of the branch segment has a variable width greater than a hole size of the first through hole, and the two branch arms of the branch segment are compressible to enable the variable width to be less than or equal to the hole size of the first through hole.
    Type: Application
    Filed: March 30, 2018
    Publication date: July 11, 2019
    Inventors: Chih-Peng Hsieh, YEN-CHEN CHEN, Wei-Jhih Su
  • Patent number: 10347606
    Abstract: A method includes attaching a first-level device die to a dummy die, encapsulating the first-level device die in a first encapsulating material, forming through-vias over and electrically coupled to the first-level device die, attaching a second-level device die over the first-level device die, and encapsulating the through-vias and the second-level device die in a second encapsulating material. Redistribution lines are formed over and electrically coupled to the through-vias and the second-level device die. The dummy die, the first-level device die, the first encapsulating material, the second-level device die, and the second encapsulating material form parts of a composite wafer.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: July 9, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, An-Jhih Su, Wei-Yu Chen, Ying-Ju Chen, Tsung-Shu Lin, Chin-Chuan Chang, Hsien-Wei Chen, Wei-Cheng Wu, Li-Hsien Huang, Chi-Hsi Wu, Der-Chyang Yeh
  • Patent number: 10340155
    Abstract: A structure and method of forming are provided. The structure includes a dielectric layer disposed on a substrate. The structure includes a cavity in the dielectric layer, and a plurality of contacts positioned in the cavity and bonded to the substrate. A component is bonded to the plurality of contacts. Underfill is disposed in the cavity between the dielectric layer and the component. A plurality of connectors is on the dielectric layer, the connectors being connected through the dielectric layer to a conductor that is at a same level of metallization as the plurality of contacts.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: July 2, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Yu Chen, Tien-Chung Yang, An-Jhih Su, Hsien-Wei Chen
  • Patent number: 10319683
    Abstract: A multi-stacked package-on-package structure includes a method. The method includes: adhering a first die and a plurality of second dies to a substrate, the first die having a different function from each of the plurality of second dies; attaching a passive device over the first die; encapsulating the first die, the plurality of second dies, and the passive device; and forming a first redistribution structure over the passive device, the first die, and the plurality of second dies, the passive device connecting the first die to the first redistribution structure.
    Type: Grant
    Filed: July 3, 2017
    Date of Patent: June 11, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, An-Jhih Su, Chi-Hsi Wu, Der-Chyang Yeh, Ming Shih Yeh, Wei-Cheng Wu
  • Publication number: 20190164783
    Abstract: A method includes attaching a first die and a second die to a carrier; forming a molding material between the first die and second die; and forming a redistribution structure over the first die, the second die and the molding material, the redistribution structure includes a first redistribution region; a second redistribution region; and a dicing region between the first redistribution region and the second redistribution region. The method further includes forming a first opening and a second opening in the dicing region, the first opening and the second opening extending through the redistribution structure and exposing the molding material; and separating the first die and the second die by cutting through a portion of the molding material aligned with the dicing region from a second side of the molding material toward the first side of the molding material, the second side opposing the first side.
    Type: Application
    Filed: February 28, 2018
    Publication date: May 30, 2019
    Inventors: Li-Hsien Huang, Yueh-Ting Lin, An-Jhih Su, Ming Shih Yeh, Der-Chyang Yeh