Abstract: Systems and methods for generating a simulation model that simulates a SerDes system comprising components from different SerDes designs are provided. At least one component from the SerDes system comes from a proprietary SerDes design having an existing simulation model for the overall proprietary SerDes design. The existing simulation model includes software codes that inter-mingle the characteristics of the different components of this proprietary SerDes design. Characteristics of at least one SerDes component are extracted and modularized from a proprietary simulator to form a proprietary SerDes component model. Optionally, a standard SerDes component model can also be generated using an existing IBIS-AMI model. A new layer of abstraction is introduced on top of the different SerDes component model types.

Abstract: Systems and methods for generating a simulation model that simulates a SerDes system comprising components from different SerDes designs are provided. At least one component from the SerDes system comes from a proprietary SerDes design having an existing simulation model for the overall proprietary SerDes design. The existing simulation model includes software codes that inter-mingle the characteristics of the different components of this proprietary SerDes design. Characteristics of at least one SerDes component are extracted and modularized from a proprietary simulator to form a proprietary SerDes component model. Optionally, a standard SerDes component model can also be generated using an existing IBIS-AMI model. A new layer of abstraction is introduced on top of the different SerDes component model types.

Abstract: A method and system for simulating a circuit design that includes analog and/or digital circuitry uses a hybrid system of static analysis and dynamic simulation. Once the user's circuit is read in and partitioned into stages, the input vectors are applied. A hybrid vector is used to represent a number of possible signal states, for example, a logic 0 or logic 1, as well as a number of possible signal transitions, for example, a rising signal or a falling signal. The possible combinations of states are enumerated and the network in the stage is solved for all possible combinations. The results from the network solutions for the different combinations are recomposed into the hybrid notation, which is then applied to the next stage.

Abstract: A method and system for simulating a circuit design that includes analog and/or digital circuitry uses a hybrid system of static analysis and dynamic simulation. Once the user's circuit is read in and partitioned into stages, the input vectors are applied. A hybrid vector is used to represent a number of possible signal states, for example, a logic 0 or logic 1, as well as a number of possible signal transitions, for example, a rising signal or a falling signal. The possible combinations of states are enumerated and the network in the stage is solved for all possible combinations. The results from the network solutions for the different combinations are recomposed into the hybrid notation, which is then applied to the next stage.