Patents by Inventor An-Ming Chiang

An-Ming Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230085181
    Abstract: Embodiments described herein relate generally to devices, systems and methods of producing high energy density batteries having a semi-solid cathode that is thicker than the anode. An electrochemical cell can include a positive electrode current collector, a negative electrode current collector and an ion-permeable membrane disposed between the positive electrode current collector and the negative electrode current collector. The ion-permeable membrane is spaced a first distance from the positive electrode current collector and at least partially defines a positive electroactive zone. The ion-permeable membrane is spaced a second distance from the negative electrode current collector and at least partially defines a negative electroactive zone. The second distance is less than the first distance.
    Type: Application
    Filed: June 15, 2022
    Publication date: March 16, 2023
    Applicant: 24M Technologies, Inc.
    Inventors: Taison TAN, Yet-Ming CHIANG, Naoki OTA, Throop WILDER, Mihai DUDUTA
  • Patent number: 11597011
    Abstract: Techniques are disclosed for fabricating multi-part assemblies. In particular, by forming release layers between features such as bearings or gear teeth, complex mechanical assemblies can be fabricated in a single additive manufacturing process.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: March 7, 2023
    Assignee: Desktop Metal, Inc.
    Inventors: Peter Alfons Schmitt, Jonah Samuel Myerberg, Ricardo Fulop, Michael Andrew Gibson, Matthew David Verminski, Richard Remo Fontana, Christopher Allan Schuh, Yet-Ming Chiang, Anastasios John Hart
  • Patent number: 11594065
    Abstract: An optical image recognition device and a method for fabricating the same are disclosed. The device includes a flexible printed circuit board, an image sensor, a glue, an optical collimator, a supporting ring, a sealant, and an optical filter. The top of the flexible printed circuit board is provided with a recess, the image sensor is located in the recess, the sidewalls of the image sensor and the recess are separated from each other, and the image sensor is coupled to the flexible printed circuit board through conductive wires. The glue adheres to the flexible printed circuit board and the image sensor and covers the conductive wires. The optical collimator is disposed on the image sensor. The supporting ring, disposed on the flexible printed circuit board, surrounds the glue and the optical collimator. The optical filter, disposed on the sealant, shields the optical collimator and the image sensor.
    Type: Grant
    Filed: March 8, 2022
    Date of Patent: February 28, 2023
    Assignees: Interface Technology (Chengdu) Co., Ltd., Interface Optoelectronics (Shenzhen) Co., Ltd., General Interface Solution Limited
    Inventors: Chun Te Chang, Chung Wu Liu, Ming Chiang Yu, Chia Yuan Wu
  • Patent number: 11591221
    Abstract: This present invention provides a microporous carbon nanospheres, method for synthesizing and activating thereof, the method comprising: adding and mixing well deionized water, absolute ethanol, triblock copolymer, ammonia solution, resorcinol and formaldehyde solution; separating solid and liquid of the mixture solution, then drying the separated solid substrate to have a dried solid substrate; sintering the dried solid substrate surrounding by nitrogen twice and collecting microporous carbon nanospheres after cooling down. Further sintering to activate these microporous carbon nanospheres surrounding by carbon dioxide, and collecting activated microporous carbon nanospheres after cooling down. Microporous carbon nanospheres and activated microporous carbon nanospheres synthesized by this present invention have spherical structure, small size and high the specific surface area, and the process is simplified, cost-effective and environment-friendly.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: February 28, 2023
    Assignee: NATIONAL CHUNG CHENG UNIVERSITY
    Inventors: Yuan-Yao Li, Cheng-Yen Tsai, Li-Ming Chiang
  • Patent number: 11586575
    Abstract: There is disclosed an example of an artificial intelligence (AI) system, including: a first hardware platform; a fabric interface configured to communicatively couple the first hardware platform to a second hardware platform; a processor hosted on the first hardware platform and programmed to operate on an AI problem; and a first training accelerator, including: an accelerator hardware; a platform inter-chip link (ICL) configured to communicatively couple the first training accelerator to a second training accelerator on the first hardware platform without aid of the processor; a fabric ICL to communicatively couple the first training accelerator to a third training accelerator on a second hardware platform without aid of the processor; and a system decoder configured to operate the fabric ICL and platform ICL to share data of the accelerator hardware between the first training accelerator and second and third training accelerators without aid of the processor.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: February 21, 2023
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Da-Ming Chiang, Kshitij A. Doshi, Suraj Prabhakaran, Mark A. Schmisseur
  • Patent number: 11580428
    Abstract: Various systems and methods of initiating and performing contextualized AI inferencing, are described herein. In an example, operations performed with a gateway computing device to invoke an inferencing model include receiving and processing a request for an inferencing operation, selecting an implementation of the inferencing model on a remote service based on a model specification and contextual data from the edge device, and executing the selected implementation of the inferencing model, such that results from the inferencing model are provided back to the edge device. Also in an example, operations performed with an edge computing device to request an inferencing model include collecting contextual data, generating an inferencing request, transmitting the inference request to a gateway device, and receiving and processing the results of execution. Further techniques for implementing a registration of the inference model, and invoking particular variants of an inference model, are also described.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: February 14, 2023
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Suraj Prabhakaran, Kshitij Arun Doshi, Da-Ming Chiang, Joe Cahill
  • Publication number: 20230039631
    Abstract: There is disclosed an example of an artificial intelligence (AI) system, including: a first hardware platform; a fabric interface configured to communicatively couple the first hardware platform to a second hardware platform; a processor hosted on the first hardware platform and programmed to operate on an AI problem; and a first training accelerator, including: an accelerator hardware; a platform inter-chip link (ICL) configured to communicatively couple the first training accelerator to a second training accelerator on the first hardware platform without aid of the processor; a fabric ICL to communicatively couple the first training accelerator to a third training accelerator on a second hardware platform without aid of the processor; and a system decoder configured to operate the fabric ICL and platform ICL to share data of the accelerator hardware between the first training accelerator and second and third training accelerators without aid of the processor.
    Type: Application
    Filed: October 25, 2022
    Publication date: February 9, 2023
    Applicant: Intel Corporation
    Inventors: Francesc Guim Bernat, Da-Ming Chiang, Kshitij A. Doshi, Suraj Prabhakaran, Mark A. Schmisseur
  • Publication number: 20230035212
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: July 29, 2021
    Publication date: February 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20230027768
    Abstract: A computing method for performing a matrix multiplying-and-accumulating computation by a flash memory array which includes word lines, bit lines and flash memory cells. The computing method includes the following steps: respectively storing a weight value in each of the flash memory cells, receiving a plurality of input voltages via the word lines, performing an computation on one of the input voltages and the weight value by each of the flash memory cells to obtain an output current, outputting the output currents of the flash memory cells via the bit lines, and accumulating the output currents of the flash memory cells connected to the same bit line of the bit lines to obtain a total output current. Each of the flash memory cells is an analog device, and each of the input voltages, each of the output currents and each of the weight values are analog values.
    Type: Application
    Filed: July 22, 2022
    Publication date: January 26, 2023
    Inventors: Chung-Chieh CHEN, Da-Ming CHIANG, Shuo-Hong HUNG
  • Publication number: 20230018078
    Abstract: A method of manufacturing an electrochemical cell includes transferring an anode semi-solid suspension to an anode compartment defined at least in part by an anode current collector and an separator spaced apart from the anode collector. The method also includes transferring a cathode semi-solid suspension to a cathode compartment defined at least in part by a cathode current collector and the separator spaced apart from the cathode collector. The transferring of the anode semi-solid suspension to the anode compartment and the cathode semi-solid to the cathode compartment is such that a difference between a minimum distance and a maximum distance between the anode current collector and the separator is maintained within a predetermined tolerance. The method includes sealing the anode compartment and the cathode compartment.
    Type: Application
    Filed: March 1, 2022
    Publication date: January 19, 2023
    Applicant: 24M Technologies, Inc.
    Inventors: Alexander H. SLOCUM, Tristan DOHERTY, Ricardo BAZZARELLA, James C. CROSS, III, Pimpa LIMTHONGKUL, Mihai DUDUTA, Jeffry DISKO, Allen YANG, Throop WILDER, William Craig CARTER, Yet-Ming CHIANG
  • Publication number: 20230008476
    Abstract: An error detection and correction method is provided. The method includes: when a pipeline stage error is detected, correcting the pipeline stage error; when it is determined that a plurality of cascaded pipeline stage circuits have continuous pipeline stage errors, stopping all operations of all pipeline stage circuits; flushing the data of the pipeline stage circuits; and re-processing the data of the pipeline stage circuits at a downclocked frequency.
    Type: Application
    Filed: July 6, 2022
    Publication date: January 12, 2023
    Inventors: Chung-Chieh CHEN, Da-Ming CHIANG, Shuo-Hong HUNG, Bing-Chen WU
  • Patent number: 11552290
    Abstract: Various embodiments provide a battery, a bulk energy storage system including the battery, and/or a method of operating the bulk energy storage system including the battery. In various embodiment, the battery may include a first electrode, an electrolyte, and a second electrode, wherein one or both of the first electrode and the second electrode comprises direct reduced iron (“DRI”). In various embodiments, the DRI may be in the form of pellets. In various embodiments, the pellets may comprise at least about 60 wt % iron by elemental mass, based on the total mass of the pellets. In various embodiments, one or both of the first electrode and the second electrode comprises from about 60% to about 90% iron and from about 1% to about 40% of a component comprising one or more of the materials selected from the group of SiO2, Al2O3, MgO, CaO, and TiO2.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: January 10, 2023
    Assignee: FORM ENERGY, INC.
    Inventors: Rupak Chakraborty, Jarrod David Milshtein, Eric Weber, William Henry Woodford, Yet-Ming Chiang, Ian Salmon McKay, Liang Su, Jay Whitacre, Theodore Alan Wiley, Kristen Carlisle, Mitchell Terrance Westwood, Rachel Elizabeth Mumma, Max Rae Chu, Amelie Nina Kharey, Benjamin Thomas Hultman, Marco Ferrara, Mateo Cristian Jaramillo, Isabella Caruso, Jocelyn Newhouse
  • Publication number: 20220407078
    Abstract: The invention comprises an anode-free lithium metal cell having an anode-side current collector composed of lithium, a lithium alloy or lithium-containing compound or a transition metal having a lithium or lithium alloy or lithium-containing compound surface coating, to provide a specific energy of the cell of 350 Wh/kg or greater.
    Type: Application
    Filed: August 19, 2020
    Publication date: December 22, 2022
    Inventors: Venkatasubramanian VISWANATHAN, Vikram PANDE, Yet-Ming CHIANG
  • Patent number: 11527829
    Abstract: A dual-polarized antenna structure is provided. The dual-polarized antenna structure includes an insulating substrate, two first antennas, two second antennas, a coupling unit, and two feeding points. The two first antennas are disposed on two sides of the insulating substrate, respectively. The two second antennas are disposed on the two sides of the insulating substrate, respectively. Each of the two second antennas includes two sub-antennas. In any one of the two sides of the insulating substrate, a region defined by orthogonally projecting two sub-middle segments of the two sub-antennas onto another one of the two sides of the insulating substrate overlaps with a main middle segment of the first antenna. The coupling unit is electrically coupled to the two sub-antennas on each of the two sides of the insulating substrate. The two feeding points are electrically coupled to the two first antennas and the two second antennas.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: December 13, 2022
    Assignee: AUDEN TECHNO CORP.
    Inventor: Chi-Ming Chiang
  • Publication number: 20220373688
    Abstract: The present disclosure is directed to imaging LiDARs with optical antennas fed by optical waveguides. The optical antennas can be activated through an optical switch network that connects the optical antennas to a laser source to a receiver. A microlens array is positioned between a lens of the LiDAR system and the optical antennas, the microlens array being positioned so as to transform an emission angle from a corresponding optical antenna to match a chief ray angle of the lens. Methods of use and fabrication are also provided.
    Type: Application
    Filed: May 19, 2022
    Publication date: November 24, 2022
    Inventors: Tae Joon SEOK, Xiaosheng ZHANG, Kyungmok KWON, Ming Chiang A. WU
  • Publication number: 20220376398
    Abstract: A dual-polarized antenna structure is provided. The dual-polarized antenna structure includes an insulating substrate, two first antennas, two second antennas, a coupling unit, and two feeding points. The two first antennas are disposed on two sides of the insulating substrate, respectively. The two second antennas are disposed on the two sides of the insulating substrate, respectively. Each of the two second antennas includes two sub-antennas. In any one of the two sides of the insulating substrate, a region defined by orthogonally projecting two sub-middle segments of the two sub-antennas onto another one of the two sides of the insulating substrate overlaps with a main middle segment of the first antenna. The coupling unit is electrically coupled to the two sub-antennas on each of the two sides of the insulating substrate. The two feeding points are electrically coupled to the two first antennas and the two second antennas.
    Type: Application
    Filed: September 9, 2021
    Publication date: November 24, 2022
    Inventor: CHI-MING CHIANG
  • Patent number: 11509047
    Abstract: A series-connected antenna structure is provided. The series-connected antenna structure includes an insulating substrate, a first connecting line, two first antennas, a second connecting line, two second antennas, and a load point. Two sub-antennas of one of the two first antennas are electrically coupled to a main section of the first connecting line, and two sub-antennas of another one of the two first antennas are respectively and electrically coupled to two subordinate sections of the first connecting line. Two sub-antennas of one of the two second antennas are electrically coupled to a main section of the second connecting line, and two sub-antennas of another one of the two second antennas are respectively and electrically coupled to two subordinate sections of the second connecting line. Each of the two second antennas and each of the two first antennas face opposite directions.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: November 22, 2022
    Assignee: AUDEN TECHNO CORP.
    Inventor: Chi-Ming Chiang
  • Patent number: 11502093
    Abstract: A memory structure and its manufacturing method are provided. The memory structure includes a substrate, a tunnel dielectric layer on the substrate and a floating gate on the tunnel dielectric layer. The substrate has a source region and a drain region, and the source region and the drain region are formed on two opposite sides of the floating gate. The memory structure also includes an inter-gate dielectric layer on the floating gate and a control gate on the inter-gate dielectric layer. The memory structure further includes a doping region buried in the floating gate, wherein a sidewall of the doping region is exposed at a sidewall of the floating gate. Also, the doping region and the inter-gate dielectric layer are separated from each other.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: November 15, 2022
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Chang-Ming Chiang, Hsuan-Jung Huang, Che-Jui Hsu, Liann-Chern Liou
  • Patent number: 11502397
    Abstract: A series-connected antenna structure is provided. The series-connected antenna structure includes an insulating substrate, a first connecting line, two first antennas, a second connecting line, two second antennas, and a load point. The first connecting line and the two first antennas are disposed on one of two surfaces of the insulating substrate, and the second connecting line and the two second antennas are disposed on another one of the two surfaces of the insulating substrate. Each of the two first antennas and each of the two second antennas have a same symmetrical shape. A region defined by orthogonally projecting any one of the two second antennas toward the first surface and one of the two first antennas that corresponds in position to the any one of the two second antennas jointly have a two-fold rotational symmetry relative to a corresponding one of the reference positions.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: November 15, 2022
    Assignee: AUDEN TECHNO CORP.
    Inventor: Chi-Ming Chiang
  • Publication number: 20220356761
    Abstract: An integrated-optics MEMS-actuated beam-steering system is disclosed, wherein the beam-steering system includes a lens and a programmable vertical coupler array having a switching network and an array of vertical couplers, where the switching network can energize of the vertical couplers such that it efficiently emits the light into free-space. The lens collimates the light received from the energized vertical coupler and directs the output beam along a propagation direction determined by the position of the energized vertical coupler within the vertical-coupler array. In some embodiments, the vertical coupler is configured to correct an aberration of the lens. In some embodiments, more than one vertical coupler can be energized to enable steering of multiple output beams. In some embodiments, the switching network is non-blocking.
    Type: Application
    Filed: July 14, 2022
    Publication date: November 10, 2022
    Inventors: Xiaosheng ZHANG, Ming Chiang A WU, Andrew S MICHAELS, Johannes HENRIKSSON