Patents by Inventor An-Ni HUANG
An-Ni HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12021132Abstract: A device includes a substrate, channel layers over the substrate, a gate dielectric layer around the channel layers, a first work function metal layer around the gate dielectric layer, a second work function metal layer over the first work function metal layer, and a passivation layer between the first work function metal layer and the second work function metal layer. The passivation layer merges in space vertically between adjacent ones of the channel layers.Type: GrantFiled: July 6, 2022Date of Patent: June 25, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Mao-Lin Huang, Lung-Kun Chu, Chung-Wei Hsu, Jia-Ni Yu, Kuo-Cheng Chiang, Chih-Hao Wang
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Patent number: 12010456Abstract: A frame interpolation method for generating a third image frame interpolated between a first image frame and a second image frame includes: performing motion estimation upon a first input image frame and a second input image frame, to obtain a single-directional motion, wherein the first input image frame is derived from the first image frame, and the second input image frame is derived from the second image frame; scaling the single-directional motion according to a time point of the third image frame, to generate a scaled motion; deriving a forward-warped result from a result of performing a forward warping operation and a first inverse operation upon the scaled motion; performing a second inverse operation upon the forward-warped result, to generate an inversed result; and generating the third image frame according to the first image frame, the second image frame, the forward-warped result, and the inversed result.Type: GrantFiled: March 29, 2023Date of Patent: June 11, 2024Assignee: MEDIATEK INC.Inventors: Yao-Sheng Wang, Pei-Kuei Tsung, Chia-Ni Lu, Yu-Sheng Lin, Chien-Yu Huang, Chih-Wen Goo, Cheng-Lung Jen
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Patent number: 11996334Abstract: A method includes providing a first channel layer and a second channel layer over a substrate; forming a first patterned hard mask covering the first channel layer and exposing the second channel layer; selectively depositing a cladding layer on the second channel layer and not on the first patterned hard mask; performing a first thermal drive-in process; removing the first patterned hard mask; after removing the first patterned hard mask, forming an interfacial dielectric layer on the cladding layer and the first channel layer; and forming a high-k dielectric layer on the interfacial dielectric layer.Type: GrantFiled: December 20, 2022Date of Patent: May 28, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chung-Wei Hsu, Kuo-Cheng Chiang, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu, Kuan-Lun Cheng, Chih-Hao Wang
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Patent number: 11990927Abstract: Disclosed in the present application are a method for improving performance of a low-intermediate frequency receiver, a storage medium, and a receiver. The method comprises: selecting a local oscillator signal from a preset local oscillator frequency set as an initial local oscillator signal to perform frequency mixing processing on an input signal, so as to obtain a low-intermediate frequency signal comprising a low-intermediate frequency useful signal and a low-intermediate frequency interference signal; determining whether an energy ratio of the low-intermediate frequency interference signal to the low-intermediate frequency useful signal is greater than a first preset ratio; and if the energy ratio is greater than the first preset ratio, selecting another local oscillator frequency from the preset local oscillator frequency set as the current local oscillator signal to process the input signal.Type: GrantFiled: March 3, 2020Date of Patent: May 21, 2024Assignee: HYTERA COMMUNICATIONS CORPORATION LIMITEDInventors: Ni Huang, Dawu He, Cunhao Gao, Guangbin Huang, Yongdong Wang
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Patent number: 11983640Abstract: Techniques for generating a natural language question template for an artificial intelligence question and answer (QA) system are disclosed. A graph database query relating to a QA system is parsed using a predefined schema. The parsing includes extracting a first plurality of values from the graph database query relating to a where clause in the graph database query, extracting a second plurality of values from the graph database query relating to a return clause in the graph database query, identifying a QA template rule relating to the graph database query, based on a match clause in the graph database query. A natural language question template is generated based on the first plurality of values, the second plurality of values, and the identified QA template rule. The natural language question template is suitable for use by the QA system as part of generating a response to a natural language question.Type: GrantFiled: December 30, 2019Date of Patent: May 14, 2024Assignee: International Business Machines CorporationInventors: Zi Ming Huang, Jian Wang, Jing Li, Jian Min Jiang, Ke Wang, Xin Ni
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Publication number: 20240145470Abstract: A method for processing an integrated circuit includes forming first and second gate all around transistors. The method forms a dipole oxide in the first gate all around transistor without forming the dipole oxide in the second gate all around transistor. This is accomplished by entirely removing an interfacial dielectric layer and a dipole-inducing layer from semiconductor nanosheets of the second gate all around transistor before redepositing the interfacial dielectric layer on the semiconductor nanosheets of the second gate all around transistor.Type: ApplicationFiled: January 5, 2024Publication date: May 2, 2024Inventors: Lung-Kun CHU, Mao-Lin HUANG, Chung-Wei HSU, Jia-Ni YU, Kuo-Cheng CHIANG, Kuan-Lun CHENG, Chih-Hao WANG
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Patent number: 11961840Abstract: A semiconductor device structure is provided. The device includes one or more first semiconductor layers, each first semiconductor layer of the one or more first semiconductor layers is surrounded by a first intermixed layer, wherein the first intermixed layer comprises a first material and a second material.Type: GrantFiled: August 9, 2022Date of Patent: April 16, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Mao-Lin Huang, Lung-Kun Chu, Chung-Wei Hsu, Jia-Ni Yu, Kuo-Cheng Chiang, Kuan-Lun Cheng, Chih-Hao Wang
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Publication number: 20240120402Abstract: A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a first dielectric feature extending along a first direction, the first dielectric feature comprising a first dielectric layer having a first sidewall and a second sidewall opposing the first sidewall, a first semiconductor layer disposed adjacent the first sidewall, the first semiconductor layer extending along a second direction perpendicular to the first direction, a second dielectric feature extending along the first direction, the second dielectric feature disposed adjacent the first semiconductor layer, and a first gate electrode layer surrounding at least three surfaces of the first semiconductor layer, and a portion of the first gate electrode layer is exposed to a first air gap.Type: ApplicationFiled: November 19, 2023Publication date: April 11, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jia-Ni YU, Kuo-Cheng CHIANG, Mao-Lin HUANG, Lung-Kun CHU, Chung-Wei HSU, Chun-Fu LU, Chih-Hao WANG, Kuan-Lun CHENG
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Publication number: 20240113195Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a plurality of first nanostructures formed over a substrate, and a dielectric wall adjacent to the first nanostructures. The semiconductor structure also includes a first liner layer between the first nanostructures and the dielectric wall, and the first liner layer is in direct contact with the dielectric wall. The semiconductor structure also includes a gate structure surrounding the first nanostructures, and the first liner layer is in direct contact with a portion of the gate structure.Type: ApplicationFiled: February 22, 2023Publication date: April 4, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jia-Ni YU, Lung-Kun CHU, Chun-Fu LU, Chung-Wei HSU, Mao-Lin HUANG, Kuo-Cheng CHIANG, Chih-Hao WANG
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Patent number: 11948987Abstract: A semiconductor device according to the present disclosure includes a source feature and a drain feature, a plurality of semiconductor nanostructures extending between the source feature and the drain feature, a gate structure wrapping around each of the plurality of semiconductor nanostructures, a bottom dielectric layer over the gate structure and the drain feature, a backside power rail disposed over the bottom dielectric layer, and a backside source contact disposed between the source feature and the backside power rail. The backside source contact extends through the bottom dielectric layer.Type: GrantFiled: September 9, 2020Date of Patent: April 2, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Lung-Kun Chu, Mao-Lin Huang, Chung-Wei Hsu, Jia-Ni Yu, Kuo-Cheng Chiang, Kuan-Lun Cheng, Chih-Hao Wang
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Publication number: 20240096880Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip includes a first channel structure configured to transport charge carriers within a first transistor device and a first gate electrode layer wrapping around the first channel structure. A second channel structure is configured to transport charge carriers within a second transistor device. A second gate electrode layer wraps around the second channel structure. The second gate electrode layer continuously extends from around the second channel structure to cover the first gate electrode layer. A third channel structure is configured to transport charge carriers within a third transistor device. A third gate electrode layer wraps around the third channel structure. The third gate electrode layer continuously extends from around the third channel structure to cover the second gate electrode layer.Type: ApplicationFiled: November 16, 2023Publication date: March 21, 2024Inventors: Mao-Lin Huang, Chih-Hao Wang, Kuo-Cheng Chiang, Jia-Ni Yu, Lung-Kun Chu, Chung-Wei Hsu
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Publication number: 20240096994Abstract: A method for forming a semiconductor device is provided. The method includes forming a plurality of first channel nanostructures and a plurality of second channel nanostructures in an n-type device region and a p-type device region of a substrate, respectively, and sequentially depositing a gate dielectric layer, an n-type work function metal layer, and a cap layer surrounding each of the first and second channel nanostructures. The cap layer merges in first spaces between adjacent first channel nanostructures and merges in second spaces between adjacent second channel nanostructures. The method further includes selectively removing the cap layer and the n-type work function metal layer in the p-type device region, and depositing a p-type work function metal layer over the cap layer in the n-type device region and the gate dielectric layer in the p-type device region. The p-type work function metal layer merges in the second spaces.Type: ApplicationFiled: February 10, 2023Publication date: March 21, 2024Inventors: Lung-Kun CHU, Jia-Ni YU, Chun-Fu LU, Mao-Lin HUANG, Kuo-Cheng CHIANG, Chih-Hao WANG
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Publication number: 20230118085Abstract: Provided are a voice communication method and system under a broadband and narrow-band intercommunication environment. The method comprises: when a broadband terminal calls a narrow-band terminal, the broadband terminal executing a reducing operation on an energy amplitude of voice data to obtain a reduced voice data packet, and sending the reduced voice data packet to the narrow-band terminal such that the narrow-band terminal plays the reduced voice data packet; and when the narrow-band terminal calls the broadband terminal, the broadband terminal receiving a voice data packet, and executing an amplification operation on an energy amplitude of the voice data packet to obtain an enlarged voice data packet, and the broadband terminal playing the enlarged voice data packet. The present application can solve the problem of voice size inconsistency between a broadband terminal and a narrow-band terminal, thereby enhancing the usage experience for a user.Type: ApplicationFiled: May 3, 2022Publication date: April 20, 2023Inventors: Dejun DENG, Heshan YANG, Ni HUANG
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Patent number: 11619650Abstract: The present invention discloses a method of preparing a specimen for scanning capacitance microscopy, comprising the steps of: providing a sample including at least one object to be analyzed; manually grinding the sample from an edge of the sample toward a target region containing the object to be analyzed gradually, and stopping at a distance of dl from a longitudinal section of the at least one object to be analyzed in the target region to form a grinding stopping surface; cutting the grinding stopping surface by a plasma focused ion beam equipped with a scanning electron microscopy toward the target region and stopping at a distance of d2 from the longitudinal section to form a cutting stopping surface, wherein 0<d2<d1; and manually grinding to polish the cutting stopping surface and gradually remove the part of the sample between the longitudinal section and the cutting stopping surface to expose the longitudinal section of the at least one object to be analyzed, and complete the preparation of a spType: GrantFiled: March 22, 2022Date of Patent: April 4, 2023Assignee: MSSCORPS CO., LTD.Inventors: Chi-Lun Liu, Hui-Ni Huang, Chia-Ling Chen, Shihhsin Chang
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Publication number: 20230098264Abstract: The present invention discloses a method of preparing a specimen for scanning capacitance microscopy, comprising the steps of: providing a sample including at least one object to be analyzed; manually grinding the sample from an edge of the sample toward a target region containing the object to be analyzed gradually, and stopping at a distance of dl from a longitudinal section of the at least one object to be analyzed in the target region to form a grinding stopping surface; cutting the grinding stopping surface by a plasma focused ion beam equipped with a scanning electron microscopy toward the target region and stopping at a distance of d2 from the longitudinal section to form a cutting stopping surface, wherein 0<d2<d1; and manually grinding to polish the cutting stopping surface and gradually remove the part of the sample between the longitudinal section and the cutting stopping surface to expose the longitudinal section of the at least one object to be analyzed, and complete the preparation of a spType: ApplicationFiled: March 22, 2022Publication date: March 30, 2023Applicant: MSSCORPS CO., LTD.Inventors: CHI-LUN LIU, HUI-NI HUANG, CHIA-LING CHEN, SHIHHSIN CHANG
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Publication number: 20220224363Abstract: Disclosed in the present application are a method for improving performance of a low-intermediate frequency receiver, a storage medium, and a receiver. The method comprises: selecting a local oscillator signal from a preset local oscillator frequency set as an initial local oscillator signal to perform frequency mixing processing on an input signal, so as to obtain a low-intermediate frequency signal comprising a low-intermediate frequency useful signal and a low-intermediate frequency interference signal; determining whether an energy ratio of the low-intermediate frequency interference signal to the low-intermediate frequency useful signal is greater than a first preset ratio; and if the energy ratio is greater than the first preset ratio, selecting another local oscillator frequency from the preset local oscillator frequency set as the current local oscillator signal to process the input signal.Type: ApplicationFiled: March 3, 2020Publication date: July 14, 2022Inventors: Ni HUANG, Dawu HE, Cunhao GAO, Guangbin HUANG, Yongdong WANG
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Publication number: 20220153687Abstract: The compounds represented by Formula (I), which are peripheral alkyl and alkenyl chains extended benzene derivatives, are useful as dual autotaxin (ATX)/histone deacetylase (HD AC) inhibitors. These compounds may be included in a pharmaceutical composition along with a pharmaceutically acceptable carrier, and be used in a therapeutically effective amount for prophylaxis or treatment of various diseases and disorders.Type: ApplicationFiled: March 27, 2020Publication date: May 19, 2022Applicant: TAIWANJ PHARMACEUTICALS CO., LTD.Inventors: Syaulan S. YANG, Yan-feng JIANG, Meng-hsien LIU, Chia-hao CHANG, Hao Shiuan LIU, Ying-chu SHIH, Sheng Hung LIU, Chiung Wen WANG, Ting-ni HUANG
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Patent number: 10760788Abstract: A method of combusting a sulfur-containing carbonaceous material with ash treatment includes: feeding a feed containing the sulfur-containing carbonaceous material and limestone into a furnace; combusting the feed in the furnace so as to generate preliminary fly and bottom ashes; hydrating the preliminary fly and bottom ashes to form a hydrated material; recycling the hydrated materials into the furnace so as to generate secondary fly and bottom ashes; and reacting the secondary fly and bottom ashes with a sulfuric acid solution.Type: GrantFiled: January 8, 2016Date of Patent: September 1, 2020Assignee: CHANG GUNG UNIVERSITYInventors: Hsiu-Po Kuo, An-Ni Huang
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Patent number: 10070219Abstract: An acoustic feedback detection method and device. According to the method, whether acoustic feedback occurs is determined based on a frequency characteristic of an acoustic feedback signal. Specifically, a judgment value is determined using a power peak value and an average peak value, and it is determined whether acoustic feedback occurs in a signal based on a magnitude of the judgment value and a duration of the power peak value. In this case, whether acoustic feedback occurs can be determined based on the frequency characteristic of the signal.Type: GrantFiled: December 24, 2014Date of Patent: September 4, 2018Assignee: Hytera Communications Corporation LimitedInventor: Ni Huang
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Publication number: 20170353792Abstract: An acoustic feedback detection method and device. According to the method, whether acoustic feedback occurs is determined based on a frequency characteristic of an acoustic feedback signal. Specifically, a judgment value is determined using a power peak value and an average peak value, and it is determined whether acoustic feedback occurs in a signal based on a magnitude of the judgment value and a duration of the power peak value. In this case, whether acoustic feedback occurs can be determined based on the frequency characteristic of the signal.Type: ApplicationFiled: December 24, 2014Publication date: December 7, 2017Applicant: Hytera Communications Corp., Ltd.Inventor: Ni Huang