Patents by Inventor An-Ping Lee

An-Ping Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240141909
    Abstract: A fan frame includes a central base, a frame wall, and a plurality of static blades radially extending from the central base to the frame wall, each static blade is connected to the central base at a first end and connected to the frame wall at a second end, the central base is provided with a first wire groove, the frame wall is provided with a second wire groove, the first wire groove and the second wire groove are configured for accommodating wires, and the second wire groove has a shape same as the second end of the static blade connected to the frame wall for gathering the wires to shape similar to the static blade. A fan assembly including the fan frame is also disclosed.
    Type: Application
    Filed: February 1, 2023
    Publication date: May 2, 2024
    Inventors: XIAO-GUANG MA, YUNG-PING LIN, YONG-KANG ZHANG, PENG-FEI MAI, KUN-CHE LEE, YANG-YANG ZHU
  • Publication number: 20240139337
    Abstract: The present disclosure relates to a method for treating a cancer and/or cancer metastasis in a subject comprising administering to the subject irinotecan loaded in a mesoporous silica nanoparticle. The present disclosure also provides a conjugate comprising an agent loaded in a mesoporous silica nanoparticle (MSN) defining at least one pore and having at least one functional group on a sidewall of the at least one pore.
    Type: Application
    Filed: November 2, 2022
    Publication date: May 2, 2024
    Inventors: Cheng-Hsun WU, SI-HAN WU, YI-PING CHEN, RONG-LIN ZHANG, CHUNG-YUAN MOU, Yu-Tse LEE
  • Patent number: 11973040
    Abstract: A method is provided for forming an integrated circuit (IC) chip package structure. The method includes providing a substrate for an interposer, and forming a conductive interconnect structure in and on the substrate for connecting a group of selected IC dies. The method includes forming warpage-reducing trenches in non-routing regions of the interposer, wherein the warpage-reducing trenches are sized and positioned based on a warpage characteristic to reduce the warpage of the chip package structure. The method also includes depositing a warpage-relief material in the warpage-reducing trenches according to the warpage characteristic to reduce the warpage of the chip package structure, and bonding the group of selected IC dies to the interposer to form a chip package structure.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Yang Hsieh, Chien-Chang Lee, Chia-Ping Lai, Wen-Chung Lu, Cheng-Kang Huang, Mei-Shih Kuo, Alice Huang
  • Patent number: 11957064
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.
    Type: Grant
    Filed: October 18, 2022
    Date of Patent: April 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Patent number: 11955495
    Abstract: The present disclosure provides an image sensing module including a main board and an image sensor. The main board has a first surface and a second surface opposite to each other. The image sensor is disposed on the first surface of the main board and includes a plurality of isolation structures and a photoelectric conversion element between the plurality of isolation structures. A first angle is provided between a light incident surface of the photoelectric conversion element and the first surface of the main board, and a second angle is provided between a light beam incident to the light incident surface of the photoelectric conversion element and a normal vector of the light incident surface. The second angle is about equal to the Brewster angle at the interface of the light beam incident to the light incident surface.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: April 9, 2024
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shih-Ping Lee, Wen-Hsien Chen
  • Patent number: 11955385
    Abstract: A semiconductor device includes a first stack structure, a second stack structure, and a third stack structure. Each of the stack structure includes semiconductor layers vertically spaced from one another. The first, second, and third stack structures all extend along a first lateral direction. The second stack structure is disposed between the first and third stack structures. The semiconductor device includes a first gate structure that extends along a second lateral direction and wraps around each of the semiconductor layers. The semiconductor layers of the first stack structure are coupled with respective source/drain structures. The semiconductor layers of the second stack structure are coupled with respective source/drain structures. The semiconductor layers of the third stack structure are coupled with a dielectric passivation layer.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Chih-Han Lin, Chen-Ping Chen, Hsiao Wen Lee
  • Publication number: 20240108844
    Abstract: A humidification system can include a heater base, a humidification chamber, and a breathing circuit. A cartridge can be removably coupled to the heater base. The cartridge can include various sensors, probes, sensor wire connectors, heater wire connectors, and/or other features. The cartridge can include features configured to mate with corresponding features on the humidification chamber and the heater base. The cartridge includes a memory, such as an EEPROM, or other suitable storage device. When the cartridge is installed on the heater base, the memory is electrically connected to a processor and/or memory of the heater base. Various models of cartridges can be produced for use with different humidification chambers, breathing circuits, and/or therapies. A connector can be configured to couple an inspiratory conduit to an outlet port of the humidification chamber. The connector can provide a pneumatic connection to the outlet port and an electrical connection to the cartridge.
    Type: Application
    Filed: September 20, 2023
    Publication date: April 4, 2024
    Inventors: Hamish Adrian OSBORNE, Gavin Walsh Millar, Stephen David Evans, Bruce Gordon Holyoake, James William Stanton, David Leon McCauley, Gareth Thomas McDermott, Nicholas James Michael McKenna, Myfanwy Jane Antica Norton, Adrian John Elsworth, Michael John Andresen, Jonathan Andrew George Lambert, Sandeep Singh Gurm, Tessa Hazel Paris, Joseph Nathaniel Griffiths, Ping Si, Christopher Gareth Sims, Elmo Benson Stoks, Dexter Chi Lun Cheung, Peter Alan Seekup, Po-Yen Liu, Richard Edward Lang, Paul James Tonkin, Ian Lee Wai Kwan
  • Publication number: 20240113041
    Abstract: A physical unclonable function (PUF) generator structure including a substrate and a PUF generator is provided. The PUF generator includes a first electrode layer, a second electrode layer, a first dielectric layer, a first contact, a second contact, and a third contact. The first electrode layer is disposed on the substrate. The second electrode layer is disposed on the first electrode layer. The first dielectric layer is disposed between the first electrode layer and the second electrode layer. The first contact and the second contact are electrically connected to the first electrode layer and are separated from each other. The third contact is electrically connected to the second electrode layer.
    Type: Application
    Filed: November 2, 2022
    Publication date: April 4, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Bo-An Tsai, Shyng-Yeuan Che, Shih-Ping Lee
  • Publication number: 20240105749
    Abstract: An image sensor structure including a substrate, a pixel structure, and a deep trench isolation (DTI) structure is provided. The substrate includes a first side and a second side opposite to each other. The pixel structure includes a transfer transistor, a light sensing device, and a floating diffusion region. The transfer transistor includes a first gate. The first gate is disposed on the first side of the substrate. The light sensing device is disposed in the substrate and is located on one side of the first gate. The floating diffusion region is disposed in the substrate and is located on another side of the first gate. The DTI structure extends into the substrate from the second side of the substrate. The top-view pattern of the floating diffusion region does not overlap the top-view pattern of the DTI structure.
    Type: Application
    Filed: October 26, 2022
    Publication date: March 28, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shih-Ping Lee, Chih-Ping Chung, Jhih Fan Tu
  • Publication number: 20240101602
    Abstract: Provided is a peptide and method in preventing or treating infections caused by a wide spectrum of pathogens, including bacteria and fungus in hosts such as plants and animals. Methods of preventing or treating plant diseases and infection in animals are also provided.
    Type: Application
    Filed: November 24, 2021
    Publication date: March 28, 2024
    Inventors: Rita P.Y. Chen, Chiu-Ping CHENG, Chien-Chih YANG, Kung-Ta LEE, Ying-Lien CHEN, Li-Hang Hsu, Hsin-Liang CHEN, Sung CHEN
  • Publication number: 20240096450
    Abstract: Systems and methods for analyzing genomic information can include obtaining a sequence read including genetic information; identifying, within a graph representing a reference genome, a plurality of candidate mapping positions that relate to the genetic information, the graph comprising nodes representing genetic sequences and edges connecting pairs of nodes; determining, by means of a computer system, whether an alignment with the graph surrounding each of the plurality of candidate mapping positions is advanced or basic; and performing for each candidate mapping position, by means of the computer system, a local alignment based on whether the local alignment is advanced or basic. The advanced local alignment can include a first-local-alignment algorithm, and the basic local alignment includes a second-local-alignment algorithm. Based on the local alignments, the mapped position of the sequence read can be identified within the genome.
    Type: Application
    Filed: September 11, 2023
    Publication date: March 21, 2024
    Applicant: Seven Bridges Genomics Inc.
    Inventors: Kaushik Ghose, Wan-Ping Lee
  • Patent number: 11936238
    Abstract: An uninterruptible power apparatus is coupled between a power grid and a load. The uninterruptible power apparatus includes a bypass path, a power conversion module, and a control module. The bypass path is coupled to the power grid through a grid terminal, and coupled to the load through a load terminal. The control module turns off a first thyristor and a second thyristor by injecting a second voltage into the load terminal during a forced commutation period. The control module calculates a magnetic flux offset amount based on an error amount between the second voltage and a voltage command, and provides a compensation command in response to the magnetic flux offset amount. The control module controls the DC/AC conversion circuit to provide a third voltage to the load terminal based on the compensation command and the voltage command.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: March 19, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Hsin-Chih Chen, Hung-Chieh Lin, Chao-Lung Kuo, Yi-Ping Hsieh, Chien-Shien Lee
  • Publication number: 20240086213
    Abstract: Methods and systems for emulating a hardware accelerator is provided. When executed by a computer, the platform includes a plurality of computational resources provided by the computer; a hardware emulator operated on a first computational resource of the plurality of computational resources; and an accelerator being emulated in the platform and operated on a second computational resource of the plurality of computational resources, the accelerator being configured to execute an offloading operation.
    Type: Application
    Filed: October 11, 2023
    Publication date: March 14, 2024
    Inventors: Hui Zhang, Fei Liu, Ping Zhou, Chul Lee, Bo Li, Shan Xiao
  • Publication number: 20240085781
    Abstract: In a method of cleaning a photo mask, the photo mask is placed on a support such that a pattered surface faces down, and an adhesive sheet is applied to edges of a backside surface of the photo mask.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Chang LEE, Pei-Cheng HSU, Hao-Ping CHENG, Ta-Cheng LIEN
  • Publication number: 20240090076
    Abstract: Methods, systems, and devices for wireless communications are described. A network entity may account for jitter in communications with a user equipment (UE) by adjusting connected mode discontinuous reception (CDRX) configuration parameters for the UE based on estimated downlink traffic arrival times. For a downlink traffic burst, the network entity may estimate a traffic arrival offset based on determining a traffic periodicity, an estimated arrival time associated with one or more packets of a traffic burst, and at least one jitter parameter. The jitter parameter may represent an uncertainty in the arrival time of the traffic burst. The network entity may select a CDRX offset value based on the estimated traffic arrival offset. The network entity may transmit (e.g., to a UE, such as an extended reality (XR) device) a message indicating the CDRX offset value, for example, as part of a CDRX configuration.
    Type: Application
    Filed: September 12, 2022
    Publication date: March 14, 2024
    Inventors: Prashanth Haridas Hande, Marcelo Schiocchet, Chih-Ping Li, Hyun Yong Lee, Yuchul Kim, Mickael Mondet, Vinay Melkote Krishnaprasad
  • Publication number: 20240085753
    Abstract: An electrochromic composition including: a first oxidizable compound; a reducible compound; an electrolyte; and a solvent, wherein the first oxidizable compound is represented by the following formula: wherein X1, and X2 are independently substituted or unsubstituted aliphatic hydrocarbon groups, or substituted or unsubstituted aromatic hydrocarbon groups, wherein the aromatic hydrocarbon groups include: wherein each Rx is independently hydrogen, a C1-C16 alkyl group, a C1-C16 alkoxy group, a C1-C16 haloalkyl group, or halogen.
    Type: Application
    Filed: February 24, 2023
    Publication date: March 14, 2024
    Inventors: Hao-Ping HUANG, Tsung-Hsien LIN, Yu-Nan LEE
  • Patent number: 11929273
    Abstract: A system and computer-implemented method are provided for manufacturing a semiconductor electronic device. An assembler receives a jig and a boat supporting a die. The assembler includes a separator that separates the jig into a first jig portion and a second jig portion and a loader that positions the boat between the first jig portion and the second jig portion. A robot receives an assembly prepared by the assembler and manipulates a locking system that fixes an alignment of the boat relative to the first jig portion and the second jig portion to form a locked assembly. A process chamber receives the locked assembly and subjects the locked assembly to a fabrication operation.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Tsung-Sheng Kuo, Chih-Hung Huang, Guan-Wei Huang, Ping-Yung Yen, Hsuan Lee, Jiun-Rong Pai
  • Publication number: 20240081157
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.
    Type: Application
    Filed: November 6, 2023
    Publication date: March 7, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Patent number: 11923440
    Abstract: A method of fabricating a semiconductor device is disclosed. The method includes forming semiconductor fins on a substrate. A first dummy gate is formed over the semiconductor fins. A recess is formed in the first dummy gate, and the recess is disposed between the semiconductor fins. A dummy fin material is formed in the recess. A portion of the dummy fin material is removed to expose an upper surface of the first dummy gate and to form a dummy fin. A second dummy gate is formed on the exposed upper surface of the first dummy gate.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Chen-Ping Chen, Kuei-Yu Kao, Hsiao Wen Lee, Chih-Han Lin
  • Publication number: 20240066313
    Abstract: An electronic device includes a light emitting layer, a light conversion layer and an adjustable structure. The light emitting layer has a plurality of light emitting units for emitting light. The light conversion layer converts the wavelength of the light emitted by at least one light emitting unit to provide converted light. The adjustable structure is controlled to adjust a light penetrating area to correspond to the affected part to be treated, wherein at least one of the light and the converted light passes through the light penetrating area to irradiate the affected part.
    Type: Application
    Filed: July 28, 2023
    Publication date: February 29, 2024
    Inventors: Jih-Ping LIN, Chun-Kai LEE, Fang-Iy WU, Cheng-Hsu CHOU