Patents by Inventor An SHEN

An SHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220257514
    Abstract: The present invention relates to a monosaccharide-tagged nano-liposome, which is characterized that the targeting monosaccharide is conjugated to cholesterol and the monosaccharide-conjugated cholesterol is incorporate into the phospholipid bilayer. The nano-liposome of present invention exhibits the ability to carry the loaded drug to target cells, such as cancer cells and cancer stem cells in a tumor tissue, and may be internalized by endocytosis to produce direct cytotoxicity or suppress stemness gene expression, so as to avoid toxicity to normal cells and effectively improve the therapeutic effect of cancer clinical medication and radiation therapy.
    Type: Application
    Filed: May 23, 2019
    Publication date: August 18, 2022
    Inventors: Chun-Liang LO, Lu-Yi YU, Yao-An SHEN, Shang-Yu HUNG
  • Patent number: 11417832
    Abstract: The present disclosure provides a semiconductor structure, including a substrate, including a first region and a second region adjacent to the first region, a magnetic tunnel junction (MTJ) over the first region, a spacer on a sidewall of the MTJ, a hard mask over the MTJ, a first dielectric layer laterally surrounding the spacer and the hard mask, a top electrode over the hard mask, and an etch stop stack laterally surrounding the top electrode.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: August 16, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Feng Yin, Tai-Yen Peng, An-Shen Chang, Han-Ting Tsai, Qiang Fu, Chung-Te Lin
  • Patent number: 11387406
    Abstract: In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: July 12, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tai-Yen Peng, Hui-Hsien Wei, Han-Ting Lin, Sin-Yi Yang, Yu-Shu Chen, An-Shen Chang, Qiang Fu, Chen-Jung Wang
  • Publication number: 20220069201
    Abstract: The present disclosure provides a semiconductor structure, including a substrate, including a first region and a second region adjacent to the first region, a magnetic tunnel junction (MTJ) over the first region, a spacer on a sidewall of the MTJ, a hard mask over the MTJ, a first dielectric layer laterally surrounding the spacer and the hard mask, a top electrode over the hard mask, and an etch stop stack laterally surrounding the top electrode.
    Type: Application
    Filed: August 31, 2020
    Publication date: March 3, 2022
    Inventors: YU-FENG YIN, TAI-YEN PENG, AN-SHEN CHANG, HAN-TING TSAI, QIANG FU, CHUNG-TE LIN
  • Publication number: 20220029091
    Abstract: A method for forming a memory device structure is provided. The method includes providing a substrate, a first dielectric layer, a conductive via, a magnetic tunnel junction cell, a first etch stop layer, and a first spacer layer. The substrate has a first region and a second region, the first dielectric layer is over the substrate, the conductive via passes through the first dielectric layer over the first region. The method includes removing the first etch stop layer, which is not covered by the first spacer layer. The method includes removing the first dielectric layer, which is not covered by the first etch stop layer.
    Type: Application
    Filed: July 21, 2020
    Publication date: January 27, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsing-Hsiang WANG, Han-Ting LIN, Yu-Feng YIN, Sin-Yi YANG, Chen-Jung WANG, Yin-Hao WU, Kun-Yi LI, Meng-Chieh WEN, Lin-Ting LIN, Jiann-Horng LIN, An-Shen CHANG, Huan-Just LIN
  • Publication number: 20210391532
    Abstract: A memory array device includes an array of memory cells located over a substrate, a memory-level dielectric layer laterally surrounding the array of memory cells, and top-interconnection metal lines laterally extending along a horizontal direction and contacting a respective row of top electrodes within the memory cells. Top electrodes of the memory cells are planarized to provide top surfaces that are coplanar with the top surface of the memory-level dielectric layer. The top-interconnection metal lines do not extend below the horizontal plane including the top surface of the memory-level dielectric layer, and prevent electrical shorts between the top-interconnection metal lines and components of memory cells.
    Type: Application
    Filed: April 7, 2021
    Publication date: December 16, 2021
    Inventors: Yu-Feng YIN, Tai-Yen PENG, An-Shen CHANG, Han-Ting TSAI, Qiang FU, Chung-Te LIN
  • Patent number: 11194365
    Abstract: A hinge module includes the two spindles, the two brackets, a gear set and a torque part. The two spindles are spaced apart from each other. The two brackets are respectively connected to a first side of the two spindles, where an installing direction of each of the brackets is perpendicular to an axial direction of each of the spindles. The gear set is disposed at a second side opposite to the first side of the two spindles. The torque part is disposed on the two spindles and is located between the two brackets and the gear set, where each of the brackets is adapted to rotate relative to the torque part with the corresponding spindle, and the gear set is configured to drive the two spindles rotating in opposite directions.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: December 7, 2021
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Che-Hsien Lin, Che-Hsien Chu, Chun-An Shen
  • Publication number: 20210376141
    Abstract: A fin-type field-effect transistor (FinFET) device includes a plurality of fins formed over a substrate. The semiconductor device further includes a dielectric layer filled in a space between each fin and over a first portion of the plurality of fins and a dielectric trench formed in the dielectric layer. The dielectric trench has a vertical profile. The semiconductor device further includes a second portion of the plurality of fins recessed and exposed in the dielectric trench. The second portion of the plurality of fins have a rounded-convex-shape top profile.
    Type: Application
    Filed: August 16, 2021
    Publication date: December 2, 2021
    Inventors: Chia Tai Lin, Yih-Ann Lin, An-Shen Chang, Ryan Chen, Chao-Cheng Chen
  • Publication number: 20210376228
    Abstract: In an embodiment, a device includes: a magnetoresistive random access memory (MRAM) array including MRAM cells arranged in rows and columns, where a first column of the columns includes: first bottom electrodes arranged along the first column; first magnetic tunnel junction (MTJ) stacks over the first bottom electrodes; a first shared electrode over each of the first MTJ stacks; second bottom electrodes arranged along the first column; second MTJ stacks over the second bottom electrodes; a second shared electrode over each of the second MTJ stacks; and a bit line electrically connected to the first shared electrode and the second shared electrode.
    Type: Application
    Filed: May 29, 2020
    Publication date: December 2, 2021
    Inventors: Tai-Yen Peng, Yu-Feng Yin, An-Shen Chang, Han-Ting Tsai, Qiang Fu
  • Publication number: 20210376231
    Abstract: A magnetic tunnel junction (MTJ) memory cell and a metallic etch mask portion are formed over a substrate. At least one dielectric etch stop layer is deposited over the metallic etch mask portion, and a via-level dielectric layer is deposited over the at least one dielectric etch stop layer. A via cavity may be etched through the via-level dielectric layer, and a top surface of the at least one dielectric etch stop layer is physically exposed. The via cavity may be vertically extended by removing portions of the at least one dielectric etch stop layer and the metallic etch mask portion. A contact via structure is formed directly on a top surface of the top electrode in the via cavity to provide a low-resistance contact to the top electrode.
    Type: Application
    Filed: March 12, 2021
    Publication date: December 2, 2021
    Inventors: Yu-Feng YIN, Tai-Yen PENG, An-Shen CHANG, Han-Ting TSAI, Qiang FU, Chung-Te LIN
  • Patent number: 11188129
    Abstract: An expansion hinge including a torque module, two first brackets, two sliding brackets, two second brackets and two elastic modules is provided. The torque module is configured to provide torques. The two first brackets are rotatably connected to two opposite ends of the torque module. The two sliding brackets are rotatably connected to the two opposite ends of the torque module. The two second brackets are slidably disposed in the two sliding brackets respectively. Each of the two elastic modules is disposed between the respective sliding bracket and the respective second bracket. The two sliding brackets are adapted to synchronously slide with respect to the two second brackets, and each of the elastic modules is configured to push the respective sliding bracket and the respective second bracket to form a pulled-out state or a pushed-in state.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: November 30, 2021
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Che-Hsien Lin, Chun-An Shen
  • Publication number: 20210346394
    Abstract: The invention comprises the administration of a remyelinating agent to treat a demyelinating condition, such as MS. Disclosed are various remyelinating compositions which promote remyelination, oligodendrocyte differentiation, and the treatment of demyelinating conditions such as MS. In one aspect, the remyelinating compositions are selective estrogen receptor modulators with remyelinating properties. In one aspect, the remyelinating compositions are agonists of GPR56, a G-protein coupled receptor which has not previously been identified as an effector of remyelination.
    Type: Application
    Filed: July 27, 2021
    Publication date: November 11, 2021
    Applicant: The Regents of the University of California
    Inventors: Riley Bove, Jonah Chan, Ari Green, Yun-An Shen, Kelsey Rankin
  • Patent number: 11094825
    Abstract: A fin-type field-effect transistor (FinFET) device includes a plurality of fins formed over a substrate. The semiconductor device further includes a dielectric layer filled in a space between each fin and over a first portion of the plurality of fins and a dielectric trench formed in the dielectric layer. The dielectric trench has a vertical profile. The semiconductor device further includes a second portion of the plurality of fins recessed and exposed in the dielectric trench. The second portion of the plurality of fins have a rounded-convex-shape top profile.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: August 17, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia Tai Lin, Yih-Ann Lin, An-Shen Chang, Ryan Chen, Chao-Cheng Chen
  • Publication number: 20210226118
    Abstract: In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process.
    Type: Application
    Filed: January 17, 2020
    Publication date: July 22, 2021
    Inventors: Tai-Yen Peng, Hui-Hsien Wei, Han-Ting Lin, Sin-Yi Yang, Yu-Shu Chen, An-Shen Chang, Qiang Fu, Chen-Jung Wang
  • Patent number: 11035160
    Abstract: A synchronous hinge module includes a first axle, a second axle, a third axle, a fourth axle, at least one central frame, at least two connecting bases, a plurality of first baffle plates, at least two side frames, and a plurality of second baffle plates. The at least one central frame is disposed around the first axle and the second axle. The at least two connecting bases are engaged with two opposite ends of the at least one central frame respectively. The plurality of first baffle plates is respectively disposed around the first axle, the third axle and the second axle, the fourth axle. Each of the first baffle plates extends outside each of the at least two connecting bases and the at least one central frame.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: June 15, 2021
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Che-Hsien Lin, Tsai-Ta Teng, Che-Hsien Chu, Hung-Jui Lin, Chun-An Shen, Ko-Yen Lu, Po-Hsiang Hu
  • Patent number: 10884461
    Abstract: A hinge module includes a housing and at least one carrying assembly. The housing includes two accommodation spaces. The at least one carrying assembly is disposed at the housing and includes a torque element, two rotation shafts and two brackets. The torque element is disposed in one of the accommodation spaces. The two rotation shafts pass through the torque element. The two brackets are respectively connected to the two rotation shafts and located outside the housing. Each bracket is adapted to rotate along with the corresponding rotation shaft and rotate relative to the torque element.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: January 5, 2021
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Che-Hsien Lin, Che-Hsien Chu, Chun-An Shen
  • Patent number: 10876337
    Abstract: A sliding hinge including a torque module, two brackets, a support plate, a driving gear set, and a sliding bracket is provided. The torque module has a first shaft and a second shaft adapted to rotate in opposite directions and produce a torque. The brackets are respectively disposed on the first shaft and the second shaft. The support plate is disposed on one of the brackets. The driving gear set is disposed on the support plate and coupled to the first shaft. The sliding bracket is coupled to the driving gear set and slidably disposed on a top surface of the support plate. The brackets are adapted to rotate relative to the torque module by the first shaft and the second shaft, such that the brackets are overlapped or unfolded with each other while the driving gear set drives the sliding bracket to slide along the support plate.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: December 29, 2020
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Che-Hsien Lin, Ko-Yen Lu, Che-Hsien Chu, Chun-An Shen
  • Patent number: 10837209
    Abstract: A hinge module includes a first bracket, a second bracket, a pivot assembly, a pressing component and an adjusting structure. The first bracket has at least one first sliding slot. The first bracket and the second bracket are pivoted to each other by the pivot assembly, wherein the pivot assembly has a first sliding portion that is slidably disposed in the first sliding slot. The pressing component is connected to the first bracket and the first sliding portion. The adjusting structure is connected to the pressing component that presses the first sliding portion by the adjusting structure. When the first bracket and the second bracket rotate relative to each other, the first sliding portion slides along the first sliding slot, and the hinge module generates a torsional force by continuously pressing the first sliding portion by the pressing component. In addition, an electronic device including the hinge module is provided.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: November 17, 2020
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Che-Hsien Lin, Chun-An Shen, Che-Hsien Chu
  • Patent number: 10824204
    Abstract: A hinge module including a first rotating shaft, a second rotating shaft, a sliding member, a first torque member, and a second torque member is provided. The sliding member coupled to the first rotating shaft and the second rotating shaft simultaneously. The first rotating shaft and the second rotating shaft are rotated synchronously via the sliding member. The first torque member and the second torque member are connected to the first rotating shaft and the second rotating shaft, and the first torque member and the second torque member are located at opposite sides of a sliding range of the sliding member. A foldable electronic device is also provided.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: November 3, 2020
    Assignee: COMPAL ELECTRONIC, INC.
    Inventors: Che-Hsien Lin, Che-Hsien Chu, Chun-An Shen
  • Publication number: 20200279945
    Abstract: A fin-type field-effect transistor (FinFET) device includes a plurality of fins formed over a substrate. The semiconductor device further includes a dielectric layer filled in a space between each fin and over a first portion of the plurality of fins and a dielectric trench formed in the dielectric layer. The dielectric trench has a vertical profile. The semiconductor device further includes a second portion of the plurality of fins recessed and exposed in the dielectric trench. The second portion of the plurality of fins have a rounded-convex-shape top profile.
    Type: Application
    Filed: May 18, 2020
    Publication date: September 3, 2020
    Inventors: Chia Tai Lin, Yih-Ann Lin, An-Shen Chang, Ryan Chen, Chao-Cheng Chen