Abstract: A liquid crystal on silicon (LCOS) device and a LCOS display panel are disclosed. The LCOS device includes: at least two first pixel electrodes each having a substantially rectangular cross-section, the first pixel electrodes each having four cutaway corners and arranged on the substrate along the first diagonal direction; a first insulating layer filled between sidewalls of adjacent first pixel electrodes and covering the first pixel electrodes; at least two second pixel electrodes each having a substantially rectangular cross-section and arranged on the first insulating layer along the second diagonal direction, in a projection plane parallel to a surface of the substrate: the second pixel electrodes are alternately arranged with the first pixel electrodes in the length direction; and an inter-pixel gap is formed between corners of adjacent second pixel electrodes along the second diagonal direction and between cutaway corners of adjacent first pixel electrodes along the first diagonal direction.

Abstract: An RF energy transmitting apparatus with positioning and polarization tracing function is used for an RF energy harvesting apparatus. The RF energy transmitting apparatus includes a power radar transmitter and a radar controller. The power radar transmitter receives a power source signal and emits an electromagnetic source wave. The radar controller is electrically connected to power radar transmitter and receives a reflected harmonic wave. The power radar transmitter emits the electromagnetic source wave to scan a space. The RF energy harvesting apparatus generates and emits the reflected harmonic wave. The radar controller determines a position and a polarization angle of the RF energy harvesting apparatus after receiving the reflected harmonic wave and to adjust a polarization angle of the power radar transmitter to be within a predetermined angle range with respect to the polarization angle of the reflected harmonic wave sent from the RF energy harvesting apparatus.

Abstract: A LCOS display panel comprises a silicon substrate, a pixel structure on the silicon substrate, a first and a second PI (polyimide) layers, a LC (liquid crystal) layer between the first and the second PI layers, wherein the second PI layer is disposed on the pixel structure, and the LC layer is disposed on the second PI layer, a glass substrate, an ITO (indium tin oxide) layer, a dam sealing a perimeter of the LCOS display panel to enclose the LC layer within the dam, wherein the dam is disposed between the first and second PI layers, and holds the silicon substrate and the glass substrate together, and a UV (ultra violet) cut filter in an active area of the LCOS display panel, wherein the active area of the LCOS display panel includes the LC layer and the pixel structure.

Abstract: Provided is a method of making colloidal platinum nanoparticles. The method includes three consecutive steps: dissolving platinum powders by a halogen-containing oxidizing agent in HCl to obtain an inorganic platinum solution containing an inorganic platinum compound; adding a reducing agent into the same reaction vessel to form a mixture solution and heating the mixture solution to undergo a reduction reaction and produce a composition containing platinum nanoparticles, residues and a gas, and guiding the gas out of the reaction vessel, wherein the amount of the residues is less than 15% by volume of the mixture solution; and adding a medium into the same reaction vessel to disperse the platinum nanoparticles to obtain colloidal platinum nanoparticles. The method is simple, safe, time-effective, cost-effective, and has the advantage of high yield.

Abstract: An active-pixel device assembly with stray-light reduction includes an active-pixel device including a semiconductor substrate and an array of active pixels, a light-transmissive substrate disposed on a light-receiving side of the active-pixel device, and a rough opaque coating disposed on a first surface of the light-transmissive substrate and forming an aperture aligned with the array of active pixels, wherein the rough opaque coating is rough so as to suppress reflection of light incident thereon from at least one side. A method for manufacturing a stray-light-reducing coating for an active-pixel device assembly includes depositing an opaque coating on a light-transmissive substrate such that the opaque coating forms a light-transmissive aperture, and roughening the opaque coating to form a rough opaque coating, said roughening including treating the opaque coating with an alkaline solution.

Abstract: An image sensor chip-scale package includes a pixel array, a cover glass covering the pixel array, a dam, and an adhesive layer. The pixel array is embedded in a substrate top-surface of a semiconductor substrate. The semiconductor substrate includes a plurality of conductive pads in a peripheral region of the semiconductor substrate surrounding the pixel array. The dam at least partially surrounds the pixel array and is located (i) between the cover glass and the semiconductor substrate, and (ii) on a region of the substrate top-surface between the pixel array and the plurality of conductive pads. The adhesive layer is (i) located between the cover glass and the semiconductor substrate, (ii) at least partially surrounding the dam, and (iii) configured to adhere the cover glass to the semiconductor substrate.

Abstract: A power delivery device includes a printed circuit board (PCB), a package device, and a chip connecting device. The PCB is configured to receive a first reference voltage and a second reference voltage. The package device is coupled to the PCB, and includes a bump array. The chip connecting device is coupled to the bump array of the package device, and configured to output a first supply voltage and a second supply voltage. The bump array includes first bumps and second bumps. The first bumps are configured to transmit the first reference voltage. The second bumps are configured to transmit the second reference voltage. The first bumps and the second bumps are disposed in parallel.

Abstract: A keyboard device includes plural key structures. Each key structure includes a supporting plate, a keycap, a connecting member and a hook element. The keycap is located over the supporting plate, and movable upwardly or downwardly relative to the supporting plate. The connecting member is connected between the supporting plate and the keycap. The hook element is installed on the supporting plate. The connecting member is connected with the supporting plate through the hook element. The supporting plate is made of a first material with a first specific gravity. The hook element is made of a second material with a second specific gravity. The second specific gravity is higher than the first specific gravity.

Abstract: A signal transmission device includes a transmission line. The transmission line is configured to receive a signal transmitted from a transmission device, and output the signal to a receiving device. The transmission line includes a signal suppression device. The signal suppression device is coupled to the receiving device, and is configured to suppress a reflection signal reflected from the receiving device. The signal suppression device includes a pull-up element and a compensation element. The pull-up element is configured to decrease an equivalent impedance from the signal suppression device to the receiving device. The compensation element is configured to compensate for the equivalent impedance from the signal suppression device to the receiving device. A first terminal of the pull-up element is coupled to a first terminal of the compensation element, and a second terminal of the compensation element is coupled to the receiving device.

Abstract: A cavityless chip-scale image-sensor package includes a substrate, a microlens array, and a low-index layer. The substrate includes a plurality of pixels forming a pixel array. The microlens array includes a plurality of microlenses each (i) having a lens refractive index, (ii) being aligned to a respective one of the plurality of pixels and (iii) having a non-planar microlens surfaces facing away from the respective one of the plurality of pixels. The low-index layer has a first refractive index less than the lens refractive index. The low-index layer also includes a bottom surface, at least part of which is conformal to each non-planar microlens surface. The microlens array is between the pixel array and the low-index layer.

Abstract: A semiconductor device and method includes: forming a first fin and a second fin on a substrate; forming a dummy gate material over the first fin and the second fin; forming a recess in the dummy gate material between the first fin and the second fin; forming a sacrificial oxide on sidewalls of the dummy gate material in the recess; filling an insulation material between the sacrificial oxide on the sidewalls of the dummy gate material in the recess; removing the dummy gate material and the sacrificial oxide; and forming a first replacement gate over the first fin and a second replacement gate over the second fin.

Abstract: An optical element comprising a transparent substrate and an anti-reflective coating, wherein the anti-reflective coating further comprises at least a transparent, high refractive index layer and a transparent, low refractive index layer, wherein the high refractive index layer is in contact with the low refractive index layer; and wherein the high refractive index layer is situated at an interface between the anti-reflective coating and air. Further, the low refractive index layer may be silicon oxide; the high refractive index layer may be tantalum oxide or silicon nitride.

Abstract: An example liquid crystal display device includes a circuit substrate, an array of conductive mirrors formed on the substrate, a light absorbing material disposed between the conductive mirrors, a transparent plate disposed over the array of conductive mirrors, and liquid crystal material disposed between the conductive mirrors and the transparent plate. The light absorbing material can also be disposed around the peripheral region of the array of the conductive mirrors. In an example display, the light absorbing material is black and/or has a light absorbing efficiency of at least fifty percent.

Abstract: Provided is a metal gate structure and related methods that include forming a first fin and a second fin on a substrate. In various embodiments, the first fin has a first gate region and the second fin has a second gate region. By way of example, a metal-gate line is formed over the first and second gate regions. In some embodiments, the metal-gate line extends from the first fin to the second fin, and the metal-gate line includes a sacrificial metal portion. In various examples, a line-cut process is performed to separate the metal-gate line into a first metal gate line and a second gate line. In some embodiments, the sacrificial metal portion prevents lateral etching of a dielectric layer during the line-cut process.

Abstract: An image-sensor package includes a cover glass, an image sensor, and an integrated circuit. The cover glass has a cover-glass bottom surface, to which the image sensor is bonded. The integrated circuit is beneath the cover-glass bottom surface, adjacent to the image sensor, and electronically connected to the image sensor. A method for packaging an image sensor includes attaching an image sensor to a cover-glass bottom surface of a cover glass, a light-sensing region of the image sensor facing the cover-glass bottom surface. The method also includes attaching an integrated circuit to the cover-glass bottom surface, a top IC-surface of the integrated circuit facing the cover-glass bottom surface.

Abstract: A semiconductor device and method includes: forming a first fin and a second fin on a substrate; forming a dummy gate material over the first fin and the second fin; forming a recess in the dummy gate material between the first fin and the second fin; forming a sacrificial oxide on sidewalls of the dummy gate material in the recess; filling an insulation material between the sacrificial oxide on the sidewalls of the dummy gate material in the recess; removing the dummy gate material and the sacrificial oxide; and forming a first replacement gate over the first fin and a second replacement gate over the second fin.

Abstract: The invention provides a chip assembly for implantation into a living tissue comprising an electronic element and a biocompatible buffer material. The electronic element is defined to form a first contour, the first contour comprises at least one sharp edge exposed outside, and the buffer material covers the sharp edge and blocks the sharp edge to avoid damage to the living tissue.

Abstract: A method and structure for mitigating leakage current in devices that include a continuous active region. In some embodiments, a threshold voltage at the cell boundary is increased by changing a photomask logic operation (LOP) to reverse a threshold voltage type at the cell boundary. Alternatively, in some cases, the threshold voltage at the cell boundary is increased by performing a threshold voltage implant (e.g., an ion implant) at the cell boundary, and into a dummy gate disposed at the cell boundary. Further, in some embodiments, the threshold voltage at the cell boundary is increased by use of a silicon germanium (SiGe) channel at the cell boundary. In some cases, the SiGe may be disposed within the substrate at the cell boundary and/or the SiGe may be part of the dummy gate disposed at the cell boundary.

Abstract: A circuit structure including a first signal line and a second signal line is provided. The first signal line includes a first line segment, a first ball grid array pad, and a first through hole disposed between the first line segment and the first ball grid array pad. The second signal line includes a second line segment, a second ball grid array pad, and a second through hole disposed between the second line segment and the second ball grid array pad. In a plan view, a line connecting the center of the first ball grid array pad and the center of the second ball grid array pad has a first distance, a line connecting the center of the first through hole and the center of the second through hole has a second distance, and the first distance is less than the second distance. A chip package is also provided.

Abstract: A semiconductor structure is provided. The semiconductor structure includes: a substrate having a cavity recessed from a top surface of the substrate toward a bottom surface of the substrate opposite to the top surface, wherein the cavity has a sidewall and a bottom surface, and the bottom surface of the cavity is substantially parallel to the top surface of the substrate; a light source structure in the cavity, and the light source structure emitting a light from a sidewall of the light source structure; and a diffractive optical element (DOE) over the top surface of the substrate; wherein the sidewall of the cavity is a sloped surface, so that when the light is incident on the sidewall, the sloped surface reflects the incident light to generate a reflected light toward the DOE. Associated semiconductor structure and manufacturing method are also disclosed.