Abstract: A method includes forming a replica circuit above a surface of a glass-type material. The replica circuit includes a thin-film transistor (TFT) configured to function as a variable capacitor or a variable resistor. The method further includes forming a transformer above the surface of the glass-type material. The transformer is coupled to the replica circuit, and the transformer is configured to facilitate an impedance match between the replica circuit and an antenna.

Abstract: A semiconductor device includes a substrate, a buried doped layer, a first doped well, a multiplication region and a first contact doped region. The substrate has a first doping type, wherein the substrate includes a surface. The buried doped layer is in the substrate and exposed from the surface of the substrate, wherein the buried doped layer has a second doping type opposite to the first doping type. The first doped well is over the buried doped layer, wherein the first doped well has the first doping type. The multiplication region is proximal to an interface between the buried doped layer and the first doped well. The first contact doped region is over the first doped well, wherein the first contact doped region has the first doping type and a doped concentration higher than a doped concentration of the first doped well.

Abstract: A semiconductor device includes a substrate, a buried doped layer, a first doped well, a multiplication region and a first contact doped region. The substrate has a first doping type, wherein the substrate includes a surface. The buried doped layer is in the substrate and exposed from the surface of the substrate, wherein the buried doped layer has a second doping type opposite to the first doping type. The first doped well is over the buried doped layer, wherein the first doped well has the first doping type. The multiplication region is proximal to an interface between the buried doped layer and the first doped well. The first contact doped region is over the first doped well, wherein the first contact doped region has the first doping type and a doped concentration higher than a doped concentration of the first doped well.

Abstract: A method of forming a serpentine resistor includes: setting a total length of a schematic resistor to make the schematic resistor to have a first resistance according to a sheet resistance; forming, by using a processor, a serpentine layer corresponding to the schematic resistor, forming, by using the processor, a dummy layer over a portion of the serpentine layer to form a modified serpentine layer, measuring, by using the processor, a modified length of the modified serpentine layer, and comparing, by using the processor, the total length and the modified length to generate a comparison result.

Abstract: In a particular embodiment, a device includes a low-loss substrate, a first inductor structure, and an air-gap. The first inductor structure is between the low-loss substrate and a second inductor structure. The first inductor structure is aligned with the second inductor structure to form a transformer. The air-gap is between the first inductor structure and the second inductor structure.

Abstract: A method includes forming a replica circuit above a surface of a glass-type material. The replica circuit includes a thin-film transistor (TFT) configured to function as a variable capacitor or a variable resistor. The method further includes forming a transformer above the surface of the glass-type material. The transformer is coupled to the replica circuit, and the transformer is configured to facilitate an impedance match between the replica circuit and an antenna.

Abstract: A particular device includes a replica circuit disposed above a dielectric substrate. The replica circuit includes a thin film transistor (TFT) configured to function as a variable capacitor or a variable resistor. The device further includes a transformer disposed above the dielectric substrate and coupled to the replica circuit. The transformer is configured facilitate an impedance match between the replica circuit and an antenna.

Abstract: An apparatus includes a body and a surface for receiving a semiconductor wafer carrier is provided. A nozzle and a venting hole are provided on the surface. The semiconductor wafer carrier has at least one selectively closable capped opening at a bottom, top and/or side surface thereof. The capped opening is configured to couple to, and be accessible by, the nozzle and receive gas output from the nozzle so as to create a substantially oxygen free environment within the semiconductor wafer carrier. The vent hole is configured to allow gas to flow out of the semiconductor wafer carrier. In addition, the apparatus includes a sensor and a controller. The sensor is configured to monitor an ambient condition in the semiconductor wafer carrier, and the controller is configured to adjust a control valve based on the ambient condition so as to control the gas flow or output from the nozzle.

Abstract: A chipset includes a sheet of glass, quartz or sapphire and a first wafer having at least one first circuit layer on a first side of a first substrate layer. The first wafer is connected to the sheet such that the at least one first circuit layer is located between the first substrate layer and the sheet. A second wafer having at least one second circuit layer on a first side of a second substrate layer is connected to the first substrate layer such that the at least one second circuit layer is located between the second substrate layer and the first substrate layer. Also a method of forming a chipset.

Abstract: Several novel features pertain to a hybrid transformer formed within a semiconductor die having multiple layers. The hybrid transformer includes a first set of windings positioned on a first layer of the die. The first layer is positioned above a substrate of the die. The first set of windings includes a first port and a second port. The first set of windings is arranged to operate as a first inductor. The hybrid transformer includes a second set of windings positioned on a second layer of the die. The second layer is positioned above the substrate. The second set of windings includes a third port, a fourth port and a fifth port. The second set of windings is arranged to operate as a second inductor and a third inductor. The first set of windings and the second set of windings are arranged to operate as a vertical coupling hybrid transformer.

Abstract: Methods and apparatus for metal semiconductor wafer bonding for high-Q devices are provided. An exemplary capacitor includes a first plate formed on a glass substrate, a second plate, and a dielectric layer. No organic bonding agent is used between the first plate and the glass substrate, and the dielectric layer can be an intrinsic semiconductor. A extrinsic semiconductor layer that is heavily doped contacts the dielectric layer. The dielectric and extrinsic semiconductor layers are sandwiched between the first and second plates. An intermetallic layer is formed between the first plate and the dielectric layer. The intermetallic layer is thermo compression bonded to the first plate and the dielectric layer. The capacitor can be coupled in a circuit as a high-Q capacitor and/or a varactor, and can be integrated with a mobile device.

Abstract: A diversity receiver switch includes at least one second stage switch configured to communicate with a transceiver. The diversity receiver switch may also include at least one first stage switch coupled between a diversity receiver antenna and the second stage switch(es). The first stage switch(es) may be configured to handle a different amount of power than the second stage switch(es). The diversity receiver switch may include a bank of second stage switches configured to communicate with a transceiver. A first stage switch may be configured to handle more power than each switch in the bank of second stage switches. Alternatively, the diversity receiver switch include a bank of first stage switches coupled between the diversity receiver antenna and a second stage switch. The second stage switch may be configured to handle more power than each of the first stage switches.

Abstract: This disclosure provides implementations of inductors, transformers, and related processes. In one aspect, a device includes a substrate having first and second surfaces. A first inducting arrangement includes a first set of vias, a second set of vias, a first set of traces arranged over the first surface connecting the first and second vias, and a second set of traces arranged over the second surface connecting the first and second vias. A second inducting arrangement is inductively-coupled and interleaved with the first inducting arrangement and includes a third set of vias, a fourth set of vias, a third set of traces arranged over the first surface connecting the third and fourth vias, and a fourth set of traces arranged over the second surface connecting the third and fourth vias. One or more sets of dielectric layers insulate portions of the traces from one another.

Abstract: This disclosure provides systems, methods and apparatus related to acoustic resonators that include composite transduction layers for enabling selective tuning of one or more acoustic or electromechanical properties. In one aspect, a resonator structure includes one or more first electrodes, one or more second electrodes, and a transduction layer arranged between the first and second electrodes. The transduction layer includes a plurality of constituent layers. In some implementations, the constituent layers include one or more first piezoelectric layers and one or more second piezoelectric layers. The transduction layer is configured to, responsive to signals provided to the first and second electrodes, provide at least a first mode of vibration of the transduction layer with a displacement component along the z axis and at least a second mode of vibration of the transduction layer with a displacement component along the plane of the x axis and they axis.

Abstract: Electromechanical systems dilation mode resonator (DMR) structures are disclosed. The DMR includes a first electrode layer, a second electrode layer, and a piezoelectric layer formed of a piezoelectric material. The piezoelectric layer has dimensions including a lateral distance (D), in a plane of an X axis and a Y axis perpendicular to the X axis, and a thickness (T), along a Z axis perpendicular to the X axis and the Y axis. A numerical ratio of the thickness and the lateral distance, T/D, is configured to provide a mode of vibration of the piezoelectric layer with displacement along the Z axis and along the plane of the X axis and the Y axis responsive to a signal provided to one or more of the electrodes. Ladder filter circuits can be constructed with DMRs as series and/or shunt elements, and the resonators can have spiral configurations.

Abstract: A multiple frequency reconfigurable voltage controlled oscillator (VCO) (136) includes a variable capacitance device (112), an inductor (116) coupled in parallel with the variable capacitance device (112), and at least two circuit paths (118, 120, 122) coupled in parallel with the variable capacitance device (112) and the inductor (116). The circuit paths (118, 120, 122) each include a piezoelectric laterally vibrating resonator (126, 130, 134) and a switch (124, 128, 132) for selectably coupling each piezoelectric laterally vibrating resonator (126, 130, 134) in parallel with the inductor (116) and variable capacitance device (112).