Patents by Inventor An STEEGAN

An STEEGAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD AND STRUCTURE FOR FORMING STRAINED SI FOR CMOS DEVICES
    Publication number: 20070020806
    Abstract: A semiconductor device includes a semiconductor substrate having at least one gap, extending under a portion of the semiconductor substrate. A gate stack is on the semiconductor substrate. A strain layer is formed in at least a portion of the at least one gap. The strain layer is formed only under at least one of a source region and a drain region of the semiconductor device.
    Type: Application
    Filed: September 22, 2006
    Publication date: January 25, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: An STEEGAN, Haining YANG, Ying ZHANG
  • SELECTIVE SILICON-ON-INSULATOR ISOLATION STRUCTURE AND METHOD
    Publication number: 20040262695
    Abstract: A first aspect of the present invention is a method of forming an isolation structure including: (a) providing a semiconductor substrate; (b) forming a buried N-doped region in the substrate; (c) forming a vertical trench in the substrate, the trench extending into the N-doped region; (d) removing the N-doped region to form a lateral trench communicating with and extending perpendicular to the vertical trench; and (e) at least partially filling the lateral trench and filling the vertical trench with one or more insulating materials.
    Type: Application
    Filed: June 26, 2003
    Publication date: December 30, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: An L. Steegan, Maheswaran Surendra, Hsing-Jen Wann, Ying Zhang, Franz Zach, Robert Wong