Patents by Inventor An-Te Chiu

An-Te Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11935935
    Abstract: A thin film transistor includes a gate electrode embedded in an insulating layer that overlies a substrate, a gate dielectric overlying the gate electrode, an active layer comprising a compound semiconductor material and overlying the gate dielectric, and a source electrode and drain electrode contacting end portions of the active layer. The gate dielectric may have thicker portions over interfaces with the insulating layer to suppress hydrogen diffusion therethrough. Additionally or alternatively, a passivation capping dielectric including a dielectric metal oxide material may be interposed between the active layer and a dielectric layer overlying the active layer to suppress hydrogen diffusion therethrough.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Min-Kun Dai, Wei-Gang Chiu, I-Cheng Chang, Cheng-Yi Wu, Han-Ting Tsai, Tsann Lin, Chung-Te Lin
  • Publication number: 20240087877
    Abstract: A backside metallized compound semiconductor device includes a compound semiconductor wafer and a metal layered structure. The compound semiconductor wafer includes a substrate having opposite front and back surfaces, and a ground pad structure formed on the front surface. The substrate is formed with a via extending from the back surface to the front surface to expose a side wall of the substrate and a portion of the ground pad structure. The metal layered structure is disposed on the back surface, and covers the side wall and the portion of the ground pad structure. The metal layered structure includes an adhesion layer, a seed layer, a gold layer, and an electroplated copper layer that are formed on the back surface in such order. The method for manufacturing the backside metallized compound semiconductor device is also disclosed.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Tsung-Te CHIU, Kechuang LIN, Houng-Chi WEI, Chia-Chu KUO, Bing-Han CHUANG
  • Publication number: 20240081081
    Abstract: A ferroelectric memory device and a semiconductor die are provided. The ferroelectric memory device includes a gate electrode; a channel layer, overlapped with the gate electrode; source/drain contacts, in contact with separate ends of the channel layer; a ferroelectric layer, lying between the gate electrode and the channel layer; and a first insertion layer, extending in between the ferroelectric layer and the channel layer, and comprising a metal carbonitride or a metal nitride.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ya-Ling Lee, Chung-Te Lin, Han-Ting Tsai, Wei-Gang Chiu, Yen-Chieh Huang, Ming-Yi Yang
  • Patent number: 11916314
    Abstract: A mobile device includes a housing, a first radiation element, a second radiation element, a third radiation element, a first switch element, and a second switch element. The first radiation element has a first feeding point. The second radiation element has a second feeding point. The first radiation element, the second radiation element, and the third radiation element are distributed over the housing. The first switch element is closed or open, so as to selectively couple the first radiation element to the third radiation element. The second switch element is closed or open, so as to selectively couple the second radiation element to the third radiation element. An antenna structure is formed by the first radiation element, the second radiation element, and the third radiation element.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: February 27, 2024
    Assignee: HTC Corporation
    Inventors: Cheng-Hung Lin, Szu-Po Wang, Chia-Te Chien, Chun-Chieh Wang, Kang-Ling Li, Chun-Hsien Lee, Yu-Chieh Chiu
  • Patent number: 11910791
    Abstract: A graded early warning system for pest quantity counting includes: at least one image capturing device used to capture images of at least one pest trapping device in an environment to generate at least one pest trapping image; at least one environment monitoring and sensing device used to detect the environment to generate at least one environment parameter; at least one pest detecting and identifying device used to detect quantities and species of multiple pests based on the at least one pest trapping image; and a cloud server used to receive the at least one pest trapping image, the at least one environment parameter, and the quantities and species of multiple pests; wherein the cloud server immediately establishes pest probability models, generates early warning signals, and prompts suppression decisions according to the at least one environment parameter and the quantities and species of multiple pests.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: February 27, 2024
    Assignee: National Taiwan University
    Inventors: Ta-Te Lin, Dan Jeric Arcega Rustia, Lin-Ya Chiu
  • Patent number: 11916155
    Abstract: An optoelectronic package and a method for producing the optoelectronic package are provided. The optoelectronic package includes a carrier, a photonic device, a first encapsulant and a second encapsulant. The photonic device is disposed on the carrier. The first encapsulant covers the carrier and is disposed around the photonic device. The second encapsulant covers the first encapsulant and the photonic device. The first encapsulant has a topmost position and a bottommost position, and the topmost position is not higher than a surface of the photonic device.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: February 27, 2024
    Assignees: LITE-ON OPTO TECHNOLOGY (CHANGZHOU) CO., LTD., LITE-ON TECHNOLOGY CORPORATION
    Inventors: Chien-Hsiu Huang, Bo-Jhih Chen, Kuo-Ming Chiu, Meng-Sung Chou, Wei-Te Cheng, Kai-Chieh Liang, Yun-Ta Chen, Yu-Han Wang
  • Patent number: 11899776
    Abstract: A method for authenticating a software based on a blockchain implemented in an electronic device. The method includes obtaining a first identification code and a first hash value of a first software; generating a first authentication code; writing the first identification code, the first hash value, and the first authentication code into a blockchain; obtaining a second identification code of a second software to be identified and calculating a second hash value of the second software; determining whether the second hash value of the second software is the same as the first hash value; if the second hash value is the same as the first hash value, generating a second authentication code; determine whether the second authentication code is the same as the first authentication code; and if so determining that the second software is copyrighted.
    Type: Grant
    Filed: August 4, 2021
    Date of Patent: February 13, 2024
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Liang-Te Chiu
  • Patent number: 11887660
    Abstract: The present invention provides a pseudo dual-port memory. The pseudo dual-port memory includes a single-port memory, a multiplexer, a timing control circuit and an output circuit. The multiplexer is configured to sequentially output a first address and a second address to the single-port memory. The output circuit is configured to receive output data from the single-port memory to generate a first reading result corresponding to the first address and a second reading result corresponding to the second address. The output circuit includes a first sense amplifier and a second sense amplifier, wherein the first sense amplifier receives the output data to generate first data serving as the first reading result according to a first control signal, and the second sense amplifier receives the output data to generate second data serving as the second reading result according to a second control signal.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: January 30, 2024
    Assignee: MEDIATEK INC.
    Inventors: Yi-Ping Kuo, Yi-Te Chiu
  • Publication number: 20240009803
    Abstract: A slurry dispersion system is provided, and includes a slurry source system, an in-line analyzer and a controller. The slurry source system provides a slurry for a chemical mechanical polishing (CMP) process. The in-line analyzer measures at least large particle count (LPC) value of a sampled slurry sampled from the slurry dispersion system, and generates an indication signal based on the LPC value, in which the indication signal indicates at lease one characteristic of the slurry. The controller receives the indication signal, and generates a control signal based on the indication signal for performing a real time control on the slurry dispersion system for controlling quality of the slurry.
    Type: Application
    Filed: September 25, 2023
    Publication date: January 11, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: I-Chen CHIANG, Hwai-Te CHIU, Yi-Tsang CHEN, Chih-Chiang TSENG, Yung-Long CHEN
  • Patent number: 11823891
    Abstract: A backside metallized compound semiconductor device includes a compound semiconductor wafer and a metal layered structure. The compound semiconductor wafer includes a substrate having opposite front and back surfaces, and a ground pad structure formed on the front surface. The substrate is formed with a via extending from the back surface to the front surface to expose a side wall of the substrate and a portion of the ground pad structure. The metal layered structure is disposed on the back surface, and covers the side wall and the portion of the ground pad structure. The metal layered structure includes an adhesion layer, a seed layer, a gold layer, and an electroplated copper layer that are formed on the back surface in such order. The method for manufacturing the backside metallized compound semiconductor device is also disclosed.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: November 21, 2023
    Assignee: XIAMEN SANAN INTEGRATED CIRCUIT CO., LTD.
    Inventors: Tsung-Te Chiu, Kechuang Lin, Houng-Chi Wei, Chia-Chu Kuo, Bing-Han Chuang
  • Patent number: 11768277
    Abstract: A time-of-flight sensor for capturing a three-dimensional (3D) image of an object, includes: a light source for emitting projection light pulses at the object according to a projection signal; an array of pixel circuits for sensing reflection light pulses and storing image charges according to the reflection light pulses; and a processing circuit for calculating a first sum of first portions of the image charges and a second sum of second portions of the image charges to generate a distance information signal of the 3D image of the object simultaneously, wherein in one accumulation period, the first portion of the image charges is generated during a first time period, and the second portion of the image charges is generated during a second time period, wherein the second time period is directly following the first time period in the accumulation period.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: September 26, 2023
    Assignee: PIXART IMAGING INCORPORATION
    Inventors: Kuan Tang, Kai-Chieh Chuang, Chia-Chi Kuo, Jui-Te Chiu
  • Patent number: 11764728
    Abstract: An oscillator includes a first current source, a second current source, a first chopper circuit, a resistive component, a capacitive component, and a processing circuit. The first current source provides a first current. The second current source provides a second current. The first chopper circuit includes a first terminal coupled to the first current source, a second terminal coupled to the second current source, a third terminal coupled to the resistive component, and a fourth terminal coupled to the capacitive component. The processing circuit generates an output clock in response to a first voltage across the resistive component and a second voltage across the capacitive component. The first chopper circuit couples the first terminal and the second terminal to the third terminal and the fourth terminal, respectively and alternately. The resistive component and the capacitive component receive the first current and the second current, respectively and alternately.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: September 19, 2023
    Assignee: Airoha Technology Corp.
    Inventors: Yu-Hua Liu, Yao-Te Chiu
  • Publication number: 20230219522
    Abstract: A method for monitoring internal environment of a vehicle implemented in an electronic device includes detecting environment data of internal of the vehicle, and detecting whether an engine of the vehicle is running; when the engine of the vehicle is running and the environment data does not meet a preset threshold, issuing a first alarm; when the engine of the vehicle is not running, obtaining location information of the vehicle, activating a camera device to capture images or shoot a video of internal of the vehicle, and determining whether at least one living creature is inside the vehicle; when the at least one living creature is inside the vehicle, transmitting the location information, and the images or the video and the environment data to a terminal device; and displaying the location information, the images or the video and the environment data, and issuing a second alarm.
    Type: Application
    Filed: January 13, 2023
    Publication date: July 13, 2023
    Inventor: LIANG-TE CHIU
  • Patent number: 11676657
    Abstract: The present invention provides a pseudo dual-port memory. The pseudo dual-port memory includes a single-port memory, a multiplexer, a timing control circuit and an output circuit. The multiplexer is configured to sequentially output a first address and a second address to the single-port memory. The output circuit is configured to receive output data from the single-port memory to generate a first reading result corresponding to the first address and a second reading result corresponding to the second address. The output circuit includes a first sense amplifier and a second sense amplifier, wherein the first sense amplifier receives the output data to generate first data serving as the first reading result according to a first control signal, and the second sense amplifier receives the output data to generate second data serving as the second reading result according to a second control signal.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: June 13, 2023
    Assignee: MEDIATEK INC.
    Inventors: Yi-Ping Kuo, Yi-Te Chiu
  • Patent number: 11614359
    Abstract: There is provided a circuit to improve the sensing efficiency of pixels that uses the induction effect of a capacitor to duplicate a voltage deviation caused by additional electrons and uses a circuit to cancel out the voltage deviation during reading pixel data thereby improving the sensing efficiency.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: March 28, 2023
    Assignee: PIXART IMAGING INC.
    Inventors: Kuan Tang, Yi-Cheng Chiu, Chia-Chi Kuo, Jui-Te Chiu, Han-Chi Liu
  • Publication number: 20230081959
    Abstract: A system and a method for managing a virtual network function (VNF) and a multi-access edge computing (MEC) topology are provided. The method includes the following steps. A first VNF descriptor (VNFD) corresponding to a first VNF is received. According to the first VNFD, first provision data is generated. According to the first VNFD, first internal topology information of the first VNF is generated. According to the first provision data, the first VNF is instantiated to be provisioned. In response to provisioning the first VNF, a graphical user interface including the first internal topology information is output, and the first internal topology information includes a network component communicatively connected to the first VNF.
    Type: Application
    Filed: October 24, 2021
    Publication date: March 16, 2023
    Applicant: Chunghwa Telecom Co., Ltd.
    Inventors: Wen-Sheng Li, Si-An Ciou, Chi-Te Chiu, Chun-Hao Chen, Jia-An Tsai
  • Patent number: 11592330
    Abstract: There is provided a circuit to improve the sensing efficiency of pixels that uses the induction effect of a capacitor to duplicate a voltage deviation caused by additional electrons and uses a circuit to cancel out the voltage deviation during reading pixel data thereby improving the sensing efficiency.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: February 28, 2023
    Assignee: PIXART IMAGING INC.
    Inventors: Kuan Tang, Yi-Cheng Chiu, Chia-Chi Kuo, Jui-Te Chiu, Han-Chi Liu
  • Patent number: 11592331
    Abstract: There is provided a circuit to improve the sensing efficiency of pixels that uses the induction effect of a capacitor to duplicate a voltage deviation caused by additional electrons and uses a circuit to cancel out the voltage deviation during reading pixel data thereby improving the sensing efficiency.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: February 28, 2023
    Assignee: PIXART IMAGING INC.
    Inventors: Kuan Tang, Yi-Cheng Chiu, Chia-Chi Kuo, Jui-Te Chiu, Han-Chi Liu
  • Publication number: 20230034569
    Abstract: An example keyboard module for a computing device may be separable and wirelessly communicable with a display module. In some examples, the keyboard module may include a wireless transceiver to receive a first audio signal from the display module and to transmit a second audio signal to the display module. The first audio signal may be output by a speaker on the keyboard module. The second audio signal may be captured by a microphone on the keyboard module. In some examples, the keyboard module may include a wireless display receiver to receive a display image from the display module. In some examples, the keyboard module may include a display output port to output the received display image for an external display.
    Type: Application
    Filed: January 20, 2020
    Publication date: February 2, 2023
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Ying-Ting Chen, Yao-Te Chiu, Yi-Leng Kuo
  • Publication number: 20220406373
    Abstract: The present invention provides a pseudo dual-port memory. The pseudo dual-port memory includes a single-port memory, a multiplexer, a timing control circuit and an output circuit. The multiplexer is configured to sequentially output a first address and a second address to the single-port memory. The output circuit is configured to receive output data from the single-port memory to generate a first reading result corresponding to the first address and a second reading result corresponding to the second address. The output circuit includes a first sense amplifier and a second sense amplifier, wherein the first sense amplifier receives the output data to generate first data serving as the first reading result according to a first control signal, and the second sense amplifier receives the output data to generate second data serving as the second reading result according to a second control signal.
    Type: Application
    Filed: August 24, 2022
    Publication date: December 22, 2022
    Applicant: MEDIATEK INC.
    Inventors: Yi-Ping Kuo, Yi-Te Chiu