Abstract: An organic light-emitting diode display may have thin-film transistor circuitry formed on a substrate. The display and substrate may have rounded corners. A pixel definition layer may be formed on the thin-film transistor circuitry. Openings in the pixel definition layer may be provided with emissive material overlapping respective anodes for organic light-emitting diodes. A cathode layer may cover the array of pixels. A ground power supply path may be used to distribute a ground voltage to the cathode layer. The ground power supply path may be formed from a metal layer that is shorted to the cathode layer using portions of a metal layer that forms anodes, may be formed from a mesh shaped metal pattern, may have L-shaped path segments, and may include laser-deposited metal on the cathode layer. Data lines may be formed from metal layers in the active area to accommodate the rounded corners of the display.

Abstract: Described herein are technologies that are configured to assist a user in recollection information about people, places, and things. Computer-readable data is captured, and contextual data that temporally corresponds to the computer-readable data is also captured. In a database, the computer-readable data is indexed by the contextual data. Thus, when a query is received that references the contextual data, the computer-readable data is retrieved.

Abstract: A display may have an array of pixels such as liquid crystal display pixels. The display may include short pixel rows that span only partially across the display and full-width pixel rows that span the width of the display. The gate lines coupled to the short pixel rows may extend into the inactive area of the display. Supplemental gate line loading structures may be located in the inactive area of the display to increase loading on the gate lines that are coupled to short pixel rows. The supplemental gate line loading structures may include data lines and doped polysilicon that overlap the gate lines in the inactive area. In displays that combine display and touch functionality into a thin-film transistor layer, supplemental loading structures may be used in the inactive area to increase loading on common voltage lines that are coupled to short rows of common voltage pads.

Abstract: A semiconductor device includes a substrate and an isolation feature. The isolation feature includes a first portion in the substrate, and a second portion extending along a top surface of the substrate, wherein a bottom surface of the second portion is below the top surface of the substrate. The semiconductor device further includes a gate structure over the substrate, wherein the gate structure extends along a top surface of the second portion of the isolation feature.

Abstract: A liquid level sensing device and a packing structure are provided. An outer tube fastener is connected to a signal module. A protective soft tube is connected to the outer tube fastener. An end of a double-layer flexible tube is connected to the protective soft tube. The double-layer flexible tube includes a flexible conductive outer tube and a fluorine-containing plastic inner tube coaxially attached in the flexible conductive outer tube. The fluorine-containing plastic inner tube is made of a flexible material. The flexible conductive outer tube is made of a conductive flexible material to form a grounding layer. A sensing module is disposed in the fluorine-containing plastic inner tube. A magnetic floater is assembled outside the double-layer flexible tube. A hanger is connected to another end of the double-layer flexible tube.

Abstract: Embodiments discussed herein refer to systems and methods for identifying relevantly similar sentiment in text strings.

Abstract: An ovonic threshold switch includes a first electrode, a second electrode, and an In-doped chalcogenide-based selector layer disposed between the first electrode and the second electrode, in which the In-doped chalcogenide-based selector layer has an In compound content of about 2 at. % to about 10 at. %. A memory cell including the In-doped chalcogenide-based selector layer is also provided.

Abstract: A display may have rows and columns of pixels. Gate lines may be used to supply gate signals to rows of the pixels. Data lines may be used to supply data signals to columns of the pixels. The data lines may include alternating even and odd data lines. Data lines may be organized in pairs each of which includes one of the odd data lines and an adjacent one of the even data lines. Demultiplexer circuitry may be configured dynamically during data loading and pixel sensing operations. During data loading, data from display driver circuitry may be supplied, alternately to odd pairs of the data lines and even pairs of the data lines. During sensing, the demultiplexer circuitry may couple a pair of the even data lines to sensing circuitry in the display driver circuitry and then may couple a pair of the odd data lines to the sensing circuitry.

Abstract: A device may include a first package and a second package where the first package has a warped shape. First connectors attached to a redistribution structure of the first package include a spacer embedded therein. Second connectors attached to the redistribution structure are fee from the spacer, the spacer of the first connectors keeping a minimum distance between the first package and the second package during attaching the first package to the second package.

Abstract: A display may have rows and columns of pixels that form an active area for displaying images. A display driver integrated circuit may provide multiplexed data signals to demultiplexer circuitry in the display. The demultiplexer circuitry may demultiplex the data signals and provide the demultiplexed data signals to the pixels on data lines. Gate lines may control the loading of the data signals into the pixels. The display may have a length dimension and a width dimension that is shorter than the length dimension. The data lines may extend parallel to the width dimension and the gate lines may extend parallel to the length dimension such that there are more data lines than gate lines in the display. A notch that is free of pixels may extend into the active area. Data lines extending parallel to the width dimension of the display may be routed around the notch.

Abstract: Embodiments of the present invention provide a system that that can be used to determine whether a sentiment analysis model is portable between two data sets. During operation, the system analyzes the text of a respective review in a data set (e.g., a set of reviews) using the sentiment analysis model to determine a sentiment expressed in the review. The system then computes a confidence score, which indicates the accuracy of a respective sentiment. The system subsequently determines a confidence score distribution for various sentiments, as determined by the sentiment analysis model. The system determines the significance of changes between the confidence score distribution and a benchmark confidence score distribution, which is associated with a benchmark data set for which the sentiment analysis model yields a high accuracy. The system can then determine whether the sentiment analysis model is portable to the data set based on the significance of changes.

Abstract: A semiconductor package includes a semiconductor device including a first UBM structure, wherein the first UBM structure includes multiple first conductive strips, the first conductive strips extending in a first direction, multiple second conductive strips separated from and interleaved with the multiple first conductive strips, the second conductive strips extending in the first direction, wherein the multiple first conductive strips are offset in the first direction from the multiple second conductive strips by a first offset distance, and a substrate including a second UBM structure, the second UBM structure including multiple third conductive strips, each one of the multiple third conductive strips bonded to one of the multiple first conductive strips or one of the multiple second conductive strips.

Abstract: Embodiments of the present disclosure include interconnect structures and methods of forming interconnect structures. An embodiment is an interconnect structure including a post-passivation interconnect (PPI) over a first substrate and a conductive connector on the PPI. The interconnect structure further includes a molding compound on a top surface of the PPI and surrounding a portion of the conductive connector, a top surface of the molding compound adjoining the conductive connector at an angle from about 10 degrees to about 60 degrees relative to a plane parallel with a major surface of the first substrate, the conductive connector having a first width at the adjoining top surface of the molding compound, and a second substrate over the conductive connector, the second substrate being mounted to the conductive connector.

Abstract: A voltage sensitive switching device has a first electrode, a second electrode, and a switching layer between the first and second electrodes, comprising a composition of carbon C, arsenic As, selenium Se and germanium Ge thermally stable to temperatures over 400° C. The switching device is used in 3D crosspoint memory.

Abstract: An article including a laminate having a substrate and an ultra-thin cover glass layer bonded to atop surface of the substrate. The ultra-thin cover glass layer has a thickness in the range of 1 micron to 49 microns. The ultra-thin cover glass layer is bonded to the top surface of the substrate with an optically transparent adhesive layer having a thickness in the range of 5 microns to 50 microns.

Abstract: Provided is an anti-INF-? antibody. Also provided are a composition comprising the antibody and a pharmaceutical application of the antibody in treating IFN-? mediated syndrome.

Abstract: Provided is an anti-INF-? antibody. Also provided are a composition comprising the antibody and a pharmaceutical application of the antibody in treating IFN-? mediated syndrome.

Abstract: A method of making a semiconductor device includes etching a substrate to define a trench in a substrate, wherein the trench is adjacent to an active region in the substrate, and etching the substrate includes patterning a mask. The method further includes partially removing the mask to expose a first portion of the active region, wherein the first portion extends a first distance from the trench. The method further includes depositing a dielectric material to fill the trench and cover the first portion of the active region. The method further includes removing the mask, wherein the removing of the mask includes maintaining the dielectric material covering the first portion of the active region. The method further includes forming a gate structure over the active region and over the dielectric material.

Abstract: A package structure including a first redistribution layer, a semiconductor die, through insulator vias, an insulating encapsulant and a second redistribution layer. The first redistribution layer includes a dielectric layer, a conductive layer, and connecting portions electrically connected to the conductive layer. The dielectric layer has first and second surfaces, the connecting portions has a first side, a second side, and sidewalls joining the first side to the second side. The first side of the connecting portions is exposed from and coplanar with the first surface of the dielectric layer. The semiconductor die is disposed on the second surface of the dielectric layer. The through insulator vias are connected to the conductive layer. The insulating encapsulant is disposed on the dielectric layer and encapsulating the semiconductor die and the through insulator vias. The second redistribution layer is disposed on the semiconductor die and over the insulating encapsulant.

Abstract: In an embodiment, a package structure including an electro-optical circuit board, a fanout package disposed over the electro-optical circuit board is provided. The electro-optical circuit board includes an optical waveguide. The fanout package includes a first optical input/output portion, a second optical input/output portion and a plurality of electrical input/output terminals electrically connected to the electro-optical circuit board. The first optical input/output portion is optically coupled to the second optical input/output portion through the optical waveguide of the electro-optical circuit board.