Patents by Inventor An-Yi Chen
An-Yi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250120301Abstract: Provided are organometallic compounds comprising a ligand comprising at least two moieties A and B which are linked by a linking group L2, wherein the ligand is coordinated to a central metal atom M. Also provided are formulations comprising these organometallic compounds. Further provided are organic light emitting devices (OLEDs) and related consumer products that utilize these organometallic compounds.Type: ApplicationFiled: September 16, 2024Publication date: April 10, 2025Applicant: UNIVERSAL DISPLAY CORPORATIONInventors: Hsiao-Fan Chen, Wystan Neil Palmer, Jui-Yi Tsai, Wei-Chun Shih, Zhiqiang Ji
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Publication number: 20250117601Abstract: A computer-implemented method for information processing includes: obtaining text information, in which the text information includes first text information of a resource to be commented on and second text information of a candidate prompt; selecting a target prompt from the candidate prompts based on the text information; and generating comment information of the resource to be commented on, based on the resource to be commented on and the target prompt.Type: ApplicationFiled: December 19, 2024Publication date: April 10, 2025Applicant: BEIJING BAIDU NETCOM SCIENCE TECHNOLOGY CO., LTD.Inventors: Huilin Li, Yi Li, Lunan Zhao, Jie Liu, Li Ma, Tao Li, Tianzhong Hu, Yu Chen, Yongjuan Che, Aowei Li, Hanmeng Liu, Shouke Qin
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Publication number: 20250120139Abstract: A semiconductor device structure includes nanostructures formed over a substrate. The structure also includes a fin isolation structure formed beside the nanostructures. The structure also includes a work function layer surrounding the nanostructures and covering a sidewall of the fin isolation structure. The structure also includes a gate electrode layer covering the work function layer. The gate electrode layer has an extending portion surrounded by the work function layer.Type: ApplicationFiled: December 17, 2024Publication date: April 10, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Fai CHENG, Liang-Yi CHEN, Chi-An WANG, Kuan-Chung CHEN, Chih-Wei LEE
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Publication number: 20250114374Abstract: The disclosure includes compounds of Formulae (1) wherein Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8, Qx, R1, R2, R3, R4, R5, R6, R7, R9, R10, R11, Rx, a, b, c, g, j, k, m, n, u, v, L, Z1, Z2, Z4, and Z5 are defined herein. Also disclosed is a method for treating a neoplastic disease and autoimmune disease with these compounds.Type: ApplicationFiled: December 19, 2022Publication date: April 10, 2025Inventor: Yi Chen
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Publication number: 20250119621Abstract: The disclosure provides a method and an apparatus for generating comment information based on a large model, an electronic device and a storage medium, relates to a technical field of artificial intelligence, and in particular to the technical fields of deep learning, large model, and natural language processing, and the like. The specific technical solution includes: obtaining description information of a resource to be commented on by understanding, based on the large model, the resource to be commented on; obtaining, based on the description information, comment information of the resource to be commented on, in which the comment information includes at least a comment video of the resource to be commented on; and displaying the comment video in a comment section. The intelligent generation of comment videos and texts is realized, improving the accuracy of the comment information, simplifying the comment generation process, and improving the speed of generating comments.Type: ApplicationFiled: December 19, 2024Publication date: April 10, 2025Applicant: BEIJING BAIDU NETCOM SCIENCE TECHNOLOGY CO., LTD.Inventors: Yi Li, Li Ma, Lunan Zhao, Jie Liu, Tianzhong Hu, Huilin Li, Yu Chen, Yongjuan Che, Aowei Li, Tao Li, Hanmeng Liu, Shouke Qin
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Publication number: 20250114473Abstract: Disclosure is a compound with one or more arm(s) for drug conjugation and a conjugate including the compound so as to provide high drug-to-moiety ratio and conjugate more drugs to the conjugate.Type: ApplicationFiled: October 4, 2024Publication date: April 10, 2025Applicant: Formosa Laboratories, Inc.Inventors: ChihHau CHEN, WunHuei LIN, HaoYu HSIEH, JianXun ZHAO, HungYi HSU, ShihHsun SU, ShuoEn TSAI, Yi-Shan LI, TzuHan LIAO, ChienHsun WU, Pohui HUANG, Bao Rong JUO, Yu-Min JUANG, Chao-Yi LI, Yi-Shiuan CHOU, Cheng-Yu CHUNG
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Publication number: 20250118477Abstract: Disclosed are a magnetic core structure and a magnetic component. The magnetic core structure includes N winding columns and two cover plates, and N is a positive integer, wherein each winding column is provided with a first hollow channel, the two cover plates are disposed at two ends of each winding column, each cover plate is provided with N first through holes, the N winding columns are in a one-to-one correspondence with the N first through holes of each cover plate, and the first hollow channel of each winding column is communicated with the first through holes located on two sides thereof and corresponding thereto. Therefore, the channels for air flow can be added, so that the heat dissipation efficiency is improved when the magnetic core structure is applied to the magnetic component.Type: ApplicationFiled: June 18, 2024Publication date: April 10, 2025Inventors: Yi-Wen CHENG, Yen-An CHEN, Cheng-Wei TSENG, De-Jia LU, Chen CHEN, Chao-Lin CHUNG
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Publication number: 20250118690Abstract: A semiconductor package includes: a die having a conductive pad at a first side of the die; and a redistribution structure over the first side of the die and electrically coupled to the die. The redistribution structure includes: a first dielectric layer including a first dielectric material; a first via in the first dielectric layer, where the first via is electrically coupled to the conductive pad of the die; and a first dielectric structure embedded in the first dielectric layer, where the first dielectric structure includes a second dielectric material different from the first dielectric material, where the first dielectric structure laterally surrounds the first via and contacts sidewalls of the first via.Type: ApplicationFiled: October 6, 2023Publication date: April 10, 2025Inventors: Wen-Yi Lin, Kan-Ju Yang, Kai-Cheng Chen, Chien-Li Kuo, Chien-Chen Li
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Publication number: 20250115959Abstract: The present application relates to a method for screening pre-implantation embryos. The screening method includes steps of testing chromosomes and DNA methylation levels of the pre-implantation embryos; and selecting, from the pre-implantation embryos according to the obtained test result, the embryo having normal chromosomes, a DNA methylation level of a target region meeting preset requirements, and a genome-wide DNA methylation level within an interval of about 0.25 to 0.27 or a genome-wide DNA methylation level outside the interval of about 0.25 to 0.27 but close to the interval of about 0.25 to 0.27 relative to other embryos as the embryo to be implanted.Type: ApplicationFiled: November 17, 2022Publication date: April 10, 2025Inventors: Jiang LIU, Zi-jiang CHEN, Yuan GAO, Xuelong YAO, Lizhi YI
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Publication number: 20250117066Abstract: A circuit board includes a platform controller hub (PCH), a peripheral component connector and a switch. The PCH includes a clock request pin and a GPIOB pin. The peripheral component connector includes a connector pin. The switch is controlled by the GPIOB pin and is coupled between a low potential and a line between the connector pin and the clock request pin and is configured to: conduct the line and the low potential based on a high potential of the GPIOB pin; and disconnect the line and the low potential based on the low potential of the GPIOB pin.Type: ApplicationFiled: August 9, 2024Publication date: April 10, 2025Applicant: Acer IncorporatedInventors: Tsung-Mao Chen, Ming-Feng HSIEH, Yuan-Yi Li
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Publication number: 20250116914Abstract: An imaging lens assembly module includes an imaging lens assembly and a variable aperture module. The imaging lens assembly has an optical axis. The variable aperture module includes a light blocking sheet set, a fixed element, a movable element, and an annular light blocking portion. The light blocking sheet set includes at least two light blocking sheets, wherein the at least two light blocking sheets are mutually stacked along a circumferential direction surrounding the optical axis to form a variable aperture opening. The fixed element has a sidewall structure. The annular light blocking portion surrounds the optical axis to form a fixed aperture opening.Type: ApplicationFiled: December 19, 2024Publication date: April 10, 2025Inventors: Heng-Yi SU, Chia-Cheng TSAI, Hao-Jan CHEN, Ming-Ta CHOU
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Patent number: 12271015Abstract: An optical film includes a plurality of alternating first and second polymeric layers, such that the first polymeric layers have a smaller average in-plane index of refraction than the second polymeric layers and the first polymeric layers have a glass transition temperature of at least 107 deg. C. The optical film may be a reflective polarizer. An optical stack includes a linear absorbing polarizer and the reflective polarizer disposed on, and bonded to, the absorbing polarizer. The reflective polarizer has an optical reflectance of at least 60% for a first polarization state and an optical transmittance of at least 60% for an orthogonal second polarization state. When heated at 105 deg. C. for 15 minutes, a difference in shrinkage of the reflective polarizer and the absorbing polarizer along the first and second polarization states is greater than about zero and 0.2%, respectively.Type: GrantFiled: May 20, 2020Date of Patent: April 8, 2025Assignee: 3M INNOVATIVE PROPERTIES COMPANYInventors: Adam D. Haag, Yi-Chen Chen, Tze Yuan Wang, Hiroki Matsuda, Michelle L. Toy, Ryan J. Eismin, John F. VanDerlofske, III, David J. McDaniel, Matthew B. Johnson
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Patent number: 12270807Abstract: A reacting device of dual path synchronous immunochromatographic platform includes a seat, an upper housing, and a fluid dividing funnel. The seat contains two immunochromatographic carriers. The hollow pipe portion has two sloped structures. A force bearing portion of the fluid dividing funnel can be pressed down, so two fluid exits of the fluid dividing funnel move towards these two sloped structures. The specimen drops and is guided into these two immunochromatographic carriers respectively. A reaction result can be observable. The fluid dividing funnel can divide the specimen into two immunochromatographic carriers evenly. The sloped structure can increase the accuracy of specimen supply. Excess specimen can be scraped off for enhancing the solving accuracy. In addition, it can decrease the possibility of false positive problem.Type: GrantFiled: July 4, 2021Date of Patent: April 8, 2025Assignee: TAICHUNG VETERANS GENERAL HOSPITALInventors: Ming-Feng Wu, Hui-Chun Chang, Jing-Lian Jheng, Yi-Yun Hung, Jen-Ying Li, Hui-Chen Chen, Jiunn-Min Wang
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Patent number: 12274087Abstract: A field effect transistor includes a substrate having a transistor forming region thereon; an insulating layer on the substrate; a first graphene layer on the insulating layer within the transistor forming region; an etch stop layer on the first graphene layer within the transistor forming region; a first inter-layer dielectric layer on the etch stop layer; a gate trench recessed into the first inter-layer dielectric layer and the etch stop layer within the transistor forming region; a second graphene layer on interior surface of the gate trench; a gate dielectric layer on the second graphene layer and on the first inter-layer dielectric layer; and a gate electrode on the gate dielectric layer within the gate trench.Type: GrantFiled: November 21, 2022Date of Patent: April 8, 2025Assignee: UNITED MICROELECTRONICS CORP.Inventors: Kuo-Chih Lai, Shih-Min Chou, Nien-Ting Ho, Wei-Ming Hsiao, Li-Han Chen, Szu-Yao Yu, Chung-Yi Chiu
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Patent number: 12272554Abstract: A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers.Type: GrantFiled: July 27, 2023Date of Patent: April 8, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jia-Lin Wei, Ming-Hui Weng, Chih-Cheng Liu, Yi-Chen Kuo, Yen-Yu Chen, Yahru Cheng, Jr-Hung Li, Ching-Yu Chang, Tze-Liang Lee, Chi-Ming Yang
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Patent number: 12272886Abstract: An antenna device includes a differential-line, a first metal and a second metal. The differential-line includes a first line and a second line. The first metal and second metal are coupled to the first line and second line respectively. The first metal and second metal have different shapes and/or different sizes. The first metal and second metal form symmetric or asymmetric dipole. The first metal and second metal can be disposed on the same plane or different planes, can be electrically insulated and can have a first slot and a second slot respectively. The antenna device can further include a base coupled to the first line and second line. The base can be a daughter board having a front-end module or not. The IC package in daughter board can have different sizes. The daughter board can be offset by different distances and can be coupled to a mother board.Type: GrantFiled: September 27, 2022Date of Patent: April 8, 2025Assignee: IWAVENOLOGY CO., LTD.Inventors: Chong-Yi Liou, Wei-Ting Tsai, Jin-Feng Neo, Zheng-An Peng, Tsu-Yu Lo, Zhi-Yao Hong, Tso-An Shang, Je-Yao Chang, Chien-Bang Chen, Shih-Ping Huang, Shau-Gang Mao
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Patent number: 12271116Abstract: Integrated circuits and methods for overlap measure are provided. In an embodiment, an integrated circuit includes a plurality of functional cells including at least one gap disposed adjacent to at least one functional cell of the plurality of functional cells and a first overlay test pattern cell disposed within the at least one gap, wherein the first overlay test pattern cell includes a first number of patterns disposed along a first direction at a first pitch. The first pitch is smaller than a smallest wavelength on a full spectrum of humanly visible lights.Type: GrantFiled: July 24, 2023Date of Patent: April 8, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Tseng Chin Lo, Bo-Sen Chang, Yueh-Yi Chen, Chih-Ting Sun, Ying-Jung Chen, Kung-Cheng Lin, Meng Lin Chang
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Patent number: 12272928Abstract: An optical transmission module includes a housing having a cavity therein and an optical transmission device encapsulated in the cavity. The optical transmission device includes an optical waveguide substrate, laser assemblies, an optical multiplexing assembly and main waveguides. The optical waveguide substrate includes a surface and a first reflection inclined surface having an acute angle therebetween. The laser assemblies are disposed on the surface of the optical waveguide substrate, and are configured to emit laser beams towards the surface of the optical waveguide substrate. The optical multiplexing assembly is disposed in the optical waveguide substrate, and is configured to combine the laser beams into a laser beam. The main waveguides are disposed inside the optical waveguide substrate, light inlet ends of the main waveguides face the first inclined surface, and light outlet ends of the main waveguides are communicated with the optical multiplexing assembly.Type: GrantFiled: March 31, 2021Date of Patent: April 8, 2025Assignee: HISENSE BROADBAND MULTIMEDIA TECHNOLOGIES CO., LTD.Inventors: Yi Tang, Jinlei Chen, Feng Cui, Yifan Xie, Qinhao Fu, Lin Yu
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Patent number: 12271113Abstract: Method of manufacturing semiconductor device includes forming photoresist layer over substrate. Forming photoresist layer includes combining first precursor and second precursor in vapor state to form photoresist material, wherein first precursor is organometallic having formula: MaRbXc, where M at least one of Sn, Bi, Sb, In, Te, Ti, Zr, Hf, V, Co, Mo, W, Al, Ga, Si, Ge, P, As, Y, La, Ce, Lu; R is substituted or unsubstituted alkyl, alkenyl, carboxylate group; X is halide or sulfonate group; and 1?a?2, b?1, c?1, and b+c?5. Second precursor is at least one of an amine, a borane, a phosphine. Forming photoresist layer includes depositing photoresist material over the substrate. The photoresist layer is selectively exposed to actinic radiation to form latent pattern, and the latent pattern is developed by applying developer to selectively exposed photoresist layer to form pattern.Type: GrantFiled: January 15, 2021Date of Patent: April 8, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Cheng Liu, Yi-Chen Kuo, Jia-Lin Wei, Ming-Hui Weng, Yen-Yu Chen, Jr-Hung Li, Yahru Cheng, Chi-Ming Yang, Tze-Liang Lee, Ching-Yu Chang
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Patent number: 12274070Abstract: A memory device and a manufacturing method thereof is described. The memory device includes a transistor structure over a substrate and a ferroelectric capacitor structure electrically connected with the transistor structure. The ferroelectric capacitor structure includes a top electrode layer, a bottom electrode layer and a ferroelectric stack sandwiched there-between. The ferroelectric stack includes a first ferroelectric layer, a first stabilizing layer, and one of a second ferroelectric layer or a second stabilizing layer. Materials of the first stabilizing layer and a second stabilizing layer include a metal oxide material.Type: GrantFiled: July 4, 2022Date of Patent: April 8, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Ting Lin, Wei-Chih Wen, Kai-Wen Cheng, Wu-Wei Tsai, Yu-Ming Hsiang, Yan-Yi Chen, Hai-Ching Chen, Yu-Ming Lin, Chung-Te Lin