Patents by Inventor An-Yu Hsieh

An-Yu Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105720
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a patterned mask on the second region; and performing a process to enlarge the first fin-shaped structure so that the top surfaces of the first fin-shaped structure and the second fin-shaped structure are different.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 28, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • Patent number: 11942464
    Abstract: In an embodiment, a method includes: aligning a first package component with a second package component, the first package component having a first region and a second region, the first region including a first conductive connector, the second region including a second conductive connector; performing a first laser shot on a first portion of a top surface of the first package component, the first laser shot reflowing the first conductive connector of the first region, the first portion of the top surface of the first package component completely overlapping the first region; and after performing the first laser shot, performing a second laser shot on a second portion of the top surface of the first package component, the second laser shot reflowing the second conductive connector of the second region, the second portion of the top surface of the first package component completely overlapping the second region.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Hsiu-Jen Lin, Wei-Yu Chen, Philip Yu-Shuan Chung, Chia-Shen Cheng, Kuei-Wei Huang, Ching-Hua Hsieh, Chung-Shi Liu, Chen-Hua Yu
  • Patent number: 11939664
    Abstract: A semiconductor process system includes a process chamber. The process chamber includes a wafer support configured to support a wafer. The system includes a bell jar configured to be positioned over the wafer during a semiconductor process. The interior surface of the bell jar is coated with a rough coating. The rough coating can include zirconium.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Meng-Chun Hsieh, Tsung-Yu Tsai, Hsing-Yuan Huang, Chih-Chang Wu, Szu-Hua Wu, Chin-Szu Lee
  • Patent number: 11941157
    Abstract: A computer implemented method for managing the scope of permissions granted by users to application that includes collecting a set of permissions for an application from an application provider publication; and collecting a process flow for functional steps of the application from a review of the application that is published on a product review type publication. The computer implemented method further includes dividing the functional steps of the application into a plurality of journeys, each of said plurality of journeys having a function associated with a stage of a functional step from a perspective of a user; and matching permissions from the set of permissions for each journey of said plurality of journeys to provide matched permissible permissions to journeys stored in a customer journey store.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: March 26, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hao Chun Hung, Po-Cheng Chiu, Tsai-Hsuan Hsieh, Cheng-Lun Yang, Chiwen Chang, Shin Yu Wey
  • Patent number: 11942130
    Abstract: A bottom-pinned spin-orbit torque magnetic random access memory (SOT-MRAM) is provided in the present invention, including a substrate, a bottom electrode layer on the substrate, a magnetic tunnel junction (MTJ) on the bottom electrode layer, a spin-orbit torque (SOT) layer on the MTJ, a capping layer on the SOT layer, and an injection layer on the capping layer, wherein the injection layer is divided into individual first part and second part, and the first part and the second part are connected respectively with two ends of the capping layer.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: March 26, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Jian-Jhong Chen, Yi-Ting Wu, Jen-Yu Wang, Cheng-Tung Huang, Po-Chun Yang, Yung-Ching Hsieh
  • Publication number: 20240096623
    Abstract: A method of manufacturing a semiconductor device includes forming a first layer comprising an organic material over a substrate. A second layer is formed over the first layer, wherein the second layer includes a silicon-containing material and one or more selected from the group consisting of a photoacid generator, an actinic radiation absorbing additive including an iodine substituent, and a silicon-containing monomer having iodine or phenol group substituents. A photosensitive layer is formed over the second layer, and the photosensitive layer is patterned.
    Type: Application
    Filed: March 17, 2023
    Publication date: March 21, 2024
    Inventors: Chieh-Hsin HSIEH, Wei-Han LAI, Ching-Yu CHANG
  • Publication number: 20240094571
    Abstract: A light-emitting device is provided. The light-emitting device includes a display panel including a substrate and a plurality of scan lines disposed on the substrate and extending in a first direction, a backlight module disposed under the display panel, and an optical film disposed above the backlight module and including a plurality of light-blocking portions and a plurality of light-transmission portions which are arranged alternately. The light blocking portions extend in a second direction, and the first direction and the second direction are not parallel.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 21, 2024
    Inventors: Hong-Sheng HSIEH, Hao-Yu CHEN
  • Publication number: 20240088062
    Abstract: A package structure includes a die, an encapsulant laterally encapsulating the die, a warpage control material disposed over the die, and a protection material disposed over the encapsulant and around the warpage control material. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.
    Type: Application
    Filed: November 23, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Ching-Hua Hsieh, Hsiu-Jen Lin, Wei-Yu Chen, Chia-Shen Cheng, Chih-Chiang Tsao, Jen-Jui Yu, Cheng-Shiuan Wong
  • Patent number: 11929319
    Abstract: Integrated fan-out packages and methods of forming the same are disclosed. An integrated fan-out package includes two dies, an encapsulant, a first metal line and a plurality of dummy vias. The encapsulant is disposed between the two dies. The first metal line is disposed over the two dies and the encapsulant, and electrically connected to the two dies. The plurality of dummy vias is disposed over the encapsulant and aside the first metal line.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Yu Huang, Han-Ping Pu, Ming-Kai Liu, Ting-Chu Ko, Yung-Ping Chiang, Chang-Wen Huang, Yu-Sheng Hsieh
  • Publication number: 20240072413
    Abstract: An electronic device is provided. The electronic device includes an antenna array including a plurality of antenna patterns collectively configured to provide a scan-angle coverage. Each of the antenna patterns includes a curved surface.
    Type: Application
    Filed: August 24, 2022
    Publication date: February 29, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yu HO, Meng-Wei HSIEH, Chih-Pin HUNG
  • Patent number: 11915994
    Abstract: A package structure is provided. The package structure includes a semiconductor die and a thermoelectric structure disposed on the semiconductor die. The thermoelectric structure includes P-type semiconductor blocks, N-type semiconductor blocks and metal pads. The P-type semiconductor blocks and the N-type semiconductor blocks are arranged in alternation with the metal pads connecting the P-type semiconductor blocks and the N-type semiconductor blocks. When a current flowing through one of the N-type semiconductor block, one of the metal pad, and one of the P-type semiconductor block in order, the metal pad between the N-type semiconductor block and the P-type semiconductor block forms a cold junction which absorbs heat generated by the semiconductor die.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Yen Hsieh, Chih-Horng Chang, Chung-Yu Lu
  • Patent number: 11914301
    Abstract: A photoresist includes a polymer and a photoactive compound. The photoactive compound contains a sensitizer component. The photoactive compound contains an acid generator or a base molecular. The acid generator or the base molecular bonds the sensitizer component. The photoactive compound is within a polymer backbone. The sensitizer component is configured to absorb an EUV light to produce electrons.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chieh-Hsin Hsieh, Wei-Han Lai, Ching-Yu Chang
  • Publication number: 20240047497
    Abstract: An image sensor includes a semiconductor substrate having a first surface and a second surface opposite to the first surface in a vertical direction, a first isolation structure disposed in the semiconductor substrate for defining pixel regions, a visible light detection structure, an infrared light detection structure, and a reflective layer. The visible light detection structure and the infrared light detection structure are disposed within the same pixel region. The visible light detection structure includes a first portion disposed between the second surface and the infrared light detection structure in the vertical direction and a second portion disposed between the infrared light detection structure and the first isolation structure in a horizontal direction. The infrared light detection structure is disposed between the reflective layer and the first portion in the vertical direction. The second portion is not sandwiched between the reflective layer and the second surface in the vertical direction.
    Type: Application
    Filed: October 16, 2023
    Publication date: February 8, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventor: Cheng-Yu Hsieh
  • Publication number: 20240022226
    Abstract: Systems and methods for generating a radio frequency (RF) signal by a digital-to-analog converter (DAC) with transmission frequency within a wide transmission frequency range is described. An output reactance of the DAC coupled (directly or indirectly) to one or more antennas corresponds to the transmission frequency of the RF signals. Multiple embodiments of the DAC are described to include circuitry for tuning the output reactance of the DAC, and therefore, shifting a center frequency to select a transmission frequency range (from multiple transmission frequency ranges) for providing the RF signals.
    Type: Application
    Filed: July 13, 2022
    Publication date: January 18, 2024
    Inventors: Alfred Erik Raidl, Antonio Passamani, Chia-Yu Hsieh
  • Publication number: 20240021474
    Abstract: A method of forming a semiconductor device includes forming a source/drain region on a substrate and forming a first interlayer dielectric (ILD) layer over the source/drain region. The method further includes forming a second ILD layer over the first ILD layer, forming a source/drain contact structure within the first ILD layer and the second ILD layer, and selectively removing a portion of the source/drain contact structure to form a concave top surface of the source/drain contact structure.
    Type: Application
    Filed: July 31, 2023
    Publication date: January 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Co., Lid.
    Inventors: Yun-Yu HSIEH, Ying Ting HSIA, Jeng Chang HER, Cha-Hsin CHAO, Yi-Wei CHIU, Li-Te HSU
  • Publication number: 20240006587
    Abstract: The present invention discloses a lead-acid battery electrode plate for preventing lead-acid battery from lead (II) sulfate crystal growth piercing and enhancing the battery formation efficiency. The lead-acid battery electrode plate comprises an electricity collector layer as an electric current channel, and two air permeable layers respectively placed on both sides of the electricity collector layer, wherein non-metallic sheet materials having porous structures are used as air-permeable channel of the air-permeable layers, and the first air-permeable layer is the same as or different from the second air-permeable layer.
    Type: Application
    Filed: June 28, 2023
    Publication date: January 4, 2024
    Inventors: SHU-HUEI HSIEH, Hual-Jen WU, Chu-Ting HSIEH, Cun-Hao XIAO, You-Cheng LIN, Zhi-Xuan YAN, Jyun-Wel LIN, Chia-Yu HSIEH, Bo-Jun LIU, Shang-Rong LI
  • Patent number: 11851562
    Abstract: A resin composition includes a polyphenylene ether resin of Formula (1) and an additive. The additive may include maleimide resin, unsaturated C?C double bond-containing crosslinking agent, polyolefin, flame retardant, filler, curing accelerator, or a combination thereof. An article is made from the resin composition. The article includes a prepreg, a resin film, a laminate or a printed circuit board and achieves improvements in one or more properties including comparative tracking index, breakdown voltage, dissipation factor and copper foil peeling strength.
    Type: Grant
    Filed: March 17, 2022
    Date of Patent: December 26, 2023
    Assignee: ELITE ELECTRONIC MATERIAL (KUNSHAN) CO., LTD.
    Inventors: Rongtao Wang, Zhenfang Shang, Ningning Jia, Chen-Yu Hsieh
  • Patent number: 11832754
    Abstract: A lid structure, which is used for covering an opening of a container, includes a mainbody, an elastic annular element, and a covering assembly. The mainbody includes a through hole. The elastic annular element is integrally disposed on a peripheral region of the mainbody, wherein the elastic annular element is used for positioning the lid structure on the opening. The covering assembly is disposed on the mainbody and includes a spacer element and a covering element. The spacer element is disposed on and covers the through hole. The spacer element includes a plurality of drain holes and a central connecting portion. The covering element is deformably disposed on the central connecting portion.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: December 5, 2023
    Assignee: CHANG YANG MATERIAL CO., LTD.
    Inventors: Ming Hua Huang, Lung Hsun Song, Yun Ju Wu, Hung Yu Hsieh, Lin Chun Sun
  • Patent number: 11824463
    Abstract: A multiple output voltage generator includes a voltage divider and first and second voltage converters. The voltage divider receives a power voltage and divides the power voltage to generate a first output voltage. The first and second voltage converters are coupled to the voltage divider in parallel. The first voltage converter and the second voltage converter converting the first output voltage to respectively generate a second output voltage and a third output voltage.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: November 21, 2023
    Assignee: Novatek Microelectronics Corp.
    Inventor: Chun-Yu Hsieh
  • Patent number: 11807756
    Abstract: A resin composition includes: (A) 100 parts by weight of a thermosetting resin, which includes a vinyl-containing polyphenylene ether resin, a maleimide resin, or a combination thereof; (B) 15 parts by weight to 50 parts by weight of a sintered body formed by aluminum nitride and boron nitride; and (C) 180 parts by weight to 280 parts by weight of titanium dioxide. Moreover, an article may be made from the resin composition, including a prepreg, a resin film, a laminate or a printed circuit board.
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: November 7, 2023
    Assignee: ELITE MATERIAL CO., LTD.
    Inventors: Yi-Fei Yu, Ching-Huan Lee, Chen-Yu Hsieh