Abstract: A setup method of a display device includes the following steps. A remote control device transmits a setting command to a smart device through a transmission interface. The smart device converts the setting command into a display setting command. The smart device transmits the display setting command to the display device, in which a first connector of the smart device is physically connected to a second connector of the display device. The display device correspondingly performs a firmware update operation or correspondingly adjusts at least one parameter of the display device according to the display setting command.

Abstract: A semiconductor device structure and methods of forming the same are described. The structure includes a gate dielectric layer disposed over a substrate, a gate electrode layer disposed over the gate dielectric layer, and a first gate spacer disposed adjacent the gate dielectric layer. The first gate spacer includes an inner surface facing the gate dielectric layer and an outer surface opposite the inner surface, and the first gate spacer includes a fluorine concentration that decreases from the inner surface and the outer surface towards a center of the first gate spacer. The structure further includes a second gate spacer disposed on the outer surface of the first gate spacer, and the second gate spacer includes a fluorine concentration that decreases from an outer surface towards an inner surface.

Abstract: A novel rheology modifier which comprises a quaternary ammonium containing polyamide for use in aqueous paint, and that can provide excellent pigment suspension and rheological properties to the aqueous based coating without being affected by pH fluctuation.

Abstract: A method for diagnosing a reason of a malfunction is provided. The method includes: receiving a signal to be diagnosed; decomposing the signal to be diagnosed into a plurality of sub-signals; transforming each of the plurality of sub-signals into a corresponding grayscale image; and inputting the corresponding grayscale images to a neural network model, and outputting a malfunction reason classification result through the neural network model. Accordingly, the method can be used for diagnosing the reason of the malfunction and solves the problem of incapable of diagnosing the reason of the malfunction. In addition, a device and a computer-readable recording medium for diagnosing the reason of the malfunction are also provided.

Abstract: A memory device includes a semiconductor substrate having an active region, and a word line extending across the active region. The memory device also includes a first source/drain region and a second source/drain region disposed in the active region and on opposite sides of the word line. The memory device further includes a bit line contact disposed over and electrically connected to the first source/drain region. The bit line contact has a tapered profile. In addition, the memory device includes a capacitor contact disposed over and electrically connected to the second source/drain region.

Abstract: A memory device includes a semiconductor substrate having an active region, and a word line extending across the active region. The memory device also includes a first source/drain region and a second source/drain region disposed in the active region and on opposite sides of the word line. The memory device further includes a bit line contact disposed over and electrically connected to the first source/drain region. The bit line contact has a tapered profile. In addition, the memory device includes a capacitor contact disposed over and electrically connected to the second source/drain region.

Abstract: A semiconductor device includes a substrate, a bit line structure formed over and protruding from the substrate, a spacer structure formed on and extending along sidewall of the bit line structure, and a landing pad disposed on the bit line structure and covering the slope. The spacer structure includes a first segment near a top of the spacer structure with a slope and a second segment beneath the first segment. A first segment consists of a first spacer layer contacting the bit line structure and a third spacer layer contacting the first spacer layer. A second segment consists of the first spacer layer contacting the bit line structure, a second spacer layer contacting the first spacer layer, and the third spacer layer contacting the second spacer layer, and the second segment is capped with the first segment.

Abstract: A fluid immersion cooling system has a fluid tank containing a hydrocarbon dielectric fluid as a coolant fluid. One or more components of an electronic system is immersed in the coolant fluid. A gas cylinder contains a non-flammable, compressed filling gas. The temperature of the coolant fluid is monitored during operation of the electronic system. The filling gas is released from the gas cylinder and into the fluid tank when the temperature of the coolant fluid rises to a trigger temperature that is set based on the flash point of the coolant fluid. The filling gas covers a surface of the coolant fluid to block oxygen from interacting with vapors of the coolant fluid to prevent combustion.

Abstract: The present disclosure relates to medical implant components comprising a biocompatible protective coating layer (BPCL) and a process of making the BPCL and medical implant components.

Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate; a drain positioned in the substrate; a top dielectric layer positioned on the substrate; a cell contact structure including a cell contact bottom conductive layer positioned in the top dielectric layer and on the drain, a cell contact top conductive layer positioned in the top dielectric layer and on the cell contact bottom conductive layer, and a cell contact top sealing layer positioned in the top dielectric layer, on the cell contact bottom conductive layer, and surrounding the cell contact top conductive layer; and a first air gap positioned in the top dielectric layer and surrounding the cell contact bottom conductive layer.

Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate; a drain positioned in the substrate; a top dielectric layer positioned on the substrate; a cell contact structure including a cell contact bottom conductive layer positioned in the top dielectric layer and on the drain, a cell contact top conductive layer positioned in the top dielectric layer and on the cell contact bottom conductive layer, and a cell contact top sealing layer positioned in the top dielectric layer, on the cell contact bottom conductive layer, and surrounding the cell contact top conductive layer; and a first air gap positioned in the top dielectric layer and surrounding the cell contact bottom conductive layer.

Abstract: A method for performing trench filling includes: patterning a base structure to form a plurality of trenches in the patterned base structure; depositing a trench filling material over the patterned base structure to fill the trenches; performing an annealing process at a temperature not greater than 550° C. to anneal the trench filling material; and performing a plasma radical treatment at a temperature not greater than 500° C. to treat the trench filling material.

Abstract: The invention provides a light-emitting diode including a plurality of P-type and N-type diode structures, an upper electrode, and a fusion junction. Each of the P-type and N-type diode structures includes a first conductive semiconductor, an active region and a second conductive semiconductor stacked vertically, and the plurality of P-type and N-type diode structures are stacked vertically to form a light emitter. The upper electrode is formed on the light emitter. The fusion junction is located between two of the plurality of P-type and N-type diode structures and formed by fusing the first conductive semiconductor of one of the P-type and N-type diode structure and the second conductive semiconductor of the adjacent P-type and N-type diode structure. The fusion junction includes a non-conductive fusion portion and a plurality of conductive fusion portions dispersed in the non-conductive fusion portion excluding a designated area of the non-conductive fusion portion.

Abstract: A semiconductor structure includes a semiconductor substrate and an isolation structure disposed in the semiconductor substrate, wherein the isolation structure includes a first dielectric layer in contact with the semiconductor substrate and a second dielectric layer over the first dielectric layer, wherein the first dielectric layer is between the second dielectric layer and the semiconductor substrate, the first dielectric layer comprises a bottom portion and a sidewall portion, and a thickness of the bottom portion is greater than a thickness of the sidewall portion, wherein the first dielectric layer and the second dielectric layer comprise different materials, and wherein the first dielectric layer comprises a nitride of a semiconductor material.

Abstract: A package structure includes a supporting base, conductive pillars, a first semiconductor die, a second semiconductor die, a first adhesive material, a second adhesive material and an isolation structure. The conductive pillars are disposed in the supporting base, and protruding out from a top surface of the supporting base. The second semiconductor die is adjacent to the first semiconductor die, wherein the first and second semiconductor dies are disposed on the supporting base and electrically connected to the conductive pillars. The first adhesive material is disposed in between the first semiconductor die and the top surface of the supporting base, and partially covering the conductive pillars. The second adhesive material is disposed in between the second semiconductor die and the top surface of the supporting base, and partially covering the conductive pillars. The isolation structure prevents a bleeding of the first and second adhesive material to an adjacent semiconductor die.

Abstract: A semiconductor device includes a substrate, a plurality of active structures, a trench, a lower epitaxy, an upper epitaxy and a bottom barrier portion. The active structures are formed on the substrate and arranged in a first direction. The trench passes through adjacent two of the active structures in a second direction and has a bottom recess. The lower epitaxy is formed on a lower portion of the trench. The upper epitaxy is formed on an upper portion of the trench and separated from the lower epitaxy. The bottom barrier portion is formed on the bottom recess and separates the substrate and the lower epitaxy.

Abstract: A method of fabricating the semiconductor device includes forming a bit line structure over a substrate, forming a spacer structure on a sidewall of the bit line structure, partially removing an upper portion of the spacer structure to form a slope on the spacer structure slanting to the bit line structure, forming a landing pad material to cover the spacer structure and contact the slope, and removing at least a portion of the landing pad material to form a landing pad against the slope.

Abstract: A non-intrusive detection method for detecting at least one pop-up window button of the pop-up window includes the following steps: retrieving a screen image on a display device; comparing the screen image with a preset screen image and generating a differential image area according the screen image and the preset screen image; determining the differential image area as the pop-up window when the differential image area is greater than an image area threshold value; selecting a plurality of contour lengths of the pop-up window matching up with a contour length threshold value by Canny edge detector; and analyzing the contour lengths according to Douglas-Peucker algorithm and an amount of endpoints to generate a contour edge corresponding to the pop-up window button.

Abstract: The present invention provides a catalyst structure for oxidizing hydrogen in the air, comprising: a base and a catalyst layer, wherein the base comprises a first surface, the catalyst layer is disposed on the first surface of the base, and the catalyst layer comprises: a carbon carrier, multiple catalyst particles, and a fluorinated polymer; wherein the multiple catalyst particles are disposed on a surface of the carbon carrier, and the carbon carrier adheres to the first surface through the fluorinated polymer. The present invention further provides a device for oxidizing hydrogen, comprising: the catalyst structure and a shell, and the shell comprises an accommodation space, a first air flow part and a second air flow part in gas communication with each other; wherein the catalyst structure is disposed in the accommodation space and is between the first air flow part and the second air flow part.

Abstract: In an embodiment, a method includes: forming a sacrificial spacer in a contact opening, the contact opening exposing a source/drain region; depositing a spacer layer on a sidewall of the sacrificial spacer and on a top surface of the source/drain region; forming a protective dielectric on the spacer layer and in the contact opening; removing the sacrificial spacer to form a recess adjacent the spacer layer; and forming a dielectric cap in an upper portion of the recess by redepositing a material of the protective dielectric and a material of the spacer layer in the upper portion of the recess, the dielectric cap sealing a lower portion of the recess to form a void.