Patents by Inventor An YU

An YU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12290964
    Abstract: A 3D-configured production structure of rubber products based on an intelligent manufacturing unit and a production method thereof. The structure includes a stereoscopic production warehouse used to store a mobile intelligent manufacturing unit and an ex-warehouse delivery system used to deliver the mobile intelligent manufacturing unit. The mobile intelligent manufacturing unit includes a unit functional assembly, a molding vulcanization apparatus, a blank feeder, a material-delivering apparatus, a product-collecting apparatus and a reclaimer. The molding vulcanization apparatus includes a upper heat plate, a upper mold, a lower mold, a lower heat plate and a support post. The upper mold and the lower mold are arranged on the inner sides of the upper heat plate and the lower heat plate, respectively. The upper heat plate is fixed on one end of the support post, and the lower heat plate is arranged through the support post.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: May 6, 2025
    Assignee: CHENGDU HOLY AVIATION SCIENCE TECHNOLOGY CO., LTD.
    Inventors: Jie Zhong, Aimin Zeng, Xiaofeng Zhang, Liang Wang, Xuegang Wu, Qun Zhou, Zanping Zhang, Chen Han, Yu Liu, Zhipeng Li, Gaosheng Guo, Rongqian Mo, Yue Fei
  • Patent number: 12291771
    Abstract: A mask module includes a framework, a first strip plate fixed on the framework and extending along a first direction, and a first mask. The first mask is located on a side, deviating from the framework, of the first strip plate. The first mask includes at least one preset area, and the preset area includes at least one opening area. The first strip plate is provided with a first concave-convex structure on one side edge along the first direction. At least one convex structure is provided in a middle of the first concave-convex structure along the first direction. In a direction perpendicular to a surface of the first mask, the first concave-convex structure and the convex structure cover at least a part of area of the at least one opening of the preset area. The convex structure and the first strip plate are integrally formed.
    Type: Grant
    Filed: November 30, 2023
    Date of Patent: May 6, 2025
    Assignees: Wuhan Tianma Micro-Electronics Co., Ltd., Wuhan Tianma Micro-Electronics Co., Ltd. Shanghai Branch
    Inventors: Naichao Mu, Yuan Li, Yu Xin, Jun Ma, Lijing Han
  • Patent number: 12292636
    Abstract: Embodiments of the present disclosure provide a display panel, a manufacturing method therefor, and a display apparatus. The display panel includes a first substrate and a second substrate which are aligned, liquid crystals are filled between the first substrate and the second substrate, the first substrate and the second substrate which are aligned have a display region and a peripheral region surrounding the display region, the peripheral region is provided with a frame sealing adhesive located between the first substrate and the second substrate and surrounding the display region, and the frame sealing adhesive is configured to seal the liquid crystals.
    Type: Grant
    Filed: March 26, 2024
    Date of Patent: May 6, 2025
    Assignees: Beijing BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xian Wang, Yong Zhang, Hongjun Yu, Longhu Hao, Ce Wang, Haoran Zhang, Yashuai An, Yang Ge, Lei Shi, Xingxing Guan, Jianwei Ma
  • Patent number: 12295145
    Abstract: In an embodiment, a semiconductor device includes a first dielectric layer over a substrate and a first access transistor and a second access transistor in a memory cell of a memory array, the first access transistor and the second access transistor each including a bottom electrode in the first dielectric layer, a conductive gate in a second dielectric layer, where the second dielectric layer is over the bottom electrode and the first dielectric layer, a channel region extending through the conductive gate to contact the bottom electrode, and a top electrode over the channel region.
    Type: Grant
    Filed: August 9, 2023
    Date of Patent: May 6, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chenchen Jacob Wang, Sai-Hooi Yeong, Yu-Ming Lin, Chi On Chui
  • Patent number: 12294734
    Abstract: An electronic apparatus performs a method of coding video data. The method includes receiving, from a bitstream of the video data, a first syntax that indicates an affine motion model enabled for a current coding block, estimating parameters of the affine motion model using gradients of motion vectors of multiple spatial neighboring blocks of the current coding block, and constructing motion vectors of the affine motion model for the current coding block by using the estimated parameters. In some embodiments, constructing motion vectors further includes converting the estimated parameters into control point motion vectors (CPMVs), and adding the CPMVs into a current affine merge candidate list. In some embodiments, constructing motion vectors further includes deriving a motion vector predictor for an affine mode.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: May 6, 2025
    Assignee: BEIJING DAJIA INTERNET INFORMATION TECHNOLOGY CO., LTD.
    Inventors: Wei Chen, Xiaoyu Xiu, Yi-Wen Chen, Tsung-Chuan Ma, Hong-Jheng Jhu, Xianglin Wang, Bing Yu
  • Patent number: 12294158
    Abstract: An electronic device includes an antenna unit having an antenna body having a feed point and a ground point between a first end and a second end. The antenna body has an operating band with a resonance of a first wavelength. An electrical length of the antenna body from the feed point to the ground point is greater than or equal to ¼ and less than ½ of the first wavelength. An electrical length from the first end to the feed point is greater than or equal to ? and less than or equal to ¼ of the first wavelength. An electrical length from the second end to the ground point is greater than or equal to ? and less than or equal to ¼ of the first wavelength. The antenna body is adapted to operate in a slot mode and in a wire mode.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: May 6, 2025
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Jiaming Wang, Liang Xue, Dong Yu, Jikang Wang, Jiaqing You, Yiwen Gong, Fangchao Zhao
  • Patent number: 12293941
    Abstract: A gallium nitride (GaN) device with field plate structure, including a substrate, a gate on the substrate and a passivation layer covering on the gate, a source and a drain on the substrate and the passivation layer, a stop layer on the source, the drain and the passivation layer, and dual-damascene interconnects connecting respectively with the source and the drain, wherein the dual-damascene interconnect is provided with a via portion under the stop layer and a trench portion on the stop layer, and the via portion is connected with the source or the drain, and the trench portion of one of the dual-damascene interconnects extends horizontally toward the drain and overlaps the gate below in vertical direction, thereby functioning as a field plate structure for the GaN device.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: May 6, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Da-Jun Lin, Fu-Yu Tsai, Bin-Siang Tsai, Chung-Yi Chiu
  • Patent number: 12294729
    Abstract: A non-transitory medium of a device that stores one or more instructions is provided. The instructions, when executed by a processing unit of the device, cause the device to: determine an affine enabled flag corresponding to one or more image frames from the bitstream; determine a maximum index corresponding to the one or more image frames from the bitstream when the affine enabled flag is true; determine that a maximum number of zero or more subblock-based merging motion vector prediction (MVP) candidates is in a number range of 1 to N and generated by subtracting the index value of the maximum index from N when the affine enabled flag is true and K is 1, N being a first integer and K being a second integer less than N; and reconstruct the one or more image frames based on the maximum number of zero or more subblock-based merging MVP candidates.
    Type: Grant
    Filed: April 1, 2024
    Date of Patent: May 6, 2025
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yu-Chiao Yang, Chih-Yu Teng
  • Patent number: 12292624
    Abstract: An optoelectronic device comprising an optical waveguide formed in a silicon device layer of a silicon-on-insulator wafer. The optical waveguide including a semiconductor junction comprising a first doped region of semiconductor material and a second doped region of semiconductor material. The second doped region containing dopants of a different species to the first doped region. A first portion of the first doped region extends horizontally on top of the second doped region, a second portion of the first doped region extends vertically along a lateral side of the second doped region and a third portion of the first doped region protrudes as a salient from the first or second portion of the first doped region into the second doped region.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: May 6, 2025
    Assignee: Rockley Photonics Limited
    Inventor: Guomin Yu
  • Patent number: 12295107
    Abstract: A method for manufacturing an electronic device is disclosed. The electronic device has a first region and a transparent region. The method includes the steps of providing a flexible substrate, forming an electric circuit layer on the flexible substrate at an elevated temperature, forming an opening in the transparent region after forming the electric circuit layer, wherein the opening penetrates through a portion of the electric circuit layer, and forming a filling layer on the flexible substrate after forming the opening, wherein at least a part of the filling layer is formed in the opening to enhance a transmittance of the transparent region.
    Type: Grant
    Filed: April 2, 2024
    Date of Patent: May 6, 2025
    Assignee: InnoLux Corporation
    Inventors: Yu-Chia Huang, Kuan-Feng Lee, Tsung-Han Tsai
  • Patent number: 12294156
    Abstract: An antenna device includes a substrate and four antenna units. The four antenna units are disposed on the substrate. Each of the four antenna units includes an L-shaped radiation portion, a hook-shaped coupling portion and a ground portion. The hook-shaped coupling portion is adjacent to the L-shaped radiation portion. The ground portion is disposed around the L-shaped radiation portion and the hook-shaped coupling portion. One end of the hook-shaped coupling portion is connected to the ground portion.
    Type: Grant
    Filed: June 5, 2023
    Date of Patent: May 6, 2025
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Hsin-Hung Lin, Yu Shu Tai, Wei-Chen Cheng
  • Patent number: 12291567
    Abstract: Disclosed herein are anti-GM-CSF antibodies capable of binding to human GM-CSF and blocking its biological activities. Also provided herein are pharmaceutical compositions comprising the anti-GM-CSF antibodies and therapeutic and diagnostic uses of such antibodies.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: May 6, 2025
    Assignee: Elixiron Immunotherapeutics (Hong Kong) Limited
    Inventors: Cheng-Lun Ku, Yu-Fang Lo, Han-Po Shih, Jing-Ya Ding, Pei-Han Chung, Yin-Ping Wang
  • Patent number: 12294028
    Abstract: A method of manufacturing a semiconductor device includes at least the following steps. A protrusion is formed in a substrate by an anisotropic etch process, wherein a sidewall of the protrusion is inclined. A recess is formed on the sidewall of the protrusion by an isotropic etch process, wherein during the isotropic etch process, a by-product covers a first portion of the sidewall of the protrusion while exposing a second portion of the sidewall of the protrusion, so that the recess is formed between the first portion and the second portion of the sidewall.
    Type: Grant
    Filed: October 25, 2023
    Date of Patent: May 6, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiun-Ming Kuo, Hsin-Chih Chen, Che-Yuan Hsu, Kuo-Chin Liu, Han-Yu Tsai, You-Ting Lin, Jen-Hong Chang
  • Patent number: 12293784
    Abstract: A voltage calibration method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: reading first data from a first physical unit using a first read voltage level and reading second data from at least one second physical unit using a second read voltage level; obtaining count information reflecting a total number of memory cells meeting a default condition in the first physical unit and the at least one second physical unit according to the first data and the second data; and calibrating the first read voltage level according to the count information.
    Type: Grant
    Filed: April 17, 2023
    Date of Patent: May 6, 2025
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Po-Hao Chen, Po-Cheng Su, Shih-Jia Zeng, Yu-Cheng Hsu, Wei Lin
  • Patent number: 12292418
    Abstract: The present invention relates to a metal foil fatigue test apparatus and a metal foil fatigue test method using the same. The metal foil fatigue test apparatus includes: a metal foil moving unit including an unwinding roll, from which a metal foil is unwound, a plurality of guide rolls configured to support and transfer the metal foil supplied from the unwinding roll, and a rewinding roll where the metal foil transferred from the guide rolls is wound; and a tensile strength measuring unit configured to measure tensile strength of the metal foil.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: May 6, 2025
    Assignee: LG ENERGY SOLUTION, LTD.
    Inventors: Ki Tae Kim, Hyung Kyun Yu, Ki Hoon Paeng, Sang Myeon Lee
  • Patent number: 12294961
    Abstract: In accordance with example embodiments of the invention there is at least a method and apparatus to perform determining, by a network node, context information of a group of more than one user equipment, wherein the context information is based on at least service related information associated with the more than one user equipment; sending information comprising the context information towards at least one base station of a communication network; and based on the context information, negotiating with the at least one base station timing synchronization requirements for distribution to each user equipment of the group.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: May 6, 2025
    Assignee: NOKIA TECHNOLOGIES OY
    Inventors: Vinh Van Phan, Ling Yu, Zexian Li, Kari J. Niemela, Vladimir Vukadinovic
  • Patent number: 12293154
    Abstract: A method, computer program, and computer system is provided for identifying a speaker in at text based work. Labeled and unlabeled instances corresponding to one or more speakers are extracted. Pseudo-labels are inferred for the extracted unlabeled instances based on the labeled instances. One or more of the unlabeled instances are labeled based on the inferred pseudo-labels.
    Type: Grant
    Filed: March 8, 2024
    Date of Patent: May 6, 2025
    Assignee: TENCENT AMERICA LLC
    Inventors: Dian Yu, Dong Yu
  • Patent number: 12292692
    Abstract: The present application discloses an image stitching method for a stitching product, which includes: step 1: providing a chip design layout of the stitching product; step 2: designing a mask layout according to the chip design layout, including: step 21: setting unit mask images; step 22: merging logic images or cutting path images of adjacent areas between unit regions together to set corresponding peripheral mask images; step 23: merging the same peripheral mask images into one; step 24: constituting a mask layer by using the unit mask images and each peripheral mask image, and forming the mask layout on a mask; step 3: performing repeated exposure to form the stitching product. The present application can reduce the number of mask images, the number of times of exposure and the time of exposure.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: May 6, 2025
    Assignee: Shanghai Huali Microelectronics Corporation
    Inventors: Xiaobin Zhu, Haichang Zheng, Lijun Chen, Xiaolong Wang, Yu Zhang
  • Patent number: 12294298
    Abstract: A system includes: 1) a battery configured to provide an input voltage (VIN); 2) switching converter circuitry coupled to the battery, wherein the switching converter circuitry includes a power switch; 3) a load coupled to an output of the switching converter circuitry; and 4) a control circuit coupled to the power switch. The control circuit includes: 1) a switch driver circuit coupled to the power switch; 2) a summing comparator circuit configured to output a first control signal that indicates when to turn the power switch on; and 3) an analog on-time extension circuit configured to extend an on-time of the power switch by gating a second control signal with the first control signal, wherein the second control signal indicates when to turn the power switch off.
    Type: Grant
    Filed: December 28, 2023
    Date of Patent: May 6, 2025
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Zejing Wang, Zhujun Li, Songming Zhou, Yu Wang
  • Patent number: D1073968
    Type: Grant
    Filed: November 11, 2024
    Date of Patent: May 6, 2025
    Inventor: Huizheng Yu