Patents by Inventor An ZHONG

An ZHONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210204068
    Abstract: A MEMS microphone includes a base comprising a back cavity and a capacitive system provided on the base. The capacitive system includes a diaphragm and a back plate spaced from the diaphragm for forming a cavity with the diaphragm. The back plate is provided with an electrode layer. An isolation groove is provided on the back plate for separating the electrode layer into an induction electrode and a floating motor. In the invention the induction electrode is separated from the floating electrode by the isolation groove to avoid the influence of the parasitic capacitance generated by the floating electrode on the MEMS microphone when the MEMS microphone is powered and working.
    Type: Application
    Filed: March 23, 2020
    Publication date: July 1, 2021
    Inventors: Linlin Wang, Xiaohui Zhong, Rui Zhang, Zhenkui Meng
  • Publication number: 20210202332
    Abstract: Electronic packages and methods of formation are described in which an interposer is solderlessly connected with a package substrate. In an embodiment, the interposer is stacked on the package substrate and joined with a conductive film. In an embodiment the interposer is formed on the package substrate during a reconstitution sequence.
    Type: Application
    Filed: December 27, 2019
    Publication date: July 1, 2021
    Inventors: Kunzhong Hu, Chonghua Zhong, Jiongxin Lu, Jun Zhai
  • Publication number: 20210195927
    Abstract: A method for preparing cassava flour with a low content of cyanogenic glycosides is provided. The method includes: washing, peeling, and cutting newly harvested fresh cassava to obtain cassava pellets, cassava shreds, or a cassava pulp as a raw material. The method further includes the following steps: immersing the raw material in a solution containing cellulase and pectinase for 10-30 minutes, and then placing the raw material in warm water with a temperature of 35-50° C. and a pH value of 5.5-6.5 and ultrasonicating for 10-30 minutes at an ultrasonic frequency of 50-80 kHz, to obtain an ultrasonicated raw material; drying and pulverizing the ultrasonicated raw material to obtain cassava flour with a low content of cyanogenic glycosides, a cyanogenic glycoside content of the cassava flour is less than 15 mg/kg.
    Type: Application
    Filed: March 10, 2021
    Publication date: July 1, 2021
    Inventors: Baiyi Lu, Yongheng Zhong, Tao Xu, Shengyang Ji, Qi Chen, Xiaodan Wu
  • Publication number: 20210198118
    Abstract: The disclosure relates to a two-dimensional (2D) bismuth nanocomposite, and a preparation method and use thereof, and belongs to the field of nanobiotechnology. The 2D bismuth nanocomposite of the disclosure is an ultra-thin bismuth nanosheet that is loaded with platinum nanoparticles and modified with indocyanine green (ICG) and surface targeting polypeptide Ang-2. The 2D bismuth nanocomposite Bi@Pt/ICG-Ang2 of the disclosure can not only realize the targeted photothermal and photodynamic combination therapy for tumors, but also realize the dual-mode imaging combining CT and fluorescence imaging.
    Type: Application
    Filed: December 21, 2020
    Publication date: July 1, 2021
    Inventors: Bingyang SHI, Jiefei WANG, Ping SHANGGUAN, Yong ZHONG, Zhongjie WANG, Xiaoyu CHEN
  • Publication number: 20210202466
    Abstract: A circuit includes a first metal layer having a first first metal layer strip adjacent to a first boundary and a second first metal layer strip adjacent to a second boundary opposite to the first boundary. The first and second first metal layer strips, the first boundary, and the second boundary are parallel to each other. The circuit further includes a second metal layer having a first second metal layer strip and a second second metal layer strip adjacent to the first second metal layer strip. The first second metal layer strip is connected to the first metal layer strip at the first first metal layer strip and the second second metal layer strip is connected to the first metal layer strip at the second first metal layer strip. Each of the first and the second second metal layer strips are parallel to each other.
    Type: Application
    Filed: December 31, 2019
    Publication date: July 1, 2021
    Inventors: Shi-Wei Peng, Hui-Zhong Zhuang, Jiann-Tyng Tzeng, Wei-Cheng Lin, Guo-Huei Wu
  • Publication number: 20210199277
    Abstract: The present invention provides a tri-proof lamp, which comprises two swivel covers, two end caps, two power guide slots, two power supply circuits, a light source unit and a lamp cover; the lamp cover has openings at both ends; the power guide slots are located inside the lamp cover; the power supply circuits are located at the power guide slots; the light source unit is located inside the lamp cover and is electrically connected to the power supply circuits; the end caps are located at the openings of the lamp cover; the swivel covers are located at the end caps.
    Type: Application
    Filed: June 11, 2020
    Publication date: July 1, 2021
    Inventors: FUXING LU, WEIBIAO ZHONG
  • Publication number: 20210197365
    Abstract: A speed reducer and a robot are disclosed. The speed reducer includes a rigid wheel, a flexible wheel and a flexible bearing; the rigid wheel is provided with a first fitting position and an inner wheel tooth set; the outer peripheral surface of a peripheral wall of the flexible wheel is provided with an outer wheel tooth set; in the axial direction of the rigid wheel, the tooth top of the outer wheel tooth set is provided with a first length, and the tooth root of the outer wheel tooth set is provided with a second length; the tooth top of the inner wheel tooth set is provided with a third length; the flexible bearing is provided with a fourth length; the second length and the third length are both greater than the first length, and the fourth length is greater than the second length.
    Type: Application
    Filed: March 11, 2021
    Publication date: July 1, 2021
    Inventors: Zhongfu CHENG, Chengbao ZHONG, Zhong CUI, Zhenzhen TIAN, Jiajia GU
  • Publication number: 20210203352
    Abstract: A method of coding based on transition of lasing and non-lasing states of an optical structure. The power of a single pulse within picosecond-scale time is regulated to achieve transition of lasing and non-lasing states of an optical structure capable of emitting light and having the characteristic of resonant cavity and high Q value along a light path created by a combination of optical elements such as beam splitters, adjustable reflectors and continuously adjustable attenuators. Due to different parameters carried by light radiation in the two states, the parameters correspond to “1” and “0”, respectively. Therefore, binary high-bandwidth coding is realized, and even ternary coding can be realized with a slight improvement on the basis of the light path of binary coding. The tunable bandwidth of coding may reach up to 0.1 THz, which is conducive to promoting the development of high-bandwidth information processing optical microchips.
    Type: Application
    Filed: December 17, 2020
    Publication date: July 1, 2021
    Inventors: Wei XIE, Meng FEI, Hongxing DONG, Yichi ZHONG
  • Publication number: 20210200927
    Abstract: A system and method for transistor placement in a standard cell layout includes identifying a plurality of transistors in a circuit. A drain terminal of each of the plurality of transistors is connected to an output of the circuit. The system and method also include determining that a first transistor and a second transistor of the plurality of transistors satisfy a merging priority, combining an active region of the first transistor and the second transistor to form a mega transistor having a common active region, and replacing the first transistor and the second transistor in the standard cell layout of the circuit with the mega transistor. The common active region combines the active region of a first drain terminal of the first transistor and a second drain terminal of the second transistor.
    Type: Application
    Filed: December 31, 2019
    Publication date: July 1, 2021
    Inventors: Cheok-Kei Lei, Chi-Lin Liu, Yu-Lun Ou, Chien-Hsing Li, Zhe-Wei Jiang, Hui-Zhong Zhuang
  • Publication number: 20210197105
    Abstract: Methods for applying a surface treatment to a plugged honeycomb body comprising porous wall includes: atomizing particles of an inorganic material into liquid-particulate-binder droplets comprised of an aqueous vehicle, a binder material, and the particles, evaporating substantially all of the aqueous vehicle from the droplets to form agglomerates comprised of the particles and the binder material, and depositing the agglomerates onto the porous walls of the plugged honeycomb body, wherein the agglomerates are disposed on, or in, or both on and in, the porous walls. Plugged honeycomb bodies comprising porous walls and inorganic material deposited thereon are also disclosed.
    Type: Application
    Filed: August 30, 2019
    Publication date: July 1, 2021
    Inventors: Yunfeng Gu, Mark Alan Lewis, Cai Liu, Dale Robert Powers, Todd Parrish St Clair, Jianguo Wang, Huiqing Wu, Xinfeng Xing, Danhong Zhong
  • Publication number: 20210198325
    Abstract: Three-dimensional, living, self-regenerative structures of predetermined geometry comprising solidified print material comprising a biofilm of Bacillus subtilis comprise a TasA-R protein, wherein R is a recombinant, heterologous functional group, wherein the TasA-R provides a preferably tunable physiochemical property like viscosity, reactivity, affinity as a function of the R group.
    Type: Application
    Filed: February 7, 2021
    Publication date: July 1, 2021
    Applicant: ShanghaiTech University
    Inventors: Chao Zhong, Jiaofang Huang, Suying Liu, Chen Zhang
  • Publication number: 20210196026
    Abstract: A rotary cosmetic container includes an upper cover, an inner cover, a cartridge assembly, and a lower cover, which are arranged coaxially. The interior of the lower cover is vertically hollow, and the lower cover includes an upper end opening and a lower end opening. An internal thread is provided on the inside of the upper cover, and at least one first protrusion is provided on the outside of the inner cover. When the inner cover is placed in the upper cover, the first protrusion is engaged in the internal thread. When the upper cover rotates around the lower cover axially, the first protrusion is driven by the internal thread to drive the inner cover and the cartridge assembly to move up and down, so that the cartridge assembly retracts into or protrudes out of the lower end opening of the lower cover.
    Type: Application
    Filed: February 13, 2019
    Publication date: July 1, 2021
    Applicant: SHYA HSIN PACKAGING INDUSTRY (CHINA) CO., LTD.
    Inventor: Hua ZHONG
  • Publication number: 20210203381
    Abstract: A PLC control method includes: transmit a first signal through a neutral wire and a path between the neutral wire and a differential signal processing circuit; transmit a second signal through a live wire and a path between the live wire and the differential signal processing circuit; and disconnecting the path between the differential signal processing circuit and the neutral wire or the live wire, conducting the differential signal processing circuit to a ground wire, and when a transmission rate of the ground wire is greater than or equal to a preset transmission rate threshold, transmitting the first signal or the second signal through the ground wire and a path between the ground wire and the differential signal processing circuit.
    Type: Application
    Filed: March 11, 2021
    Publication date: July 1, 2021
    Inventors: Fan Zhang, Peng Xiao, Wei Zhong, Fang Xia, Dao Pan
  • Publication number: 20210203588
    Abstract: This application discloses a data forwarding method and device. The method includes: obtaining a first data unit sequence stream by using a first logical ingress port, where the first data unit sequence stream includes at least one first data unit; determining, according to a preconfigured mapping relationship between at least one logical ingress port and at least one logical egress port, a first logical egress port corresponding to the first logical ingress port, where the at least one logical ingress port includes the first logical ingress port; adjusting a quantity of idle units in the first data unit sequence stream, so that a rate of an adjusted first data unit sequence stream matches a rate of the first logical egress port; and sending the adjusted first data unit sequence stream by using the first logical egress port.
    Type: Application
    Filed: March 12, 2021
    Publication date: July 1, 2021
    Inventors: Qiwen ZHONG, Xiaojun ZHANG, Xiaofei XU
  • Publication number: 20210201149
    Abstract: A method, an apparatus, a device and a storage medium for embedding user app interest are provided. The method includes: acquiring a user existing app installation list and a user app installation list within a predetermined time window, where the app includes app ID information and app category information; inputting the existing app installation list and the app installation list within the predetermined time window into a pre-trained user app interest embedding model to obtain a user app interest embedding vector. By combining the user existing app installation list information and the user recent app installation list information, the user app interest embedding vector may simultaneously reflect the user long-term interest and the user short-term interest.
    Type: Application
    Filed: March 16, 2021
    Publication date: July 1, 2021
    Inventors: Huiqiang Zhong, Siqi Xu, Chenhui Liu, Lianghui Chen, Jun Fang
  • Publication number: 20210199551
    Abstract: Systems and methods for holographic characterization of protein aggregates. Size and refractive index of individual aggregates in a solution can be determined. Information regarding morphology and porosity can be extracted from holographic data.
    Type: Application
    Filed: February 7, 2017
    Publication date: July 1, 2021
    Inventors: David G. GRIER, Michael D. WARD, Xiao ZHONG, Chen WANG, Laura A. PHILIPS, David B. RUFFNER, Fook Chiong CHEONG
  • Publication number: 20210200836
    Abstract: The present disclosure relates to methods and apparatus for compute processing. For example, disclosed techniques facilitate improving performance of matrix multiplication in streaming processor. Aspects of the present disclosure can execute, with a load control unit, a first load instruction to load a set of input data of an input matrix from a first memory to a second memory. Aspects of the present disclosure can also execute, with the load control unit, a second load instruction to load a set of weight data of a weight matrix from the first memory to the second memory. Additionally, aspects of the present disclosure can perform, with an ALU component, a matrix multiplication operation using the set of input data and the set of weight data to generate an output matrix. Further, aspects of the present disclosure can store the output matrix at a general purpose register accessible to the ALU component.
    Type: Application
    Filed: December 29, 2020
    Publication date: July 1, 2021
    Inventors: Yun DU, Gang ZHONG, Fei WEI, Yibin ZHANG, Jing HAN, Hongjiang SHANG, Elina KAMENETSKAYA, Minjie HUANG, Alexei Vladimirovich BOURD, Chun YU, Andrew Evan GRUBER, Eric DEMERS
  • Publication number: 20210204069
    Abstract: The present invention provides a MEMS microphone, having a base and a capacitive system provided on the base. The capacitive system includes a diaphragm and a back plate. The MEMS microphone is further provided with s a supporting frame located between the back plate and the diaphragm. One end of the supporting frame is connected with the back plate, and the other end is connected with the diaphragm. The supporting frame divides the cavity into a first cavity body and a second cavity body. The supporting frame is provided with a connection channel. During the production process of the lo MEMS microphone, the etchant enters the first cavity body, and then enters the second cavity body, which prevents oxides from remaining in the microphone product and affecting the use of MEMS microphone.
    Type: Application
    Filed: March 23, 2020
    Publication date: July 1, 2021
    Inventors: Linlin Wang, Xiaohui Zhong, Rui Zhang, Zhenkui Meng
  • Patent number: 11048980
    Abstract: A method of training a generator G of a Generative Adversarial Network (GAN) includes receiving, by an encoder E, a target data Y; receiving, by the encoder E, an output G(Z) of the generator G, where the generator G generates the output G(Z) in response to receiving a random sample Z that is a noisy sample, and where a discriminator D of the GAN is trained to distinguish which of the G(Z) and the target data Y is real data; training the encoder E to minimize a difference between a first latent space representation E(G(Z)) of the output G(Z) and a second latent space representation E(Y) of the target data Y, where the output G(Z) and the target data Y are input to the encoder E; and using the first latent space representation E(G(Z)) and the second latent space representation E(Y) to constrain the training of the generator G.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: June 29, 2021
    Assignee: Agora Lab, Inc.
    Inventor: Sheng Zhong
  • Patent number: 11050415
    Abstract: In some embodiments, a flip-flop is disposed as an integrated circuit layout on a flip-flop region of a semiconductor substrate. The flip-flop includes a first clock inverter circuit that resides within the flip-flop region, and a second clock inverter circuit residing within the flip-flop region. The first clock inverter circuit and the second clock inverter circuit are disposed on a first line. Master switch circuitry is made up of a first plurality of devices which are circumscribed by a master switch perimeter that resides within the flip-flop region of the integrated circuit layout. The master switch circuitry and the first clock inverter circuit are disposed on a second line perpendicular to the first line. Slave switch circuitry is operably coupled to an output of the master switch circuitry. The slave switch circuitry is made up of a third plurality of devices that are circumscribed by a slave switch perimeter.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: June 29, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Lin Liu, Ting-Wei Chiang, Jerry Chang-Jui Kao, Hui-Zhong Zhuang, Lee-Chung Lu, Shang-Chih Hsieh, Che Min Huang