Patents by Inventor Ana Arias
Ana Arias has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11963764Abstract: A flexible oximeter device for measuring pulse and blood oxygen saturation in tissue includes a first array of first light emitting elements that emit red light, a second array of second light emitting elements that emit green light or near-infrared (NIR) light and an array of sensor elements arranged on at least one flexible substrate. Each sensor element is configured to detect red and green or NIR light, and to output a signal representing an amount of red or green or NIR light detected. The first and second arrays and the array of sensor elements form a plurality of interleaved measurement pixels, each pixel comprising one of the first light emitting elements and a corresponding sensor element, and one of the second light emitting elements and a different corresponding sensor element.Type: GrantFiled: November 23, 2020Date of Patent: April 23, 2024Assignee: The Regents of the University of CaliforniaInventors: Yasser Khan, Donggeon Han, Adrien Pierre, Jonathan Ting, Xingchun Wang, Claire Meyer Lochner, Ana Arias
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Publication number: 20210393176Abstract: A flexible oximeter device for measuring pulse and blood oxygen saturation in tissue includes a first array of first light emitting elements that emit red light, a second array of second light emitting elements that emit green light or near-infrared (NIR) light and an array of sensor elements arranged on at least one flexible substrate. Each sensor element is configured to detect red and green or NIR light, and to output a signal representing an amount of red or green or NIR light detected. The first and second arrays and the array of sensor elements form a plurality of interleaved measurement pixels, each pixel comprising one of the first light emitting elements and a corresponding sensor element, and one of the second light emitting elements and a different corresponding sensor element.Type: ApplicationFiled: November 23, 2020Publication date: December 23, 2021Inventors: Yasser Khan, Donggeon Han, Adrien Pierre, Jonathan Ting, Xingchun Wang, Claire Meyer Lochner, Ana Arias
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Patent number: 7949560Abstract: A system and method for providing print advertisements is presented. A target audience is assembled from characteristics about readers. Advertising content is targeted to the target audience. The characteristics of the target audience are analyzed against the advertising content to identify potential advertisers. At least one of the potential advertisers is selected. At least one print advertisement for the selected advertiser is included on the document.Type: GrantFiled: June 13, 2007Date of Patent: May 24, 2011Assignee: Palo Alto Research Center IncorporatedInventors: Eric Peeters, Richard H. Bruce, Ana Arias, Bo Begole, Ross Bringans, Celia Chow, Lawrence Lee, Lisa Fahey, Linda Jacobson, Marc Mosko, Susan (Susie) Mulhern, Nitin Parekh, David Weinerth
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Publication number: 20080313035Abstract: A system and method for providing print advertisements is presented. A target audience is assembled from characteristics about readers. Advertising content is targeted to the target audience. The characteristics of the target audience are analyzed against the advertising content to identify potential advertisers. At least one of the potential advertisers is selected. At least one print advertisement for the selected advertiser is included on the document.Type: ApplicationFiled: June 13, 2007Publication date: December 18, 2008Inventors: Eric Peeters, Richard H. Bruce, Ana Arias, James (Bo) M.A. Begole, Ross Bringans, Celia Chow, Lawrence Lee, Lisa Fahey, Linda Jacobson, Marc Mosko, Susan (Susie) Mulhern, Nitin Parekh, David Weinerth
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Publication number: 20080092807Abstract: A transistor is formed by applying modifier coatings to source and drain contacts and/or to the channel region between those contacts. The modifier coatings are selected to adjust the surface energy pattern in the source/drain/channel region such that semiconductor printing fluid is not drawn away from the channel region. For example, the modifier coatings for the contacts can be selected to have substantially the same surface energy as the modifier coating for the channel region. Semiconductor printing fluid deposited on the channel region therefore settles in place (due to the lack of a surface energy differential) and forms a relatively thick active semiconductor region between the contacts. Alternatively, the modifier coatings can be selected to have lower surface energies than the modifier coating in the channel region, which actually causes semiconductor printing fluid to be drawn towards the channel region.Type: ApplicationFiled: December 14, 2007Publication date: April 24, 2008Applicant: Palo Alto Research Center IncorporatedInventors: Michael Chabinyc, Ana Arias
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Publication number: 20070221611Abstract: A process for fabricating fine features such as small gate electrodes on a transistor. The process involves the jet-printing of a mask and the plating of a metal to fabricate sub-pixel and standard pixel size features in one layer. Printing creates a small sub-pixel size gap mask for plating a fine feature. A second printed mask may be used to protect the newly formed gate and etch standard pixel size lines connecting the small gates.Type: ApplicationFiled: March 24, 2006Publication date: September 27, 2007Inventors: Eugene Chow, William Wong, Michael Chabinyc, Ana Arias
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Publication number: 20070221610Abstract: A method to pattern films into dimensions smaller than the printed pixel mask size. A printed mask is deposited on a thin film on a substrate. The second mask layer is selectively deposited onto the film, but not to the printed mask. A third mask is then printed onto the substrate to pattern a portion of the second mask. Certain solvents are then used to remove the printed mask but not the mask layer on the thin film. The mask layer is then used to form a pattern on the thin film in combination with etching. The features formed in the thin film are smaller than the smallest dimension of the printed mask. The coated mask layer can be a self-assembled mono-layer or other material that selectively binds to the thin film.Type: ApplicationFiled: March 24, 2006Publication date: September 27, 2007Inventors: Eugene Chow, William Wong, Michael Chabinyc, Jeng Lu, Ana Arias
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Publication number: 20070169806Abstract: Photovoltaic devices (i.e., solar cells) are formed using non-contact patterning apparatus (e.g., a laser-based patterning systems) to define contact openings through a passivation layer, and direct-write metallization apparatus (e.g., an inkjet-type printing or extrusion-type deposition apparatus) to deposit metallization into the contact openings and over the passivation surface. The metallization includes two portions: a contact (e.g., silicide-producing) material is deposited into the contact openings, then a highly conductive metal is deposited on the contact material and between the contact holes. The device wafers are transported between the patterning and metallization apparatus in hard tooled registration using a conveyor mechanism. Optional sensors are utilized to align the patterning and metallization apparatus to the contact openings. An extrusion-type apparatus is used to form grid lines having a high aspect central metal line that is supported on each side by a transparent material.Type: ApplicationFiled: January 20, 2006Publication date: July 26, 2007Applicant: Palo Alto Research Center IncorporatedInventors: David Fork, Patrick Maeda, Ana Arias, Douglas Curry
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Publication number: 20070158644Abstract: A backplane circuit includes an array of organic thin-film transistors (OTFTs), each OTFT including a source contact, a drain contact, and an organic semiconductor region extending between the source and drain contacts. The drain contacts in each row are connected to an address line. The source and drain contacts and the address lines are fabricated using a multi-layer structure including a relatively thick base portion formed of a relatively inexpensive metal (e.g., aluminum or copper), and a relatively thin contact layer formed of a high work function, low oxidation metal (e.g., gold) that exhibits good electrical contact to the organic semiconductor, is formed opposite at least one external surface of the base, and is located at least partially in an interface region where the organic semiconductor contacts an underlying dielectric layer.Type: ApplicationFiled: December 21, 2005Publication date: July 12, 2007Applicant: Palo Alto Research Center IncorporatedInventors: Michael Chabinyc, Rene Lujan, Ana Arias, Jackson Ho
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Publication number: 20070147473Abstract: A layered structure is on a support structure's surface. The layered structure can include a component that responds electrically to thermal signals, such as a thermistor, and can also include a layer part that has a printed patterned artifact such as an uneven boundary or an alignment. The support structure can be a polymer layer such as polyimide, and a thermistor can include vanadium oxide with a printed patterned artifact. An array can include a layered structure with thermal sensor cells, at least one of which includes a printed patterned artifact. A layered structure can be produced by depositing a first layer, printing a mask, removing the exposed part of the first layer, depositing a second layer, and lifting off part of the second layer, leaving part of the second layer next to part of the first layer.Type: ApplicationFiled: December 27, 2005Publication date: June 28, 2007Inventors: Michal Wolkin, Ana Arias
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Publication number: 20070145362Abstract: A passive electronic device includes layers of a layered structure on a support surface. The device can include a first layer part that includes electrically conductive or semiconductive material and that has a contact surface. The device can also include second layer parts that include electrically conductive material and are in electrical contact with the contact surface, with a subset electrically connectible to external circuitry. At least one of the parts of the two layers can be produced by a printing operation or can include a printed patterned artifact such as an uneven boundary or an alignment. The printing operation can be direct printing or printing of a mask for etching or liftoff or both. The device could, for example, be a resistive device, such as a device with resistance varying in response to non-electrical stimuli, or a conductive device, such as with a contact pad for a pogo pin.Type: ApplicationFiled: December 27, 2005Publication date: June 28, 2007Inventors: Michal Wolkin, Ana Arias
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Publication number: 20070148416Abstract: A thin substrate has a layered structure on one surface, and can also have a layered structure on the other. Each layered structure can include a part of at least one patterned layer that, if patterned by photolithography, would frequently result in damage to the substrate due to fragility. For example, the substrate could be a 3 mil (76.2 ?m) or thinner polyimide film and one patterned layer could be a semiconductor material such as vanadium oxide, while another could be metal in electrical contact with semiconductor material. The layer part, however, can be patterned by a printing operation or can include a printed patterned artifact such as an uneven boundary or an alignment. The printing operation can be direct printing or printing of a mask for etching or liftoff or both. The layered structure can include an array of cells, each with layer parts on each substrate surface.Type: ApplicationFiled: December 27, 2005Publication date: June 28, 2007Inventors: Michal Wolkin, Ana Arias
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Publication number: 20070138462Abstract: An electronic device comprising a thin film transistor (TFT) array and manufacturing methods thereof according to various embodiments. Jet-printed material is deposited on selected partially formed transistors to form completed transistors. Thus, a selected number of the TFTs are connected into the circuit while the remainder of the TFTs are not connected. An electronic read-out of the array identifies the specific array by distinguishing the connected TFTs from the unconnected ones. For a TFT array with n elements there are 2n alternative configurations; therefore, a relatively small number of TFTs can uniquely identify a huge number of devices. Such uniquely encoded devices have applications for encryption, identification and personalization of electronic systems.Type: ApplicationFiled: December 21, 2005Publication date: June 21, 2007Inventors: Robert Street, Ana Arias
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Publication number: 20070046705Abstract: A digital lithography system prints a large-area electronic device by dividing the overall device printing process into a series of discrete feature printing sub-processes, where each feature printing sub-process involves printing both a predetermined portion (feature) of the device in a designated substrate area, and an associated test pattern in a designated test area that is remote from the feature. At the end of each feature printing sub-process, the test pattern is analyzed, e.g., using a camera and associated imaging system, to verify that the test pattern has been successfully printed. A primary ejector is used until an unsuccessfully printed test pattern is detected, at which time a secondary (reserve) ejector replaces the primary ejector and reprints the feature associated with the defective test pattern. When multiple printheads are used in parallel, analysis of the test pattern is used to efficiently identify the location of a defective ejector.Type: ApplicationFiled: September 1, 2005Publication date: March 1, 2007Applicant: Palo Alto Research Center IncorporatedInventors: William Wong, Steven Ready, Ana Arias
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Publication number: 20070020883Abstract: A patterned integrated circuit structure defining a gap or via is fabricated solely by digital printing and bulk processing. A sacrificial lift-off pattern is printed or otherwise formed over a substrate, and then covered by a blanket layer. A mask is then formed, e.g., by printing a wax pattern that covers a region of the blanket layer corresponding to the desired patterned structure, and overlaps the lift-off pattern. Exposed portions of the blanket layer are then removed, e.g., by wet etching. The printed mask and the lift-off pattern are then removed using a lift-off process that also removes any remaining portions of the blanket layer formed over the lift-off pattern. A thin-film transistor includes patterned source/drain structures that are self-aligned to an underlying gate structure by forming a photoresist lift-off pattern that is exposed and developed by a back-exposure process using the gate structure as a mask.Type: ApplicationFiled: July 18, 2005Publication date: January 25, 2007Applicant: Palo Alto Research Center IncorporatedInventors: Ana Arias, Rene Lujan, William Wong
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Publication number: 20060131563Abstract: Composite films formed from blends of semiconducting and insulating materials that phase separate on patterned substrates are provided. Phase separation provides isolated and encapsulated areas of semiconductor on the substrate. Processes for preparing and using such composite films are also provided, along with devices including such composite films.Type: ApplicationFiled: December 20, 2004Publication date: June 22, 2006Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Alberto Salleo, Ana Arias, William Wong
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Publication number: 20060115945Abstract: A transistor is formed by applying modifier coatings to source and drain contacts and/or to the channel region between those contacts. The modifier coatings are selected to adjust the surface energy pattern in the source/drain/channel region such that semiconductor printing fluid is not drawn away from the channel region. For example, the modifier coatings for the contacts can be selected to have substantially the same surface energy as the modifier coating for the channel region. Semiconductor printing fluid deposited on the channel region therefore settles in place (due to the lack of a surface energy differential) and forms a relatively thick active semiconductor region between the contacts. Alternatively, the modifier coatings can be selected to have lower surface energies than the modifier coating in the channel region, which actually causes semiconductor printing fluid to be drawn towards the channel region.Type: ApplicationFiled: January 12, 2006Publication date: June 1, 2006Applicant: Palo Alto Research Center IncorporatedInventors: Michael Chabinyc, Ana Arias
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Publication number: 20050287728Abstract: An improved method of forming a semiconducting polymer layer protected by an insulating polymer layer is described. In the method, a material for forming a semiconducting polymer and an insulating polymer are dissolved in a solvent. The blended solution is deposited on a substrate where the semiconducting polymer and insulating polymer segregate. Upon evaporation of the solvent, the semiconducting material forms the active region of a TFT and the insulating polymer minimizes the exposure of the semiconducting polymer to air.Type: ApplicationFiled: June 24, 2004Publication date: December 29, 2005Inventor: Ana Arias
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Publication number: 20050287781Abstract: An improved method of interconnecting electronic devices is described. In the method a blended material for forming a conducting layer and an insulating layer are deposited between a contact of a first electronic device and a second electronic device. The blended material leads to formation of a conductor overlayed by an insulator such that after formation, the conductor is capable of carrying current from the first electronic device to the second electronic device and the insulator forms a protective layer over the conductor.Type: ApplicationFiled: June 24, 2004Publication date: December 29, 2005Inventor: Ana Arias
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Publication number: 20050269570Abstract: A transistor is formed by applying modifier coatings to source and drain contacts and/or to the channel region between those contacts. The modifier coatings are selected to adjust the surface energy pattern in the source/drain/channel region such that semiconductor printing fluid is not drawn away from the channel region. For example, the modifier coatings for the contacts can be selected to have substantially the same surface energy as the modifier coating for the channel region. Semiconductor printing fluid deposited on the channel region therefore settles in place (due to the lack of a surface energy differential) and forms a relatively thick active semiconductor region between the contacts. Alternatively, the modifier coatings can be selected to have lower surface energies than the modifier coating in the channel region, which actually causes semiconductor printing fluid to be drawn towards the channel region.Type: ApplicationFiled: June 8, 2004Publication date: December 8, 2005Applicant: Palo Alto Research Center IncorporatedInventors: Michael Chabinyc, Ana Arias