Patents by Inventor Anadi Srivastava

Anadi Srivastava has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7902021
    Abstract: A method for making a semiconductor device is disclosed. In accordance with the method, a semiconductor structure is provided which includes (a) a substrate (203), (b) first and second gate electrodes (219) disposed over the substrate, each of the first and second gate electrodes having first and second sidewalls, and (c) first (223) and second (225) sets of spacer structures disposed adjacent to the first and second gate electrodes, respectively. A first layer of photoresist (231) is then disposed over the structure such that the first set of spacer structures is exposed and the second set of spacer structures is covered, after which the first set of spacer structures is partially etched.
    Type: Grant
    Filed: February 28, 2006
    Date of Patent: March 8, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Anadi Srivastava
  • Patent number: 7820539
    Abstract: A method for making a semiconductor device is provided. In accordance with the method, a semiconductor structure is provided which comprises (a) a substrate (203), (b) first (219) and second (220) gate electrodes disposed over the substrate, and (c) first (223) and second (225) sets of spacer structures disposed adjacent to said first and second gate electrodes, respectively. A first layer of photoresist (231) is disposed over the structure such that the first set of spacer structures is exposed and the second set of spacer structures is covered. The structure is then subjected to an etch which etches the first layer of photoresist and a portion of the first and second sets of spacer structures.
    Type: Grant
    Filed: February 28, 2006
    Date of Patent: October 26, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Anadi Srivastava
  • Patent number: 7563700
    Abstract: A method is provided for making a silicided gate (209). In accordance with the method, a semiconductor structure (201) is provided which comprises a semiconductor substrate (202), a gate (209) disposed on the semiconductor substrate, and a spacer (219) adjacent to the gate. The structure is subjected to a first etch which exposes a first lateral portion of the gate. An implant (215) is then created in a region adjacent to the spacer. The structure is then subjected to a second etch which exposes a second lateral portion of the gate electrode, and a layer of silicide (225) is formed which extends over the first and second lateral portions of the gate.
    Type: Grant
    Filed: February 22, 2006
    Date of Patent: July 21, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Anadi Srivastava, Mark D. Hall, Raghaw S. Rai, Jesse Yanez
  • Publication number: 20070202675
    Abstract: A method for making a semiconductor device is provided. In accordance with the method, a semiconductor structure is provided which comprises (a) a substrate (203), (b) first (219) and second (220) gate electrodes disposed over the substrate, and (c) first (223) and second (225) sets of spacer structures disposed adjacent to said first and second gate electrodes, respectively. A first layer of photoresist (231) is disposed over the structure such that the first set of spacer structures is exposed and the second set of spacer structures is covered. The structure is then subjected to an etch which etches the first layer of photoresist and a portion of the first and second sets of spacer structures.
    Type: Application
    Filed: February 28, 2006
    Publication date: August 30, 2007
    Inventor: Anadi Srivastava
  • Publication number: 20070202643
    Abstract: A method for making a semiconductor device is provided herein. In accordance with the method, a semiconductor structure is provided which comprises a substrate (203), first and second gate electrodes (219) disposed over the substrate, each of said first and second gate electrodes having first and second sidewalls, and first (223) and second (225) sets of spacer structures disposed adjacent to said first and second gate electrodes, respectively. A first layer of photoresist (231) is then disposed over the structure such that the first set of spacer structures is exposed and the second set of spacer structures is covered, after which the first set of spacer structures is partially etched.
    Type: Application
    Filed: February 28, 2006
    Publication date: August 30, 2007
    Inventor: Anadi Srivastava
  • Publication number: 20070197009
    Abstract: A method is provided for making a silicided gate (209). In accordance with the method, a semiconductor structure (201) is provided which comprises a semiconductor substrate (202), a gate (209) disposed on the semiconductor substrate, and a spacer (219) adjacent to the gate. The structure is subjected to a first etch which exposes a first lateral portion of the gate. An implant (215) is then created in a region adjacent to the spacer. The structure is then subjected to a second etch which exposes a second lateral portion of the gate electrode, and a layer of silicide (225) is formed which extends over the first and second lateral portions of the gate.
    Type: Application
    Filed: February 22, 2006
    Publication date: August 23, 2007
    Inventors: Anadi Srivastava, Mark Hall, Raghaw Rai, Jesse Yanez
  • Publication number: 20070197011
    Abstract: A method is provided for making a silicided gate (209). In accordance with the method, a semiconductor substrate (202) is provided which has a gate (209) disposed thereon and which has a spacer (219) disposed adjacent to the gate. The spacer is subjected to a recess etch which exposes a lateral portion of the gate. An implant region (215) is then created adjacent to the spacer, and a layer of silicide (225) is formed which extends over the exposed lateral portion of the gate.
    Type: Application
    Filed: February 22, 2006
    Publication date: August 23, 2007
    Inventors: Anadi Srivastava, Paul Grudowski, Dharmesh Jawarani, Rode Mora