Patents by Inventor Anand Babu

Anand Babu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240370285
    Abstract: An information handling system may include at least one processor and a storage resource having a bare-metal operating system thereon. Upon a first boot of the information handling system, the bare-metal operating system may deploy a hypervisor to be executed by the at least one processor; and implement a device enumeration protocol mapping virtual objects associated with the bare-metal operating system to virtual device objects associated with the hypervisor.
    Type: Application
    Filed: May 3, 2023
    Publication date: November 7, 2024
    Applicant: Dell Products L.P.
    Inventors: Shekar Babu SURYANARAYANA, Anand Prakash JOSHI, Sumanth VIDYADHARA
  • Publication number: 20240330005
    Abstract: An operating system (OS) software service detects an accessibility change event and takes a snapshot of the accessibility settings before sending and receiving memory-mapped input/output (MMIO) commands with an embedded controller (EC) to establish trust using existing security hardening methods. The software service may send an MMIO command that includes the profile as a payload to the EC. The EC extracts the profile payload and saves it to an NVRAM variable before signaling a basic input/output system (BIOS) during early boot of an available accessibility profile. The EC publishes an accessibility profile presence to a BIOS pre-EFI initialization (PEI) layer, which sends a command to the EC to return the response.
    Type: Application
    Filed: March 28, 2023
    Publication date: October 3, 2024
    Applicant: Dell Products L.P.
    Inventors: Ibrahim SAYYED, Jagadish Babu JONNADA, Phanindra TALASILA, Laxmi Lavanya MEDICHERLA, Anand Prakash JOSHI
  • Patent number: 12095431
    Abstract: An ECG signal acquisition system includes a first amplifier which has a non-inverting input adapted to be coupled to a first differential input, an inverting input adapted to be coupled to a second differential input, and an output. The system includes first and second biasing resistors coupled between the non-inverting and inverting inputs of the first amplifier. The system includes an average estimation circuit which has a first input coupled to the non-inverting input of the first amplifier and a second input coupled to the inverting input of the first amplifier. The system includes a driver amplifier which has an inverting input coupled to the output of the average estimation circuit, a non-inverting input coupled to receive a reference common-mode voltage, and an output. The system includes a low-pass filter coupled between the output of the driver amplifier and the biasing resistors.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: September 17, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sandeep Oswal, Raja Reddy Patukuri, Aravind Miriyala, Anand Hariraj Udupa, Hari Babu Tippana, Aatish Chandak
  • Patent number: 12086516
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip floorplan. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip floorplan, comprising placing a respective node at each time step in a sequence comprising a plurality of time steps, the placing comprising, for each time step: generating an input representation for the time step; processing the input representation using a node placement neural network having a plurality of network parameters, wherein the node placement neural network is configured to process the input representation in accordance with current values of the network parameters to generate a score distribution over a plurality of positions on the surface of the computer chip; and assigning the node to be placed at the time step to a position from the plurality of positions using the score distribution.
    Type: Grant
    Filed: May 1, 2023
    Date of Patent: September 10, 2024
    Assignee: Google LLC
    Inventors: Chian-min Richard Ho, William Hang, Mustafa Nazim Yazgan, Anna Darling Goldie, Jeffrey Adgate Dean, Azalia Mirhoseini, Emre Tuncer, Ya Wang, Anand Babu
  • Patent number: 12072982
    Abstract: A virtual BIOS engine may be configured to, during runtime of an operating system, in response to an operating system event for updating firmware, load onto an isolated compute domain of the processor to emulate firmware update processes of a non-transitory computer-readable media with a virtual non-transitory computer-readable media and emulate the firmware update processes of the cryptoprocessor with a virtual cryptoprocessor, extract a firmware payload to the virtual non-transitory computer-readable media, and execute a virtual trust chain to measure the firmware payload in the virtual non-transitory computer-readable media.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: August 27, 2024
    Assignee: Dell Products L.P.
    Inventors: Shekar Babu Suryanarayana, Anand Prakash Joshi, Amy Christine Nelson, Nicholas D. Grobelny
  • Publication number: 20240256629
    Abstract: Data processing systems and methods, according to various embodiments, are adapted for determining a categorization for each tracking tool that executes on a particular webpage based on a variety of criteria, such as the purpose of the tracking tool and its source script. The system may compare the characteristics of tracking tools on a webpage to a database of known tracking tools to determine the appropriate categorization. When a user visits the webpage, the system analyzes these categories and determines whether the tracking tool should be permitted to run based on the categories and/or other criteria, such as whether the user has consented to the use of that type of tracking tool.
    Type: Application
    Filed: March 13, 2024
    Publication date: August 1, 2024
    Applicant: OneTrust, LLC
    Inventors: Patrick Whitney, Kevin Jones, Brian Kelly, Subramanian Viswanathan, Casey Hill, Jeffrey Baucom, Madhusudhan Kunhambu, Mithun Babu, Rajneesh Kesavan, Santosh Kumar Koti, Sathish Gopalakrishnan, Anand Balasubramanian, Mohamed Kabad, Jayamohan Puthenveetil, Jonathan Blake Brannon
  • Publication number: 20230394203
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip floorplan. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip floorplan, comprising placing a respective node at each time step in a sequence comprising a plurality of time steps, the placing comprising, for each time step: generating an input representation for the time step; processing the input representation using a node placement neural network having a plurality of network parameters, wherein the node placement neural network is configured to process the input representation in accordance with current values of the network parameters to generate a score distribution over a plurality of positions on the surface of the computer chip; and assigning the node to be placed at the time step to a position from the plurality of positions using the score distribution.
    Type: Application
    Filed: May 1, 2023
    Publication date: December 7, 2023
    Inventors: Chian-min Richard Ho, William Hang, Mustafa Nazim Yazgan, Anna Darling Goldie, Jeffrey Adgate Dean, Azalia Mirhoseini, Emre Tuncer, Ya Wang, Anand Babu
  • Publication number: 20230334368
    Abstract: The present disclosure relates generally to an integrated machine learning platform. The machine learning platform can convert machine learning models with different schemas into machine learning models that share a common schema, organize the machine learning models into model groups based on certain criteria, and perform pre-deployment evaluation of the machine learning models. The machine learning models in a model group can be evaluated or used individually or as a group. The machine learning platform can be used to deploy a model group and a selector in a production environment, and the selector may learn to dynamically select the model(s) from the model group in the production environment in different contexts or for different input data, based on a score determined using certain scoring metrics, such as certain business goals.
    Type: Application
    Filed: June 21, 2023
    Publication date: October 19, 2023
    Applicant: Oracle International Corporation
    Inventors: Shashi Anand Babu, Neel Madhav, Herve Mazoyer, Raghuram Venkatasubramanian, Daren Race, Arun Kumar Kalyaana Sundaram, Lasya Priya Thilagar
  • Patent number: 11720813
    Abstract: The present disclosure relates generally to an integrated machine learning platform. The machine learning platform can convert machine learning models with different schemas into machine learning models that share a common schema, organize the machine learning models into model groups based on certain criteria, and perform pre-deployment evaluation of the machine learning models. The machine learning models in a model group can be evaluated or used individually or as a group. The machine learning platform can be used to deploy a model group and a selector in a production environment, and the selector may learn to dynamically select the model(s) from the model group in the production environment in different contexts or for different input data, based on a score determined using certain scoring metrics, such as certain business goals.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: August 8, 2023
    Assignee: Oracle International Corporation
    Inventors: Shashi Anand Babu, Raghuram Venkatasubramanian, Neel Madhav, Herve Mazoyer, Daren Race, Arun Kumar Kalyaana Sundaram, Lasya Priya Thilagar
  • Patent number: 11675940
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip floorplan. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip floorplan, comprising placing a respective node at each time step in a sequence comprising a plurality of time steps, the placing comprising, for each time step: generating an input representation for the time step; processing the input representation using a node placement neural network having a plurality of network parameters, wherein the node placement neural network is configured to process the input representation in accordance with current values of the network parameters to generate a score distribution over a plurality of positions on the surface of the computer chip; and assigning the node to be placed at the time step to a position from the plurality of positions using the score distribution.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: June 13, 2023
    Assignee: Google LLC
    Inventors: Chian-Min Richard Ho, William Hang, Mustafa Nazim Yazgan, Anna Darling Goldie, Jeffrey Adgate Dean, Azalia Mirhoseini, Emre Tuncer, Ya Wang, Anand Babu
  • Publication number: 20220362253
    Abstract: Disclosed are novel pharmaceutical formulations comprising (E)-1-(4-(5-Carbamoyl-2-(1-ethyl-3-methyl-1H-pyrazole-5-carboxamido)-7-(3-morpholinopropoxy)-1H-benzo[d]imidazol-1-yl)but-2-en-1-yl)-2-(1-ethyl-3-methyl-1H-pyrazole-5-carboxamido)-7-methoxy-1H-benzo[d]imidazole-5-carboxamide, processes for preparing the same, and methods of using the same.
    Type: Application
    Filed: December 4, 2019
    Publication date: November 17, 2022
    Inventors: Lisa McQUEEN, Anand Babu DHANIKULA
  • Publication number: 20220043951
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip floorplan. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip floorplan, comprising placing a respective node at each time step in a sequence comprising a plurality of time steps, the placing comprising, for each time step: generating an input representation for the time step; processing the input representation using a node placement neural network having a plurality of network parameters, wherein the node placement neural network is configured to process the input representation in accordance with current values of the network parameters to generate a score distribution over a plurality of positions on the surface of the computer chip; and assigning the node to be placed at the time step to a position from the plurality of positions using the score distribution.
    Type: Application
    Filed: August 23, 2021
    Publication date: February 10, 2022
    Inventors: Chian-min Richard Ho, William Hang, Mustafa Nazim Yazgan, Anna Darling Goldie, Jeffrey Adgate Dean, Azalia Mirhoseini, Emre Tuncer, Ya Wang, Anand Babu
  • Patent number: 11100266
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip floorplan. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip floorplan, comprising placing a respective node at each time step in a sequence comprising a plurality of time steps, the placing comprising, for each time step: generating an input representation for the time step; processing the input representation using a node placement neural network having a plurality of network parameters, wherein the node placement neural network is configured to process the input representation in accordance with current values of the network parameters to generate a score distribution over a plurality of positions on the surface of the computer chip; and assigning the node to be placed at the time step to a position from the plurality of positions using the score distribution.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: August 24, 2021
    Assignee: Google LLC
    Inventors: Chian-min Richard Ho, William Hang, Mustafa Nazim Yazgan, Anna Darling Goldie, Jeffrey Adgate Dean, Azalia Mirhoseini, Emre Tuncer, Ya Wang, Anand Babu
  • Publication number: 20200364389
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip floorplan. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip floorplan, comprising placing a respective node at each time step in a sequence comprising a plurality of time steps, the placing comprising, for each time step: generating an input representation for the time step; processing the input representation using a node placement neural network having a plurality of network parameters, wherein the node placement neural network is configured to process the input representation in accordance with current values of the network parameters to generate a score distribution over a plurality of positions on the surface of the computer chip; and assigning the node to be placed at the time step to a position from the plurality of positions using the score distribution.
    Type: Application
    Filed: June 1, 2020
    Publication date: November 19, 2020
    Inventors: Chian-min Richard Ho, William Hang, Mustafa Nazim Yazgan, Anna Darling Goldie, Jeffrey Adgate Dean, Azalia Mirhoseini, Emre Tuncer, Ya Wang, Anand Babu
  • Patent number: 10827093
    Abstract: The disclosure discloses methods and systems for intelligent copying of bound documents. The method includes receiving a selection of copying a bound document via a user interface. The user interface is presented to the user to input whether a starting page of the bound document for copying is a left-side page or a right-side page. Then, multiple pages of the bound document are scanned to generate corresponding scanned images. Finally, the generated scanned images are arranged in the same order as per the arrangement of pages in the original bound document.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: November 3, 2020
    Assignee: Xerox Corporation
    Inventors: Saranraj Velayutham, Ramanathan Arunachalam, Kalai Selvi Subramaniam, Kavin Kumar Gurusamy, Anand Babu, Shankar Durai
  • Patent number: 10796484
    Abstract: The embodiments herein provide a system and method for providing interactive multimedia and multi-lingual tour guide. The system and method presents an audio-visual tour of a place of interest to a user on his/her personal smart devices such as smartphone or tablet. The user is enabled to navigate through 360 degree panorama visuals of the place of interest such as a monument with a graphical user interface alone with audio support in multiple languages. On reaching near or at the place of interest the user connects to a locally installed hardware device present at the place of interest and browses the guided tour on the computing device of the user. The interactive multimedia and multi-lingual guided tour/panorama tour of the present invention is accessible even if the user is not present at or near the place of interest by connecting to the cloud servers provided by the system through internet.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: October 6, 2020
    Inventor: Anand Babu Chitavadigi
  • Patent number: 10699043
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip floorplan. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip floorplan, comprising placing a respective node at each time step in a sequence comprising a plurality of time steps, the placing comprising, for each time step: generating an input representation for the time step; processing the input representation using a node placement neural network having a plurality of network parameters, wherein the node placement neural network is configured to process the input representation in accordance with current values of the network parameters to generate a score distribution over a plurality of positions on the surface of the computer chip; and assigning the node to be placed at the time step to a position from the plurality of positions using the score distribution.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: June 30, 2020
    Assignee: Google LLC
    Inventors: Chian-min Richard Ho, William Hang, Mustafa Nazim Yazgan, Anna Darling Goldie, Jeffrey Adgate Dean, Azalia Mirhoseini, Emre Tuncer, Ya Wang, Anand Babu
  • Publication number: 20200175216
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip floorplan. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip floorplan, comprising placing a respective node at each time step in a sequence comprising a plurality of time steps, the placing comprising, for each time step: generating an input representation for the time step; processing the input representation using a node placement neural network having a plurality of network parameters, wherein the node placement neural network is configured to process the input representation in accordance with current values of the network parameters to generate a score distribution over a plurality of positions on the surface of the computer chip; and assigning the node to be placed at the time step to a position from the plurality of positions using the score distribution.
    Type: Application
    Filed: December 4, 2019
    Publication date: June 4, 2020
    Inventors: Chian-min Richard Ho, William Hang, Mustafa Nazim Yazgan, Anna Darling Goldie, Jeffrey Adgate Dean, Azalia Mirhoseini, Emre Tuncer, Ya Wang, Anand Babu
  • Publication number: 20190102700
    Abstract: The present disclosure relates generally to an integrated machine learning platform. The machine learning platform can convert machine learning models with different schemas into machine learning models that share a common schema, organize the machine learning models into model groups based on certain criteria, and perform pre-deployment evaluation of the machine learning models. The machine learning models in a model group can be evaluated or used individually or as a group. The machine learning platform can be used to deploy a model group and a selector in a production environment, and the selector may learn to dynamically select the model(s) from the model group in the production environment in different contexts or for different input data, based on a score determined using certain scoring metrics, such as certain business goals.
    Type: Application
    Filed: September 28, 2018
    Publication date: April 4, 2019
    Applicant: Oracle International Corporation
    Inventors: Shashi Anand Babu, Raghuram Venkatasubramanian, Neel Madhav, Herve Mazoyer, Daren Race, Arun Kumar Kalyaana Sundaram, Lasya Priya Thilagar
  • Publication number: 20180365894
    Abstract: The embodiments herein provide a system and method for providing interactive multimedia and multi-lingual tour guide. The system and method presents an audio-visual tour of a place of interest to a user on his/her personal smart devices such as smartphone or tablet. The user is enabled to navigate through 360 degree panorama visuals of the place of interest such as a monument with a graphical user interface alone with audio support in multiple languages. On reaching near or at the place of interest the user connects to a locally installed hardware device present at the place of interest and browses the guided tour on the computing device of the user. The interactive multimedia and multi-lingual guided tour/panorama tour of the present invention is accessible even if the user is not present at or near the place of interest by connecting to the cloud servers provided by the system through internet.
    Type: Application
    Filed: June 14, 2018
    Publication date: December 20, 2018
    Inventor: ANAND BABU CHITAVADIGI