Patents by Inventor Anand Bhat
Anand Bhat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12160475Abstract: A response communication that includes one or more data packets is received at a broker associated with a storage node of a plurality of storage nodes via a virtual network associated with the plurality of storage nodes of a storage system. The one or more data packets are provided, via the virtual network associated with the storage nodes, to a tenant communication component associated with an intended destination. A connection between the broker and the tenant communication component associated with the intended destination is terminated. A new connection between the intended destination and the tenant communication component associated with the intended destination is established. The new connection is associated with a virtual network associated with a storage tenant. The one or more data packets are sent to the intended destination via the virtual network associated with the storage tenant.Type: GrantFiled: December 15, 2023Date of Patent: December 3, 2024Assignee: Cohesity, Inc.Inventors: Harsha Vardhan Jagannati, Anand Bhat
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Publication number: 20240296109Abstract: Systems and methods for testing, training, and instructing autonomous vehicles (AVs) are described herein. In one aspect, a computer-implemented method for live testing an AV including generating one or more test objects from a stored set of test objects, test object attributes, or a combination thereof; superimposing the one or more test objects on sensory data received from one or more sensors of the AV and corresponding to an external environment of the AV; and testing one or more software subsystems of the AV, in a manual mode, a partially autonomous mode or a fully autonomous mode, with the sensory data after superimposition.Type: ApplicationFiled: December 20, 2021Publication date: September 5, 2024Inventors: Ragunathan RAJKUMAR, Sandeep D'SOUZA, Anand BHAT
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Publication number: 20240121301Abstract: A response communication that includes one or more data packets is received at a broker associated with a storage node of a plurality of storage nodes via a virtual network associated with the plurality of storage nodes of a storage system. The one or more data packets are provided, via the virtual network associated with the storage nodes, to a tenant communication component associated with an intended destination. A connection between the broker and the tenant communication component associated with the intended destination is terminated. A new connection between the intended destination and the tenant communication component associated with the intended destination is established. The new connection is associated with a virtual network associated with a storage tenant. The one or more data packets are sent to the intended destination via the virtual network associated with the storage tenant.Type: ApplicationFiled: December 15, 2023Publication date: April 11, 2024Inventors: Harsha Vardhan Jagannati, Anand Bhat
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Patent number: 11895189Abstract: One or more data packets at a storage node of a storage cluster system is received via a virtual network associated with a storage tenant. A connection between the storage tenant and a tenant communication component of the storage cluster system is terminated. A new connection is established between the tenant communication component of the storage cluster system and a destination associated with the one or more data packets. The one or more data packets are provided to the destination associated with the one or more data packets using a virtual network associated with storage nodes of the storage cluster system.Type: GrantFiled: October 21, 2022Date of Patent: February 6, 2024Assignee: Cohesity, Inc.Inventors: Harsha Vardhan Jagannati, Anand Bhat
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Publication number: 20230040781Abstract: One or more data packets at a storage node of a storage cluster system is received via a virtual network associated with a storage tenant. A connection between the storage tenant and a tenant communication component of the storage cluster system is terminated. A new connection is established between the tenant communication component of the storage cluster system and a destination associated with the one or more data packets. The one or more data packets are provided to the destination associated with the one or more data packets using a virtual network associated with storage nodes of the storage cluster system.Type: ApplicationFiled: October 21, 2022Publication date: February 9, 2023Inventors: Harsha Vardhan Jagannati, Anand Bhat
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Patent number: 11516291Abstract: A first set of one or more tenant communication components are configured to communicate with a first separate system component of a first storage tenant via a first virtual network. A second set of one or more tenant communication components are configured to communicate with a second separate system component of a second storage tenant via a second virtual network. The second virtual network is separate from the first virtual network. A plurality of tenant communication components of the storage cluster system including the first set of one or more tenant communication components and the second set of one or more tenant communication components are configured to communicate internally in the storage cluster system via a third virtual network separate from the first virtual network and the second virtual network.Type: GrantFiled: September 29, 2020Date of Patent: November 29, 2022Assignee: Cohesity, Inc.Inventors: Harsha Vardhan Jagannati, Anand Bhat
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Patent number: 11461131Abstract: At least a portion of a virtual machine is hosted on at least one node of a first subset of a plurality of nodes of a secondary storage system. The virtual machine comprises a plurality of portions that can be distributed between the plurality of nodes and is configured into a first state of a plurality of states, such that, in the first state, the plurality of portions is distributed between a first subset of the plurality of nodes and each of the first subset of nodes stores a portion of the virtual machine in its corresponding storage device. A node from the second subset of the plurality of nodes to host the virtual machine in a second state of the plurality of states is selected based on at least one of storage, memory or processing resources of one or more nodes of a second subset of the plurality of nodes.Type: GrantFiled: December 8, 2020Date of Patent: October 4, 2022Assignee: Cohesity, Inc.Inventors: Anand Bhat, Anil Kumar Boggarapu, Arvind Jagannath
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Publication number: 20220103628Abstract: A first set of one or more tenant communication components are configured to communicate with a first separate system component of a first storage tenant via a first virtual network. A second set of one or more tenant communication components are configured to communicate with a second separate system component of a second storage tenant via a second virtual network. The second virtual network is separate from the first virtual network. A plurality of tenant communication components of the storage cluster system including the first set of one or more tenant communication components and the second set of one or more tenant communication components are configured to communicate internally in the storage cluster system via a third virtual network separate from the first virtual network and the second virtual network.Type: ApplicationFiled: September 29, 2020Publication date: March 31, 2022Inventors: Harsha Vardhan Jagannati, Anand Bhat
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Patent number: 11157004Abstract: A real-time control system for a vehicle, and a method of executing control of the vehicle via the real-time control system includes at least one primary controller that is configured to control slave controllers. The primary controller is configured to queue a task requested by respective vehicle systems, and determine which of the slave controllers is available to execute the task. The primary controller is configured to assign the task to a selected one of the slave controllers to execute the task. The primary controller is configured to re-queue the assigned task if the selected one of the slave controllers does not completely execute the assigned task. The primary controller is configured to assign that re-queued task to another one of the slave controllers to execute the re-queued task. The respective vehicle systems perform the requested task when the selected one of the slave controllers completely executes the assigned task.Type: GrantFiled: April 1, 2019Date of Patent: October 26, 2021Assignee: GM Global Technology Operations LLCInventors: Anand Bhat, Soheil Samii
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Publication number: 20210173698Abstract: At least a portion of a virtual machine is hosted on at least one node of a first subset of a plurality of nodes of a secondary storage system. The virtual machine comprises a plurality of portions that can be distributed between the plurality of nodes and is configured into a first state of a plurality of states, such that, in the first state, the plurality of portions is distributed between a first subset of the plurality of nodes and each of the first subset of nodes stores a portion of the virtual machine in its corresponding storage device. A node from the second subset of the plurality of nodes to host the virtual machine in a second state of the plurality of states is selected based on at least one of storage, memory or processing resources of one or more nodes of a second subset of the plurality of nodes.Type: ApplicationFiled: December 8, 2020Publication date: June 10, 2021Inventors: Anand Bhat, Anil Kumar Boggarapu, Arvind Jagannath
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Patent number: 10891154Abstract: At least a portion of a virtual machine is hosted on at least one node of a first subset of a plurality of nodes of a secondary storage system. The virtual machine comprises a plurality of portions that can be distributed between the plurality of nodes and is configured into a first state of a plurality of states, such that, in the first state, the plurality of portions is distributed between a first subset of the plurality of nodes and each of the first subset of nodes stores a portion of the virtual machine in its corresponding storage device. A node from the second subset of the plurality of nodes to host the virtual machine in a second state of the plurality of states is selected based on at least one of storage, memory or processing resources of one or more nodes of a second subset of the plurality of nodes.Type: GrantFiled: November 6, 2019Date of Patent: January 12, 2021Assignee: Cohesity, Inc.Inventors: Anand Bhat, Anil Kumar Boggarapu, Arvind Jagannath
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Publication number: 20200310426Abstract: A real-time control system for a vehicle, and a method of executing control of the vehicle via the real-time control system includes at least one primary controller that is configured to control slave controllers. The primary controller is configured to queue a task requested by respective vehicle systems, and determine which of the slave controllers is available to execute the task. The primary controller is configured to assign the task to a selected one of the slave controllers to execute the task. The primary controller is configured to re-queue the assigned task if the selected one of the slave controllers does not completely execute the assigned task. The primary controller is configured to assign that re-queued task to another one of the slave controllers to execute the re-queued task. The respective vehicle systems perform the requested task when the selected one of the slave controllers completely executes the assigned task.Type: ApplicationFiled: April 1, 2019Publication date: October 1, 2020Applicant: GM Global Technology Operations LLCInventors: Anand Bhat, Soheil Samii
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Publication number: 20200249988Abstract: At least a portion of a virtual machine is hosted on at least one node of a first subset of a plurality of nodes of a secondary storage system. The virtual machine comprises a plurality of portions that can be distributed between the plurality of nodes and is configured into a first state of a plurality of states, such that, in the first state, the plurality of portions is distributed between a first subset of the plurality of nodes and each of the first subset of nodes stores a portion of the virtual machine in its corresponding storage device. A node from the second subset of the plurality of nodes to host the virtual machine in a second state of the plurality of states is selected based on at least one of storage, memory or processing resources of one or more nodes of a second subset of the plurality of nodes.Type: ApplicationFiled: November 6, 2019Publication date: August 6, 2020Inventors: Anand Bhat, Anil Kumar Boggarapu, Arvind Jagannath
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Patent number: 10503543Abstract: At least a portion of a virtual machine is hosted on at least one node of a first subset of a plurality of nodes of a secondary storage system. The virtual machine comprises a plurality of portions that can be distributed between the plurality of nodes and is configured into a first state of a plurality of states, such that, in the first state, the plurality of portions is distributed between a first subset of the plurality of nodes and each of the first subset of nodes stores a portion of the virtual machine in its corresponding storage device. A node from the second subset of the plurality of nodes to host the virtual machine in a second state of the plurality of states is selected based on at least one of storage, memory or processing resources of one or more nodes of a second subset of the plurality of nodes.Type: GrantFiled: April 19, 2019Date of Patent: December 10, 2019Assignee: Cohesity, Inc.Inventors: Anand Bhat, Anil Kumar Boggarapu, Arvind Jagannath
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Patent number: 9971663Abstract: A method and apparatus for reducing memory built-in self-test (MBIST) area by optimizing the number of interfaces required for testing a given set of memories is provided. The method begins when memories of a same configuration are grouped together. One memory is then selected from each of the groups. MBIST insertion is then performed for a selected group of memories, and the selected group of memories contains memories of different configurations. Control logic is used to select each group of memories separately. The memory group under test may also be selected using programmable user bits. An apparatus is also provided. The apparatus includes: a controller, at least one memory interface in communication with the controller, at least one control logic cloud in communication with the at least one memory interface; and at least one bit bus.Type: GrantFiled: March 27, 2015Date of Patent: May 15, 2018Assignee: QUALCOMM IncorporatedInventors: Nishi Bhushan Singh, Anand Bhat, Ashutosh Anand, Rajesh Tiwari, Abhinav Kothiala
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Patent number: 9972402Abstract: A method and apparatus for continuous write and read operations during memory testing. The method comprises: controlling a signal generator; triggering a write address and a data field operation each memory cycle; triggering a write signal to write to a memory each memory clock cycle; and reading a read address and a read data operation to the memory. An additional embodiment provides an apparatus for advanced memory latency testing. The apparatus includes a data generator trigger in communication with a signal generator and an address generator trigger also in communication with the signal generator.Type: GrantFiled: April 25, 2016Date of Patent: May 15, 2018Assignee: QUALCOMM IncorporatedInventors: Nishi Bhushan Singh, Ashutosh Anand, Anand Bhat, Rajesh Tiwari, Shankarnarayan Bhat
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Publication number: 20180067515Abstract: Segregated test mode clock gating circuits in a clock distribution network of a circuit for controlling power consumption during testing is provided. To reduce power consumption and current-resistance (IR) drop during testing of a circuit, existing clock gating circuits (e.g., clock gating cells (CGCs)) that control the functional mode of circuit blocks in the circuit are additionally test mode gated for hierarchical testing of the circuit. To avoid the need to gate every CGC in the clock distribution network, only certain segregated clock gating circuits in the clock distribution network may be selected for test mode clock gating according to desired testing hierarchy of the circuit. Test mode clock gating of only certain segregated clock gating circuits in a circuit can reduce the number of test gating circuits providing test mode clock gating to mitigate power consumption and area needed for providing selective testing of circuit blocks in the circuit.Type: ApplicationFiled: September 2, 2016Publication date: March 8, 2018Inventors: Kunal Jain, Moitrayee Ghosh, Anand Bhat, Joseph Fang
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Publication number: 20170309348Abstract: A method and apparatus for continuous write and read operations during memory testing. The method comprises: controlling a signal generator; triggering a write address and a data field operation each memory cycle; triggering a write signal to write to a memory each memory clock cycle; and reading a read address and a read data operation to the memory. An additional embodiment provides an apparatus for advanced memory latency testing. The apparatus includes a data generator trigger in communication with a signal generator and an address generator trigger also in communication with the signal generator.Type: ApplicationFiled: April 25, 2016Publication date: October 26, 2017Inventors: Nishi Bhushan Singh, Ashutosh Anand, Anand Bhat, Rajesh Tiwari, Shankarnarayan Bhat
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Patent number: 9711241Abstract: Embodiments contained in the disclosure provide a method for memory built-in self-testing (MBIST). The method begins when a testing program is loaded, which may be from an MBIST controller. Once the testing program is loaded MBIST testing begins. During testing, memory failures are determined and written to a failure indicator register. The writing to the failure indicator register occurs in parallel with the ongoing MBIST testing. An apparatus is also provided. The apparatus includes a memory data read/write block, a memory register, a memory addressor, and a memory read/write controller. The apparatus communicates with the memories under test through a memory address and data bus.Type: GrantFiled: April 1, 2015Date of Patent: July 18, 2017Assignee: QUALCOMM IncorporatedInventors: Ashutosh Anand, Shankarnarayan Bhat, Nikhil Sudhakaran, Praveen Raghuraman, Nishi Bhushan Singh, Anand Bhat, Abhinav Kothiala, Sanjay Muchini, Arun Balachandar, Devadatta Bhat
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Publication number: 20170110204Abstract: A method and apparatus for testing a device memory. The method begins with a generated data and address width from an automatic testing system. The generated data width and the generated address width is compared with the required data width and address width of a device under test and used to set a user bit. If the generated data width and address width match the required data and address width, the user bit is set to zero. If the generated data width and address width do not match the required data width and address width, the user bit is set to 1. The user bit provides address control and data control during testing. The apparatus includes a wireless test access protocol that is electrically connected to a glue logic module. A wireless test access port is electrically connected to the glue logic module as is the device under test.Type: ApplicationFiled: October 16, 2015Publication date: April 20, 2017Inventors: Abhinav Kothiala, Nishi Bhushan Singh, Rajesh Tiwari, Anand Bhat, Ashutosh Anand, Shankarnarayan Bhat