Patents by Inventor Anand Dalal
Anand Dalal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220129527Abstract: Techniques are disclosed relating to maintaining device security associated with reduced power modes. In some embodiments, a computing device receives a request to place the computing device in a reduced power mode in which a first memory of the computing device is powered off. Based on the request, the computing device offloads a memory page from the first memory to a second memory such that the offloading includes encrypting the memory page. Based on a request to resume from the reduced power mode, the computing device restores the memory page from the second memory to the first memory such that the restoring includes decrypting the encrypted memory page. After initiating the restoring, the computing device presents a user authentication prompt asking for a user credential.Type: ApplicationFiled: October 19, 2021Publication date: April 28, 2022Inventors: Alan M. Dunn, Anish C. Trivedi, Ronnie G. Misra, Wade Benson, Anand Dalal
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Publication number: 20210341317Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.Type: ApplicationFiled: July 12, 2021Publication date: November 4, 2021Inventors: Brijesh Tripathi, Shane J. Keil, Manu Gulati, Jung Wook Cho, Erik P. Machnicki, Gilbert H. Herbeck, Timothy J. Millet, Joshua P. de Cesare, Anand Dalal
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Publication number: 20210333132Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.Type: ApplicationFiled: July 2, 2021Publication date: October 28, 2021Inventors: Brijesh Tripathi, Shane J. Keil, Manu Gulati, Jung Wook Cho, Erik P. Machnicki, Gilbert H. Herbeck, Timothy J. Millet, Joshua P. de Cesare, Anand Dalal, Michael F. Culbert
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Patent number: 11079261Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.Type: GrantFiled: November 20, 2019Date of Patent: August 3, 2021Assignee: Apple Inc.Inventors: Brijesh Tripathi, Shane J. Keil, Manu Gulati, Jung Wook Cho, Erik P. Machnicki, Gilbert H. Herbeck, Timothy J. Millet, Joshua P. de Cesare, Anand Dalal
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Patent number: 10915160Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.Type: GrantFiled: January 17, 2020Date of Patent: February 9, 2021Assignee: Apple Inc.Inventors: Anand Dalal, Joshua P. de Cesare
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Patent number: 10831700Abstract: Methods and apparatus for managing connections between multiple internal integrated circuits (ICs) of, for example, a high-speed internal device interface. Improved schemes for coordination of connection and disconnection events, and/or suspension and resumption of operation for a High-Speed Inter-Chip™ (HSIC) interface are disclosed. In one exemplary embodiment, a “device”-initiated and “host”-initiated connect/disconnect procedure is disclosed, that provides improved timing, synchronization, and power consumption.Type: GrantFiled: June 17, 2019Date of Patent: November 10, 2020Assignee: Apple Inc.Inventors: Daniel Wilson, Anand Dalal, Josh De Cesare
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Publication number: 20200150745Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.Type: ApplicationFiled: January 17, 2020Publication date: May 14, 2020Inventors: Anand Dalal, Joshua P. de Cesare
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Publication number: 20200149932Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.Type: ApplicationFiled: November 20, 2019Publication date: May 14, 2020Inventors: Brijesh Tripathi, Shane J. Keil, Manu Gulati, Jung Wook Cho, Erik P. Machnicki, Gilbert H. Herbeck, Timothy J. Millet, Joshua P. de Cesare, Anand Dalal
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Patent number: 10571996Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.Type: GrantFiled: August 31, 2017Date of Patent: February 25, 2020Assignee: Apple Inc.Inventors: Anand Dalal, Joshua P. de Cesare
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Publication number: 20190370217Abstract: Methods and apparatus for managing connections between multiple internal integrated circuits (ICs) of, for example, a high-speed internal device interface. Improved schemes for coordination of connection and disconnection events, and/or suspension and resumption of operation for a High-Speed Inter-Chip™ (HSIC) interface are disclosed. In one exemplary embodiment, a “device”-initiated and “host”-initiated connect/disconnect procedure is disclosed, that provides improved timing, synchronization, and power consumption.Type: ApplicationFiled: June 17, 2019Publication date: December 5, 2019Inventors: Daniel Wilson, Anand Dalal, Josh De Cesare
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Patent number: 10488230Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.Type: GrantFiled: June 26, 2018Date of Patent: November 26, 2019Assignee: Apple Inc.Inventors: Brijesh Tripathi, Shane J. Keil, Manu Gulati, Jung Wook Cho, Erik P. Machnicki, Gilbert H. Herbeck, Timothy J. Millet, Joshua P. de Cesare, Anand Dalal
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Patent number: 10324891Abstract: Methods and apparatus for managing connections between multiple internal integrated circuits (ICs) of, for example, a high-speed internal device interface. Improved schemes for coordination of connection and disconnection events, and/or suspension and resumption of operation for a High-Speed Inter-Chip™ (HSIC) interface are disclosed. In one exemplary embodiment, a “device”-initiated and “host”-initiated connect/disconnect procedure is disclosed, that provides improved timing, synchronization, and power consumption.Type: GrantFiled: November 20, 2017Date of Patent: June 18, 2019Assignee: Apple Inc.Inventors: Daniel Wilson, Anand Dalal, Josh De Cesare
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Patent number: 10261894Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.Type: GrantFiled: March 2, 2017Date of Patent: April 16, 2019Assignee: Apple Inc.Inventors: Brijesh Tripathi, Shane J. Keil, Manu Gulati, Jung Wook Cho, Erik P. Machnicki, Gilbert H. Herbeck, Timothy J. Millet, Joshua P. de Cesare, Anand Dalal
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Publication number: 20180313673Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.Type: ApplicationFiled: June 26, 2018Publication date: November 1, 2018Inventors: Brijesh Tripathi, Shane J. Keil, Manu Gulati, Jung Wook Cho, Erik P. Machnicki, Gilbert H. Herbeck, Timothy J. Millet, Joshua P. de Cesare, Anand Dalal
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Patent number: 10031000Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.Type: GrantFiled: August 13, 2014Date of Patent: July 24, 2018Assignee: Apple Inc.Inventors: Brijesh Tripathi, Shane J. Keil, Manu Gulati, Jung Wook Cho, Erik P. Machnicki, Gilbert H. Herbeck, Timothy J. Millet, Joshua P. de Cesare, Anand Dalal
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Publication number: 20180074573Abstract: Methods and apparatus for managing connections between multiple internal integrated circuits (ICs) of, for example, a high-speed internal device interface. Improved schemes for coordination of connection and disconnection events, and/or suspension and resumption of operation for a High-Speed Inter-Chip™ (HSIC) interface are disclosed. In one exemplary embodiment, a “device”-initiated and “host”-initiated connect/disconnect procedure is disclosed, that provides improved timing, synchronization, and power consumption.Type: ApplicationFiled: November 20, 2017Publication date: March 15, 2018Inventors: Daniel Wilson, Anand Dalal, Josh De Cesare
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Publication number: 20170364139Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.Type: ApplicationFiled: August 31, 2017Publication date: December 21, 2017Inventors: Anand Dalal, Joshua P. de Cesare
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Patent number: 9823733Abstract: Methods and apparatus for managing connections between multiple internal integrated circuits (ICs) of, for example, a high-speed internal device interface. Improved schemes for coordination of connection and disconnection events, and/or suspension and resumption of operation for a High-Speed Inter-Chip™ (HSIC) interface are disclosed. In one exemplary embodiment, a “device”-initiated and “host”-initiated connect/disconnect procedure is disclosed, that provides improved timing, synchronization, and power consumption.Type: GrantFiled: December 29, 2016Date of Patent: November 21, 2017Assignee: Apple Inc.Inventors: Daniel Wilson, Anand Dalal, Josh De Cesare
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Patent number: 9778728Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.Type: GrantFiled: May 29, 2014Date of Patent: October 3, 2017Assignee: Apple Inc.Inventors: Anand Dalal, Joshua P. de Cesare
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Publication number: 20170177256Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.Type: ApplicationFiled: March 2, 2017Publication date: June 22, 2017Inventors: Brijesh Tripathi, Shane J. Keil, Manu Gulati, Jung Wook Cho, Erik P. Machnicki, Gilbert H. Herbeck, Timothy J. Millet, Joshua P. de Cesare, Anand Dalal